Honours-Thesis/.vscode/ltex.dictionary.en-AU.txt

UWAA
UWAAL
LTspice
STLink
VSCode
Dilusha
GEVS
electrodynamic
outgassing
tri-axial
Pyroshock
FloripaSat-I
downlink
OBDH
OBDHs
kbps
LoRa
downlinked
HPRs
Aglietti
Nath
Vibroacoustic
sinusoids
MEMS
OR-ing
IIST
MCAD
Altium
ECAD
shortname
vibroacoustic
Jamir
Ludovico
Marelich
Michal
Zawierta
SDOF
SOTA
Openrocket
OpenRocket
pyroshock
DAQ
CrystalDiskMark
Aerotech
DAQs
safing
outjob
PSpice
altium
Priyadarshnam
Priyadarshnam
Hari
AURC
Svengeance
A$
UART
LIPD
JLCPCB
DigiKey
realtime
??? 2024-10-09 17:43:45 +08:00			`UWAA`
			`UWAAL`
			`LTspice`
			`STLink`
			`VSCode`
			`Dilusha`
			`GEVS`
			`electrodynamic`
			`outgassing`
			`tri-axial`
			`Pyroshock`
			`FloripaSat-I`
			`downlink`
			`OBDH`
			`OBDHs`
			`kbps`
			`LoRa`
			`downlinked`
			`HPRs`
			`Aglietti`
			`Nath`
			`Vibroacoustic`
			`sinusoids`
			`MEMS`
			`OR-ing`
			`IIST`
			`MCAD`
			`Altium`
			`ECAD`
			`shortname`
			`vibroacoustic`
			`Jamir`
			`Ludovico`
			`Marelich`
			`Michal`
			`Zawierta`
Version before re-write as design/build project 2024-10-14 02:20:51 +08:00			`SDOF`
			`SOTA`
			`Openrocket`
			`OpenRocket`
			`pyroshock`
			`DAQ`
			`CrystalDiskMark`
half way in terms of minimum word count 2024-10-14 23:24:10 +08:00			`Aerotech`
			`DAQs`
			`safing`
			`outjob`
			`PSpice`
			`altium`
add lots more shit (requirements, selection of some parts) 2024-10-15 18:18:44 +08:00			`Priyadarshnam`
			`Priyadarshnam`
			`Hari`
			`AURC`
			`Svengeance`
9kwords 2024-10-16 19:26:35 +08:00			`A$`
			`UART`
			`LIPD`
			`JLCPCB`
			`DigiKey`
			`realtime`