mirror of
https://github.com/peter-tanner/neptunium-firmware.git
synced 2024-12-02 21:10:18 +08:00
20311 lines
765 KiB
Plaintext
20311 lines
765 KiB
Plaintext
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neptunium.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 00000188 08000000 08000000 00001000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 00008a24 08000188 08000188 00001188 2**2
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 0000008c 08008bac 08008bac 00009bac 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 08008c38 08008c38 0000a17c 2**0
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CONTENTS
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4 .ARM 00000000 08008c38 08008c38 0000a17c 2**0
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CONTENTS
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5 .preinit_array 00000000 08008c38 08008c38 0000a17c 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 08008c38 08008c38 00009c38 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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7 .fini_array 00000004 08008c3c 08008c3c 00009c3c 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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8 .data 0000017c 20000000 08008c40 0000a000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 0000127c 2000017c 08008dbc 0000a17c 2**2
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ALLOC
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10 ._user_heap_stack 00000600 200013f8 08008dbc 0000a3f8 2**0
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ALLOC
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11 .ARM.attributes 00000030 00000000 00000000 0000a17c 2**0
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CONTENTS, READONLY
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12 .debug_info 0001131c 00000000 00000000 0000a1ac 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_abbrev 00002e5d 00000000 00000000 0001b4c8 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 00000c70 00000000 00000000 0001e328 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_rnglists 00000956 00000000 00000000 0001ef98 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 0001d582 00000000 00000000 0001f8ee 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 00011fbd 00000000 00000000 0003ce70 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 000a0939 00000000 00000000 0004ee2d 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000043 00000000 00000000 000ef766 2**0
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CONTENTS, READONLY
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20 .debug_frame 00003124 00000000 00000000 000ef7ac 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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21 .debug_line_str 00000060 00000000 00000000 000f28d0 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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08000188 <__do_global_dtors_aux>:
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8000188: b510 push {r4, lr}
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800018a: 4c05 ldr r4, [pc, #20] @ (80001a0 <__do_global_dtors_aux+0x18>)
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800018c: 7823 ldrb r3, [r4, #0]
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800018e: b933 cbnz r3, 800019e <__do_global_dtors_aux+0x16>
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8000190: 4b04 ldr r3, [pc, #16] @ (80001a4 <__do_global_dtors_aux+0x1c>)
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8000192: b113 cbz r3, 800019a <__do_global_dtors_aux+0x12>
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8000194: 4804 ldr r0, [pc, #16] @ (80001a8 <__do_global_dtors_aux+0x20>)
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8000196: f3af 8000 nop.w
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800019a: 2301 movs r3, #1
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800019c: 7023 strb r3, [r4, #0]
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800019e: bd10 pop {r4, pc}
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80001a0: 2000017c .word 0x2000017c
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80001a4: 00000000 .word 0x00000000
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80001a8: 08008b94 .word 0x08008b94
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080001ac <frame_dummy>:
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80001ac: b508 push {r3, lr}
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80001ae: 4b03 ldr r3, [pc, #12] @ (80001bc <frame_dummy+0x10>)
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80001b0: b11b cbz r3, 80001ba <frame_dummy+0xe>
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80001b2: 4903 ldr r1, [pc, #12] @ (80001c0 <frame_dummy+0x14>)
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80001b4: 4803 ldr r0, [pc, #12] @ (80001c4 <frame_dummy+0x18>)
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80001b6: f3af 8000 nop.w
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80001ba: bd08 pop {r3, pc}
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80001bc: 00000000 .word 0x00000000
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80001c0: 20000180 .word 0x20000180
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80001c4: 08008b94 .word 0x08008b94
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080001c8 <main>:
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/**
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* @brief The application entry point.
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* @retval int
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*/
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int main(void)
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{
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80001c8: b580 push {r7, lr}
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80001ca: b084 sub sp, #16
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80001cc: af00 add r7, sp, #0
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/* USER CODE BEGIN 1 */
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uint8_t buffer[] = "Hello World";
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80001ce: 4a0c ldr r2, [pc, #48] @ (8000200 <main+0x38>)
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80001d0: 1d3b adds r3, r7, #4
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80001d2: ca07 ldmia r2, {r0, r1, r2}
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80001d4: e883 0007 stmia.w r3, {r0, r1, r2}
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/* USER CODE END 1 */
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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HAL_Init();
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80001d8: f000 f9b4 bl 8000544 <HAL_Init>
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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80001dc: f000 f812 bl 8000204 <SystemClock_Config>
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/* USER CODE BEGIN SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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80001e0: f000 f89c bl 800031c <MX_GPIO_Init>
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MX_USB_DEVICE_Init();
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80001e4: f008 f806 bl 80081f4 <MX_USB_DEVICE_Init>
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MX_USART3_UART_Init();
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80001e8: f000 f868 bl 80002bc <MX_USART3_UART_Init>
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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while (1)
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{
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CDC_Transmit_FS(buffer, sizeof(buffer));
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80001ec: 1d3b adds r3, r7, #4
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80001ee: 210c movs r1, #12
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80001f0: 4618 mov r0, r3
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80001f2: f008 f8bd bl 8008370 <CDC_Transmit_FS>
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HAL_Delay(100);
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80001f6: 2064 movs r0, #100 @ 0x64
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80001f8: f000 fa0a bl 8000610 <HAL_Delay>
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CDC_Transmit_FS(buffer, sizeof(buffer));
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80001fc: bf00 nop
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80001fe: e7f5 b.n 80001ec <main+0x24>
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8000200: 08008bac .word 0x08008bac
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08000204 <SystemClock_Config>:
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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8000204: b580 push {r7, lr}
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8000206: b09c sub sp, #112 @ 0x70
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8000208: af00 add r7, sp, #0
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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800020a: f107 0348 add.w r3, r7, #72 @ 0x48
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800020e: 2228 movs r2, #40 @ 0x28
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8000210: 2100 movs r1, #0
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8000212: 4618 mov r0, r3
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8000214: f008 fc92 bl 8008b3c <memset>
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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8000218: f107 0334 add.w r3, r7, #52 @ 0x34
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800021c: 2200 movs r2, #0
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800021e: 601a str r2, [r3, #0]
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8000220: 605a str r2, [r3, #4]
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8000222: 609a str r2, [r3, #8]
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8000224: 60da str r2, [r3, #12]
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8000226: 611a str r2, [r3, #16]
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
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8000228: 463b mov r3, r7
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800022a: 2234 movs r2, #52 @ 0x34
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800022c: 2100 movs r1, #0
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800022e: 4618 mov r0, r3
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8000230: f008 fc84 bl 8008b3c <memset>
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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8000234: 2301 movs r3, #1
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8000236: 64bb str r3, [r7, #72] @ 0x48
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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8000238: f44f 3380 mov.w r3, #65536 @ 0x10000
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800023c: 64fb str r3, [r7, #76] @ 0x4c
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RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
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800023e: 2300 movs r3, #0
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8000240: 653b str r3, [r7, #80] @ 0x50
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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8000242: 2301 movs r3, #1
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8000244: 65bb str r3, [r7, #88] @ 0x58
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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8000246: 2302 movs r3, #2
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8000248: 667b str r3, [r7, #100] @ 0x64
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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800024a: f44f 3380 mov.w r3, #65536 @ 0x10000
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800024e: 66bb str r3, [r7, #104] @ 0x68
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL3;
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8000250: f44f 2380 mov.w r3, #262144 @ 0x40000
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8000254: 66fb str r3, [r7, #108] @ 0x6c
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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8000256: f107 0348 add.w r3, r7, #72 @ 0x48
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800025a: 4618 mov r0, r3
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800025c: f002 f942 bl 80024e4 <HAL_RCC_OscConfig>
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8000260: 4603 mov r3, r0
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8000262: 2b00 cmp r3, #0
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8000264: d001 beq.n 800026a <SystemClock_Config+0x66>
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{
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Error_Handler();
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8000266: f000 f889 bl 800037c <Error_Handler>
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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800026a: 230f movs r3, #15
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800026c: 637b str r3, [r7, #52] @ 0x34
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
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800026e: 2301 movs r3, #1
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8000270: 63bb str r3, [r7, #56] @ 0x38
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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8000272: 2300 movs r3, #0
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8000274: 63fb str r3, [r7, #60] @ 0x3c
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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8000276: 2300 movs r3, #0
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8000278: 643b str r3, [r7, #64] @ 0x40
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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800027a: 2300 movs r3, #0
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800027c: 647b str r3, [r7, #68] @ 0x44
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
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800027e: f107 0334 add.w r3, r7, #52 @ 0x34
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8000282: 2100 movs r1, #0
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8000284: 4618 mov r0, r3
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8000286: f003 f96b bl 8003560 <HAL_RCC_ClockConfig>
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800028a: 4603 mov r3, r0
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800028c: 2b00 cmp r3, #0
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800028e: d001 beq.n 8000294 <SystemClock_Config+0x90>
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{
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Error_Handler();
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8000290: f000 f874 bl 800037c <Error_Handler>
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}
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
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8000294: f44f 3300 mov.w r3, #131072 @ 0x20000
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8000298: 603b str r3, [r7, #0]
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PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL;
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800029a: f44f 0380 mov.w r3, #4194304 @ 0x400000
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800029e: 633b str r3, [r7, #48] @ 0x30
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
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80002a0: 463b mov r3, r7
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80002a2: 4618 mov r0, r3
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80002a4: f003 fb94 bl 80039d0 <HAL_RCCEx_PeriphCLKConfig>
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80002a8: 4603 mov r3, r0
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80002aa: 2b00 cmp r3, #0
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80002ac: d001 beq.n 80002b2 <SystemClock_Config+0xae>
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{
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Error_Handler();
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80002ae: f000 f865 bl 800037c <Error_Handler>
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}
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}
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80002b2: bf00 nop
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80002b4: 3770 adds r7, #112 @ 0x70
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80002b6: 46bd mov sp, r7
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80002b8: bd80 pop {r7, pc}
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...
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080002bc <MX_USART3_UART_Init>:
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* @brief USART3 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_USART3_UART_Init(void)
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{
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80002bc: b580 push {r7, lr}
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80002be: af00 add r7, sp, #0
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/* USER CODE END USART3_Init 0 */
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/* USER CODE BEGIN USART3_Init 1 */
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/* USER CODE END USART3_Init 1 */
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huart3.Instance = USART3;
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80002c0: 4b14 ldr r3, [pc, #80] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002c2: 4a15 ldr r2, [pc, #84] @ (8000318 <MX_USART3_UART_Init+0x5c>)
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80002c4: 601a str r2, [r3, #0]
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huart3.Init.BaudRate = 38400;
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80002c6: 4b13 ldr r3, [pc, #76] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002c8: f44f 4216 mov.w r2, #38400 @ 0x9600
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80002cc: 605a str r2, [r3, #4]
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huart3.Init.WordLength = UART_WORDLENGTH_8B;
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80002ce: 4b11 ldr r3, [pc, #68] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002d0: 2200 movs r2, #0
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80002d2: 609a str r2, [r3, #8]
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huart3.Init.StopBits = UART_STOPBITS_1;
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80002d4: 4b0f ldr r3, [pc, #60] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002d6: 2200 movs r2, #0
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80002d8: 60da str r2, [r3, #12]
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huart3.Init.Parity = UART_PARITY_NONE;
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80002da: 4b0e ldr r3, [pc, #56] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002dc: 2200 movs r2, #0
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80002de: 611a str r2, [r3, #16]
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huart3.Init.Mode = UART_MODE_TX_RX;
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80002e0: 4b0c ldr r3, [pc, #48] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002e2: 220c movs r2, #12
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80002e4: 615a str r2, [r3, #20]
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huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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80002e6: 4b0b ldr r3, [pc, #44] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002e8: 2200 movs r2, #0
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80002ea: 619a str r2, [r3, #24]
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huart3.Init.OverSampling = UART_OVERSAMPLING_16;
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80002ec: 4b09 ldr r3, [pc, #36] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002ee: 2200 movs r2, #0
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80002f0: 61da str r2, [r3, #28]
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huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
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80002f2: 4b08 ldr r3, [pc, #32] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002f4: 2200 movs r2, #0
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80002f6: 621a str r2, [r3, #32]
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huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
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80002f8: 4b06 ldr r3, [pc, #24] @ (8000314 <MX_USART3_UART_Init+0x58>)
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80002fa: 2200 movs r2, #0
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80002fc: 625a str r2, [r3, #36] @ 0x24
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if (HAL_UART_Init(&huart3) != HAL_OK)
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80002fe: 4805 ldr r0, [pc, #20] @ (8000314 <MX_USART3_UART_Init+0x58>)
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8000300: f003 fcf8 bl 8003cf4 <HAL_UART_Init>
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8000304: 4603 mov r3, r0
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8000306: 2b00 cmp r3, #0
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8000308: d001 beq.n 800030e <MX_USART3_UART_Init+0x52>
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{
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Error_Handler();
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800030a: f000 f837 bl 800037c <Error_Handler>
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}
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/* USER CODE BEGIN USART3_Init 2 */
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/* USER CODE END USART3_Init 2 */
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}
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800030e: bf00 nop
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8000310: bd80 pop {r7, pc}
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8000312: bf00 nop
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8000314: 20000198 .word 0x20000198
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8000318: 40004800 .word 0x40004800
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0800031c <MX_GPIO_Init>:
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* @brief GPIO Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_GPIO_Init(void)
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{
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800031c: b480 push {r7}
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800031e: b085 sub sp, #20
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8000320: af00 add r7, sp, #0
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/* USER CODE BEGIN MX_GPIO_Init_1 */
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/* USER CODE END MX_GPIO_Init_1 */
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/* GPIO Ports Clock Enable */
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__HAL_RCC_GPIOF_CLK_ENABLE();
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8000322: 4b15 ldr r3, [pc, #84] @ (8000378 <MX_GPIO_Init+0x5c>)
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8000324: 695b ldr r3, [r3, #20]
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8000326: 4a14 ldr r2, [pc, #80] @ (8000378 <MX_GPIO_Init+0x5c>)
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8000328: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
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800032c: 6153 str r3, [r2, #20]
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800032e: 4b12 ldr r3, [pc, #72] @ (8000378 <MX_GPIO_Init+0x5c>)
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8000330: 695b ldr r3, [r3, #20]
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8000332: f403 0380 and.w r3, r3, #4194304 @ 0x400000
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8000336: 60fb str r3, [r7, #12]
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8000338: 68fb ldr r3, [r7, #12]
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__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
800033a: 4b0f ldr r3, [pc, #60] @ (8000378 <MX_GPIO_Init+0x5c>)
|
|
800033c: 695b ldr r3, [r3, #20]
|
|
800033e: 4a0e ldr r2, [pc, #56] @ (8000378 <MX_GPIO_Init+0x5c>)
|
|
8000340: f443 2380 orr.w r3, r3, #262144 @ 0x40000
|
|
8000344: 6153 str r3, [r2, #20]
|
|
8000346: 4b0c ldr r3, [pc, #48] @ (8000378 <MX_GPIO_Init+0x5c>)
|
|
8000348: 695b ldr r3, [r3, #20]
|
|
800034a: f403 2380 and.w r3, r3, #262144 @ 0x40000
|
|
800034e: 60bb str r3, [r7, #8]
|
|
8000350: 68bb ldr r3, [r7, #8]
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
8000352: 4b09 ldr r3, [pc, #36] @ (8000378 <MX_GPIO_Init+0x5c>)
|
|
8000354: 695b ldr r3, [r3, #20]
|
|
8000356: 4a08 ldr r2, [pc, #32] @ (8000378 <MX_GPIO_Init+0x5c>)
|
|
8000358: f443 3300 orr.w r3, r3, #131072 @ 0x20000
|
|
800035c: 6153 str r3, [r2, #20]
|
|
800035e: 4b06 ldr r3, [pc, #24] @ (8000378 <MX_GPIO_Init+0x5c>)
|
|
8000360: 695b ldr r3, [r3, #20]
|
|
8000362: f403 3300 and.w r3, r3, #131072 @ 0x20000
|
|
8000366: 607b str r3, [r7, #4]
|
|
8000368: 687b ldr r3, [r7, #4]
|
|
|
|
/* USER CODE BEGIN MX_GPIO_Init_2 */
|
|
/* USER CODE END MX_GPIO_Init_2 */
|
|
}
|
|
800036a: bf00 nop
|
|
800036c: 3714 adds r7, #20
|
|
800036e: 46bd mov sp, r7
|
|
8000370: f85d 7b04 ldr.w r7, [sp], #4
|
|
8000374: 4770 bx lr
|
|
8000376: bf00 nop
|
|
8000378: 40021000 .word 0x40021000
|
|
|
|
0800037c <Error_Handler>:
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @retval None
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
800037c: b480 push {r7}
|
|
800037e: af00 add r7, sp, #0
|
|
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
|
Can only be executed in Privileged modes.
|
|
*/
|
|
__STATIC_FORCEINLINE void __disable_irq(void)
|
|
{
|
|
__ASM volatile ("cpsid i" : : : "memory");
|
|
8000380: b672 cpsid i
|
|
}
|
|
8000382: bf00 nop
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
__disable_irq();
|
|
while (1)
|
|
8000384: bf00 nop
|
|
8000386: e7fd b.n 8000384 <Error_Handler+0x8>
|
|
|
|
08000388 <HAL_MspInit>:
|
|
/* USER CODE END 0 */
|
|
/**
|
|
* Initializes the Global MSP.
|
|
*/
|
|
void HAL_MspInit(void)
|
|
{
|
|
8000388: b480 push {r7}
|
|
800038a: b083 sub sp, #12
|
|
800038c: af00 add r7, sp, #0
|
|
|
|
/* USER CODE BEGIN MspInit 0 */
|
|
|
|
/* USER CODE END MspInit 0 */
|
|
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
800038e: 4b0f ldr r3, [pc, #60] @ (80003cc <HAL_MspInit+0x44>)
|
|
8000390: 699b ldr r3, [r3, #24]
|
|
8000392: 4a0e ldr r2, [pc, #56] @ (80003cc <HAL_MspInit+0x44>)
|
|
8000394: f043 0301 orr.w r3, r3, #1
|
|
8000398: 6193 str r3, [r2, #24]
|
|
800039a: 4b0c ldr r3, [pc, #48] @ (80003cc <HAL_MspInit+0x44>)
|
|
800039c: 699b ldr r3, [r3, #24]
|
|
800039e: f003 0301 and.w r3, r3, #1
|
|
80003a2: 607b str r3, [r7, #4]
|
|
80003a4: 687b ldr r3, [r7, #4]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
80003a6: 4b09 ldr r3, [pc, #36] @ (80003cc <HAL_MspInit+0x44>)
|
|
80003a8: 69db ldr r3, [r3, #28]
|
|
80003aa: 4a08 ldr r2, [pc, #32] @ (80003cc <HAL_MspInit+0x44>)
|
|
80003ac: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
|
|
80003b0: 61d3 str r3, [r2, #28]
|
|
80003b2: 4b06 ldr r3, [pc, #24] @ (80003cc <HAL_MspInit+0x44>)
|
|
80003b4: 69db ldr r3, [r3, #28]
|
|
80003b6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
|
|
80003ba: 603b str r3, [r7, #0]
|
|
80003bc: 683b ldr r3, [r7, #0]
|
|
/* System interrupt init*/
|
|
|
|
/* USER CODE BEGIN MspInit 1 */
|
|
|
|
/* USER CODE END MspInit 1 */
|
|
}
|
|
80003be: bf00 nop
|
|
80003c0: 370c adds r7, #12
|
|
80003c2: 46bd mov sp, r7
|
|
80003c4: f85d 7b04 ldr.w r7, [sp], #4
|
|
80003c8: 4770 bx lr
|
|
80003ca: bf00 nop
|
|
80003cc: 40021000 .word 0x40021000
|
|
|
|
080003d0 <HAL_UART_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param huart: UART handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
|
{
|
|
80003d0: b580 push {r7, lr}
|
|
80003d2: b08a sub sp, #40 @ 0x28
|
|
80003d4: af00 add r7, sp, #0
|
|
80003d6: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
80003d8: f107 0314 add.w r3, r7, #20
|
|
80003dc: 2200 movs r2, #0
|
|
80003de: 601a str r2, [r3, #0]
|
|
80003e0: 605a str r2, [r3, #4]
|
|
80003e2: 609a str r2, [r3, #8]
|
|
80003e4: 60da str r2, [r3, #12]
|
|
80003e6: 611a str r2, [r3, #16]
|
|
if(huart->Instance==USART3)
|
|
80003e8: 687b ldr r3, [r7, #4]
|
|
80003ea: 681b ldr r3, [r3, #0]
|
|
80003ec: 4a17 ldr r2, [pc, #92] @ (800044c <HAL_UART_MspInit+0x7c>)
|
|
80003ee: 4293 cmp r3, r2
|
|
80003f0: d128 bne.n 8000444 <HAL_UART_MspInit+0x74>
|
|
{
|
|
/* USER CODE BEGIN USART3_MspInit 0 */
|
|
|
|
/* USER CODE END USART3_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_USART3_CLK_ENABLE();
|
|
80003f2: 4b17 ldr r3, [pc, #92] @ (8000450 <HAL_UART_MspInit+0x80>)
|
|
80003f4: 69db ldr r3, [r3, #28]
|
|
80003f6: 4a16 ldr r2, [pc, #88] @ (8000450 <HAL_UART_MspInit+0x80>)
|
|
80003f8: f443 2380 orr.w r3, r3, #262144 @ 0x40000
|
|
80003fc: 61d3 str r3, [r2, #28]
|
|
80003fe: 4b14 ldr r3, [pc, #80] @ (8000450 <HAL_UART_MspInit+0x80>)
|
|
8000400: 69db ldr r3, [r3, #28]
|
|
8000402: f403 2380 and.w r3, r3, #262144 @ 0x40000
|
|
8000406: 613b str r3, [r7, #16]
|
|
8000408: 693b ldr r3, [r7, #16]
|
|
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
800040a: 4b11 ldr r3, [pc, #68] @ (8000450 <HAL_UART_MspInit+0x80>)
|
|
800040c: 695b ldr r3, [r3, #20]
|
|
800040e: 4a10 ldr r2, [pc, #64] @ (8000450 <HAL_UART_MspInit+0x80>)
|
|
8000410: f443 2380 orr.w r3, r3, #262144 @ 0x40000
|
|
8000414: 6153 str r3, [r2, #20]
|
|
8000416: 4b0e ldr r3, [pc, #56] @ (8000450 <HAL_UART_MspInit+0x80>)
|
|
8000418: 695b ldr r3, [r3, #20]
|
|
800041a: f403 2380 and.w r3, r3, #262144 @ 0x40000
|
|
800041e: 60fb str r3, [r7, #12]
|
|
8000420: 68fb ldr r3, [r7, #12]
|
|
/**USART3 GPIO Configuration
|
|
PB10 ------> USART3_TX
|
|
PB11 ------> USART3_RX
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
|
|
8000422: f44f 6340 mov.w r3, #3072 @ 0xc00
|
|
8000426: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
8000428: 2302 movs r3, #2
|
|
800042a: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
800042c: 2300 movs r3, #0
|
|
800042e: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
8000430: 2303 movs r3, #3
|
|
8000432: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
|
|
8000434: 2307 movs r3, #7
|
|
8000436: 627b str r3, [r7, #36] @ 0x24
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
8000438: f107 0314 add.w r3, r7, #20
|
|
800043c: 4619 mov r1, r3
|
|
800043e: 4805 ldr r0, [pc, #20] @ (8000454 <HAL_UART_MspInit+0x84>)
|
|
8000440: f000 fa1c bl 800087c <HAL_GPIO_Init>
|
|
/* USER CODE BEGIN USART3_MspInit 1 */
|
|
|
|
/* USER CODE END USART3_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
8000444: bf00 nop
|
|
8000446: 3728 adds r7, #40 @ 0x28
|
|
8000448: 46bd mov sp, r7
|
|
800044a: bd80 pop {r7, pc}
|
|
800044c: 40004800 .word 0x40004800
|
|
8000450: 40021000 .word 0x40021000
|
|
8000454: 48000400 .word 0x48000400
|
|
|
|
08000458 <NMI_Handler>:
|
|
/******************************************************************************/
|
|
/**
|
|
* @brief This function handles Non maskable interrupt.
|
|
*/
|
|
void NMI_Handler(void)
|
|
{
|
|
8000458: b480 push {r7}
|
|
800045a: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
|
while (1)
|
|
800045c: bf00 nop
|
|
800045e: e7fd b.n 800045c <NMI_Handler+0x4>
|
|
|
|
08000460 <HardFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Hard fault interrupt.
|
|
*/
|
|
void HardFault_Handler(void)
|
|
{
|
|
8000460: b480 push {r7}
|
|
8000462: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
|
|
|
/* USER CODE END HardFault_IRQn 0 */
|
|
while (1)
|
|
8000464: bf00 nop
|
|
8000466: e7fd b.n 8000464 <HardFault_Handler+0x4>
|
|
|
|
08000468 <MemManage_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Memory management fault.
|
|
*/
|
|
void MemManage_Handler(void)
|
|
{
|
|
8000468: b480 push {r7}
|
|
800046a: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
|
|
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
|
while (1)
|
|
800046c: bf00 nop
|
|
800046e: e7fd b.n 800046c <MemManage_Handler+0x4>
|
|
|
|
08000470 <BusFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Pre-fetch fault, memory access fault.
|
|
*/
|
|
void BusFault_Handler(void)
|
|
{
|
|
8000470: b480 push {r7}
|
|
8000472: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
|
|
|
/* USER CODE END BusFault_IRQn 0 */
|
|
while (1)
|
|
8000474: bf00 nop
|
|
8000476: e7fd b.n 8000474 <BusFault_Handler+0x4>
|
|
|
|
08000478 <UsageFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Undefined instruction or illegal state.
|
|
*/
|
|
void UsageFault_Handler(void)
|
|
{
|
|
8000478: b480 push {r7}
|
|
800047a: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
|
|
|
/* USER CODE END UsageFault_IRQn 0 */
|
|
while (1)
|
|
800047c: bf00 nop
|
|
800047e: e7fd b.n 800047c <UsageFault_Handler+0x4>
|
|
|
|
08000480 <SVC_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System service call via SWI instruction.
|
|
*/
|
|
void SVC_Handler(void)
|
|
{
|
|
8000480: b480 push {r7}
|
|
8000482: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END SVCall_IRQn 0 */
|
|
/* USER CODE BEGIN SVCall_IRQn 1 */
|
|
|
|
/* USER CODE END SVCall_IRQn 1 */
|
|
}
|
|
8000484: bf00 nop
|
|
8000486: 46bd mov sp, r7
|
|
8000488: f85d 7b04 ldr.w r7, [sp], #4
|
|
800048c: 4770 bx lr
|
|
|
|
0800048e <DebugMon_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Debug monitor.
|
|
*/
|
|
void DebugMon_Handler(void)
|
|
{
|
|
800048e: b480 push {r7}
|
|
8000490: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
|
}
|
|
8000492: bf00 nop
|
|
8000494: 46bd mov sp, r7
|
|
8000496: f85d 7b04 ldr.w r7, [sp], #4
|
|
800049a: 4770 bx lr
|
|
|
|
0800049c <PendSV_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Pendable request for system service.
|
|
*/
|
|
void PendSV_Handler(void)
|
|
{
|
|
800049c: b480 push {r7}
|
|
800049e: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END PendSV_IRQn 0 */
|
|
/* USER CODE BEGIN PendSV_IRQn 1 */
|
|
|
|
/* USER CODE END PendSV_IRQn 1 */
|
|
}
|
|
80004a0: bf00 nop
|
|
80004a2: 46bd mov sp, r7
|
|
80004a4: f85d 7b04 ldr.w r7, [sp], #4
|
|
80004a8: 4770 bx lr
|
|
|
|
080004aa <SysTick_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System tick timer.
|
|
*/
|
|
void SysTick_Handler(void)
|
|
{
|
|
80004aa: b580 push {r7, lr}
|
|
80004ac: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
|
|
|
/* USER CODE END SysTick_IRQn 0 */
|
|
HAL_IncTick();
|
|
80004ae: f000 f88f bl 80005d0 <HAL_IncTick>
|
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
|
|
|
/* USER CODE END SysTick_IRQn 1 */
|
|
}
|
|
80004b2: bf00 nop
|
|
80004b4: bd80 pop {r7, pc}
|
|
...
|
|
|
|
080004b8 <USB_LP_CAN_RX0_IRQHandler>:
|
|
|
|
/**
|
|
* @brief This function handles CAN RX0 and USB low priority interrupts.
|
|
*/
|
|
void USB_LP_CAN_RX0_IRQHandler(void)
|
|
{
|
|
80004b8: b580 push {r7, lr}
|
|
80004ba: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 0 */
|
|
|
|
/* USER CODE END USB_LP_CAN_RX0_IRQn 0 */
|
|
HAL_PCD_IRQHandler(&hpcd_USB_FS);
|
|
80004bc: 4802 ldr r0, [pc, #8] @ (80004c8 <USB_LP_CAN_RX0_IRQHandler+0x10>)
|
|
80004be: f000 fc47 bl 8000d50 <HAL_PCD_IRQHandler>
|
|
/* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 1 */
|
|
|
|
/* USER CODE END USB_LP_CAN_RX0_IRQn 1 */
|
|
}
|
|
80004c2: bf00 nop
|
|
80004c4: bd80 pop {r7, pc}
|
|
80004c6: bf00 nop
|
|
80004c8: 20000eec .word 0x20000eec
|
|
|
|
080004cc <SystemInit>:
|
|
* @brief Setup the microcontroller system
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
void SystemInit(void)
|
|
{
|
|
80004cc: b480 push {r7}
|
|
80004ce: af00 add r7, sp, #0
|
|
/* FPU settings --------------------------------------------------------------*/
|
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
|
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
|
80004d0: 4b06 ldr r3, [pc, #24] @ (80004ec <SystemInit+0x20>)
|
|
80004d2: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
|
|
80004d6: 4a05 ldr r2, [pc, #20] @ (80004ec <SystemInit+0x20>)
|
|
80004d8: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
|
|
80004dc: f8c2 3088 str.w r3, [r2, #136] @ 0x88
|
|
|
|
/* Configure the Vector Table location -------------------------------------*/
|
|
#if defined(USER_VECT_TAB_ADDRESS)
|
|
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
|
#endif /* USER_VECT_TAB_ADDRESS */
|
|
}
|
|
80004e0: bf00 nop
|
|
80004e2: 46bd mov sp, r7
|
|
80004e4: f85d 7b04 ldr.w r7, [sp], #4
|
|
80004e8: 4770 bx lr
|
|
80004ea: bf00 nop
|
|
80004ec: e000ed00 .word 0xe000ed00
|
|
|
|
080004f0 <Reset_Handler>:
|
|
|
|
.section .text.Reset_Handler
|
|
.weak Reset_Handler
|
|
.type Reset_Handler, %function
|
|
Reset_Handler:
|
|
ldr sp, =_estack /* Atollic update: set stack pointer */
|
|
80004f0: f8df d034 ldr.w sp, [pc, #52] @ 8000528 <LoopForever+0x2>
|
|
|
|
/* Call the clock system initialization function.*/
|
|
bl SystemInit
|
|
80004f4: f7ff ffea bl 80004cc <SystemInit>
|
|
|
|
/* Copy the data segment initializers from flash to SRAM */
|
|
ldr r0, =_sdata
|
|
80004f8: 480c ldr r0, [pc, #48] @ (800052c <LoopForever+0x6>)
|
|
ldr r1, =_edata
|
|
80004fa: 490d ldr r1, [pc, #52] @ (8000530 <LoopForever+0xa>)
|
|
ldr r2, =_sidata
|
|
80004fc: 4a0d ldr r2, [pc, #52] @ (8000534 <LoopForever+0xe>)
|
|
movs r3, #0
|
|
80004fe: 2300 movs r3, #0
|
|
b LoopCopyDataInit
|
|
8000500: e002 b.n 8000508 <LoopCopyDataInit>
|
|
|
|
08000502 <CopyDataInit>:
|
|
|
|
CopyDataInit:
|
|
ldr r4, [r2, r3]
|
|
8000502: 58d4 ldr r4, [r2, r3]
|
|
str r4, [r0, r3]
|
|
8000504: 50c4 str r4, [r0, r3]
|
|
adds r3, r3, #4
|
|
8000506: 3304 adds r3, #4
|
|
|
|
08000508 <LoopCopyDataInit>:
|
|
|
|
LoopCopyDataInit:
|
|
adds r4, r0, r3
|
|
8000508: 18c4 adds r4, r0, r3
|
|
cmp r4, r1
|
|
800050a: 428c cmp r4, r1
|
|
bcc CopyDataInit
|
|
800050c: d3f9 bcc.n 8000502 <CopyDataInit>
|
|
|
|
/* Zero fill the bss segment. */
|
|
ldr r2, =_sbss
|
|
800050e: 4a0a ldr r2, [pc, #40] @ (8000538 <LoopForever+0x12>)
|
|
ldr r4, =_ebss
|
|
8000510: 4c0a ldr r4, [pc, #40] @ (800053c <LoopForever+0x16>)
|
|
movs r3, #0
|
|
8000512: 2300 movs r3, #0
|
|
b LoopFillZerobss
|
|
8000514: e001 b.n 800051a <LoopFillZerobss>
|
|
|
|
08000516 <FillZerobss>:
|
|
|
|
FillZerobss:
|
|
str r3, [r2]
|
|
8000516: 6013 str r3, [r2, #0]
|
|
adds r2, r2, #4
|
|
8000518: 3204 adds r2, #4
|
|
|
|
0800051a <LoopFillZerobss>:
|
|
|
|
LoopFillZerobss:
|
|
cmp r2, r4
|
|
800051a: 42a2 cmp r2, r4
|
|
bcc FillZerobss
|
|
800051c: d3fb bcc.n 8000516 <FillZerobss>
|
|
|
|
/* Call static constructors */
|
|
bl __libc_init_array
|
|
800051e: f008 fb15 bl 8008b4c <__libc_init_array>
|
|
/* Call the application's entry point.*/
|
|
bl main
|
|
8000522: f7ff fe51 bl 80001c8 <main>
|
|
|
|
08000526 <LoopForever>:
|
|
|
|
LoopForever:
|
|
b LoopForever
|
|
8000526: e7fe b.n 8000526 <LoopForever>
|
|
ldr sp, =_estack /* Atollic update: set stack pointer */
|
|
8000528: 20004000 .word 0x20004000
|
|
ldr r0, =_sdata
|
|
800052c: 20000000 .word 0x20000000
|
|
ldr r1, =_edata
|
|
8000530: 2000017c .word 0x2000017c
|
|
ldr r2, =_sidata
|
|
8000534: 08008c40 .word 0x08008c40
|
|
ldr r2, =_sbss
|
|
8000538: 2000017c .word 0x2000017c
|
|
ldr r4, =_ebss
|
|
800053c: 200013f8 .word 0x200013f8
|
|
|
|
08000540 <ADC1_IRQHandler>:
|
|
* @retval : None
|
|
*/
|
|
.section .text.Default_Handler,"ax",%progbits
|
|
Default_Handler:
|
|
Infinite_Loop:
|
|
b Infinite_Loop
|
|
8000540: e7fe b.n 8000540 <ADC1_IRQHandler>
|
|
...
|
|
|
|
08000544 <HAL_Init>:
|
|
* In the default implementation,Systick is used as source of time base.
|
|
* The tick variable is incremented each 1ms in its ISR.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_Init(void)
|
|
{
|
|
8000544: b580 push {r7, lr}
|
|
8000546: af00 add r7, sp, #0
|
|
/* Configure Flash prefetch */
|
|
#if (PREFETCH_ENABLE != 0U)
|
|
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
|
8000548: 4b08 ldr r3, [pc, #32] @ (800056c <HAL_Init+0x28>)
|
|
800054a: 681b ldr r3, [r3, #0]
|
|
800054c: 4a07 ldr r2, [pc, #28] @ (800056c <HAL_Init+0x28>)
|
|
800054e: f043 0310 orr.w r3, r3, #16
|
|
8000552: 6013 str r3, [r2, #0]
|
|
#endif /* PREFETCH_ENABLE */
|
|
|
|
/* Set Interrupt Group Priority */
|
|
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
|
8000554: 2003 movs r0, #3
|
|
8000556: f000 f94f bl 80007f8 <HAL_NVIC_SetPriorityGrouping>
|
|
|
|
/* Enable systick and configure 1ms tick (default clock after Reset is HSI) */
|
|
HAL_InitTick(TICK_INT_PRIORITY);
|
|
800055a: 200f movs r0, #15
|
|
800055c: f000 f808 bl 8000570 <HAL_InitTick>
|
|
|
|
/* Init the low level hardware */
|
|
HAL_MspInit();
|
|
8000560: f7ff ff12 bl 8000388 <HAL_MspInit>
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8000564: 2300 movs r3, #0
|
|
}
|
|
8000566: 4618 mov r0, r3
|
|
8000568: bd80 pop {r7, pc}
|
|
800056a: bf00 nop
|
|
800056c: 40022000 .word 0x40022000
|
|
|
|
08000570 <HAL_InitTick>:
|
|
* implementation in user file.
|
|
* @param TickPriority Tick interrupt priority.
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
|
{
|
|
8000570: b580 push {r7, lr}
|
|
8000572: b082 sub sp, #8
|
|
8000574: af00 add r7, sp, #0
|
|
8000576: 6078 str r0, [r7, #4]
|
|
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
|
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
|
8000578: 4b12 ldr r3, [pc, #72] @ (80005c4 <HAL_InitTick+0x54>)
|
|
800057a: 681a ldr r2, [r3, #0]
|
|
800057c: 4b12 ldr r3, [pc, #72] @ (80005c8 <HAL_InitTick+0x58>)
|
|
800057e: 781b ldrb r3, [r3, #0]
|
|
8000580: 4619 mov r1, r3
|
|
8000582: f44f 737a mov.w r3, #1000 @ 0x3e8
|
|
8000586: fbb3 f3f1 udiv r3, r3, r1
|
|
800058a: fbb2 f3f3 udiv r3, r2, r3
|
|
800058e: 4618 mov r0, r3
|
|
8000590: f000 f967 bl 8000862 <HAL_SYSTICK_Config>
|
|
8000594: 4603 mov r3, r0
|
|
8000596: 2b00 cmp r3, #0
|
|
8000598: d001 beq.n 800059e <HAL_InitTick+0x2e>
|
|
{
|
|
return HAL_ERROR;
|
|
800059a: 2301 movs r3, #1
|
|
800059c: e00e b.n 80005bc <HAL_InitTick+0x4c>
|
|
}
|
|
|
|
/* Configure the SysTick IRQ priority */
|
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
|
800059e: 687b ldr r3, [r7, #4]
|
|
80005a0: 2b0f cmp r3, #15
|
|
80005a2: d80a bhi.n 80005ba <HAL_InitTick+0x4a>
|
|
{
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
80005a4: 2200 movs r2, #0
|
|
80005a6: 6879 ldr r1, [r7, #4]
|
|
80005a8: f04f 30ff mov.w r0, #4294967295
|
|
80005ac: f000 f92f bl 800080e <HAL_NVIC_SetPriority>
|
|
uwTickPrio = TickPriority;
|
|
80005b0: 4a06 ldr r2, [pc, #24] @ (80005cc <HAL_InitTick+0x5c>)
|
|
80005b2: 687b ldr r3, [r7, #4]
|
|
80005b4: 6013 str r3, [r2, #0]
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
80005b6: 2300 movs r3, #0
|
|
80005b8: e000 b.n 80005bc <HAL_InitTick+0x4c>
|
|
return HAL_ERROR;
|
|
80005ba: 2301 movs r3, #1
|
|
}
|
|
80005bc: 4618 mov r0, r3
|
|
80005be: 3708 adds r7, #8
|
|
80005c0: 46bd mov sp, r7
|
|
80005c2: bd80 pop {r7, pc}
|
|
80005c4: 20000000 .word 0x20000000
|
|
80005c8: 20000008 .word 0x20000008
|
|
80005cc: 20000004 .word 0x20000004
|
|
|
|
080005d0 <HAL_IncTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_IncTick(void)
|
|
{
|
|
80005d0: b480 push {r7}
|
|
80005d2: af00 add r7, sp, #0
|
|
uwTick += uwTickFreq;
|
|
80005d4: 4b06 ldr r3, [pc, #24] @ (80005f0 <HAL_IncTick+0x20>)
|
|
80005d6: 781b ldrb r3, [r3, #0]
|
|
80005d8: 461a mov r2, r3
|
|
80005da: 4b06 ldr r3, [pc, #24] @ (80005f4 <HAL_IncTick+0x24>)
|
|
80005dc: 681b ldr r3, [r3, #0]
|
|
80005de: 4413 add r3, r2
|
|
80005e0: 4a04 ldr r2, [pc, #16] @ (80005f4 <HAL_IncTick+0x24>)
|
|
80005e2: 6013 str r3, [r2, #0]
|
|
}
|
|
80005e4: bf00 nop
|
|
80005e6: 46bd mov sp, r7
|
|
80005e8: f85d 7b04 ldr.w r7, [sp], #4
|
|
80005ec: 4770 bx lr
|
|
80005ee: bf00 nop
|
|
80005f0: 20000008 .word 0x20000008
|
|
80005f4: 20000220 .word 0x20000220
|
|
|
|
080005f8 <HAL_GetTick>:
|
|
* @note The function is declared as __Weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval tick value
|
|
*/
|
|
__weak uint32_t HAL_GetTick(void)
|
|
{
|
|
80005f8: b480 push {r7}
|
|
80005fa: af00 add r7, sp, #0
|
|
return uwTick;
|
|
80005fc: 4b03 ldr r3, [pc, #12] @ (800060c <HAL_GetTick+0x14>)
|
|
80005fe: 681b ldr r3, [r3, #0]
|
|
}
|
|
8000600: 4618 mov r0, r3
|
|
8000602: 46bd mov sp, r7
|
|
8000604: f85d 7b04 ldr.w r7, [sp], #4
|
|
8000608: 4770 bx lr
|
|
800060a: bf00 nop
|
|
800060c: 20000220 .word 0x20000220
|
|
|
|
08000610 <HAL_Delay>:
|
|
* implementations in user file.
|
|
* @param Delay specifies the delay time length, in milliseconds.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_Delay(uint32_t Delay)
|
|
{
|
|
8000610: b580 push {r7, lr}
|
|
8000612: b084 sub sp, #16
|
|
8000614: af00 add r7, sp, #0
|
|
8000616: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8000618: f7ff ffee bl 80005f8 <HAL_GetTick>
|
|
800061c: 60b8 str r0, [r7, #8]
|
|
uint32_t wait = Delay;
|
|
800061e: 687b ldr r3, [r7, #4]
|
|
8000620: 60fb str r3, [r7, #12]
|
|
|
|
/* Add freq to guarantee minimum wait */
|
|
if (wait < HAL_MAX_DELAY)
|
|
8000622: 68fb ldr r3, [r7, #12]
|
|
8000624: f1b3 3fff cmp.w r3, #4294967295
|
|
8000628: d005 beq.n 8000636 <HAL_Delay+0x26>
|
|
{
|
|
wait += (uint32_t)(uwTickFreq);
|
|
800062a: 4b0a ldr r3, [pc, #40] @ (8000654 <HAL_Delay+0x44>)
|
|
800062c: 781b ldrb r3, [r3, #0]
|
|
800062e: 461a mov r2, r3
|
|
8000630: 68fb ldr r3, [r7, #12]
|
|
8000632: 4413 add r3, r2
|
|
8000634: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
while((HAL_GetTick() - tickstart) < wait)
|
|
8000636: bf00 nop
|
|
8000638: f7ff ffde bl 80005f8 <HAL_GetTick>
|
|
800063c: 4602 mov r2, r0
|
|
800063e: 68bb ldr r3, [r7, #8]
|
|
8000640: 1ad3 subs r3, r2, r3
|
|
8000642: 68fa ldr r2, [r7, #12]
|
|
8000644: 429a cmp r2, r3
|
|
8000646: d8f7 bhi.n 8000638 <HAL_Delay+0x28>
|
|
{
|
|
}
|
|
}
|
|
8000648: bf00 nop
|
|
800064a: bf00 nop
|
|
800064c: 3710 adds r7, #16
|
|
800064e: 46bd mov sp, r7
|
|
8000650: bd80 pop {r7, pc}
|
|
8000652: bf00 nop
|
|
8000654: 20000008 .word 0x20000008
|
|
|
|
08000658 <__NVIC_SetPriorityGrouping>:
|
|
In case of a conflict between priority grouping and available
|
|
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
|
\param [in] PriorityGroup Priority grouping field.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
|
{
|
|
8000658: b480 push {r7}
|
|
800065a: b085 sub sp, #20
|
|
800065c: af00 add r7, sp, #0
|
|
800065e: 6078 str r0, [r7, #4]
|
|
uint32_t reg_value;
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
8000660: 687b ldr r3, [r7, #4]
|
|
8000662: f003 0307 and.w r3, r3, #7
|
|
8000666: 60fb str r3, [r7, #12]
|
|
|
|
reg_value = SCB->AIRCR; /* read old register configuration */
|
|
8000668: 4b0c ldr r3, [pc, #48] @ (800069c <__NVIC_SetPriorityGrouping+0x44>)
|
|
800066a: 68db ldr r3, [r3, #12]
|
|
800066c: 60bb str r3, [r7, #8]
|
|
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
|
800066e: 68ba ldr r2, [r7, #8]
|
|
8000670: f64f 03ff movw r3, #63743 @ 0xf8ff
|
|
8000674: 4013 ands r3, r2
|
|
8000676: 60bb str r3, [r7, #8]
|
|
reg_value = (reg_value |
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
|
8000678: 68fb ldr r3, [r7, #12]
|
|
800067a: 021a lsls r2, r3, #8
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
800067c: 68bb ldr r3, [r7, #8]
|
|
800067e: 4313 orrs r3, r2
|
|
reg_value = (reg_value |
|
|
8000680: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
|
|
8000684: f443 3300 orr.w r3, r3, #131072 @ 0x20000
|
|
8000688: 60bb str r3, [r7, #8]
|
|
SCB->AIRCR = reg_value;
|
|
800068a: 4a04 ldr r2, [pc, #16] @ (800069c <__NVIC_SetPriorityGrouping+0x44>)
|
|
800068c: 68bb ldr r3, [r7, #8]
|
|
800068e: 60d3 str r3, [r2, #12]
|
|
}
|
|
8000690: bf00 nop
|
|
8000692: 3714 adds r7, #20
|
|
8000694: 46bd mov sp, r7
|
|
8000696: f85d 7b04 ldr.w r7, [sp], #4
|
|
800069a: 4770 bx lr
|
|
800069c: e000ed00 .word 0xe000ed00
|
|
|
|
080006a0 <__NVIC_GetPriorityGrouping>:
|
|
\brief Get Priority Grouping
|
|
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
|
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
|
*/
|
|
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
|
{
|
|
80006a0: b480 push {r7}
|
|
80006a2: af00 add r7, sp, #0
|
|
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
|
80006a4: 4b04 ldr r3, [pc, #16] @ (80006b8 <__NVIC_GetPriorityGrouping+0x18>)
|
|
80006a6: 68db ldr r3, [r3, #12]
|
|
80006a8: 0a1b lsrs r3, r3, #8
|
|
80006aa: f003 0307 and.w r3, r3, #7
|
|
}
|
|
80006ae: 4618 mov r0, r3
|
|
80006b0: 46bd mov sp, r7
|
|
80006b2: f85d 7b04 ldr.w r7, [sp], #4
|
|
80006b6: 4770 bx lr
|
|
80006b8: e000ed00 .word 0xe000ed00
|
|
|
|
080006bc <__NVIC_EnableIRQ>:
|
|
\details Enables a device specific interrupt in the NVIC interrupt controller.
|
|
\param [in] IRQn Device specific interrupt number.
|
|
\note IRQn must not be negative.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
|
|
{
|
|
80006bc: b480 push {r7}
|
|
80006be: b083 sub sp, #12
|
|
80006c0: af00 add r7, sp, #0
|
|
80006c2: 4603 mov r3, r0
|
|
80006c4: 71fb strb r3, [r7, #7]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
80006c6: f997 3007 ldrsb.w r3, [r7, #7]
|
|
80006ca: 2b00 cmp r3, #0
|
|
80006cc: db0b blt.n 80006e6 <__NVIC_EnableIRQ+0x2a>
|
|
{
|
|
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
|
|
80006ce: 79fb ldrb r3, [r7, #7]
|
|
80006d0: f003 021f and.w r2, r3, #31
|
|
80006d4: 4907 ldr r1, [pc, #28] @ (80006f4 <__NVIC_EnableIRQ+0x38>)
|
|
80006d6: f997 3007 ldrsb.w r3, [r7, #7]
|
|
80006da: 095b lsrs r3, r3, #5
|
|
80006dc: 2001 movs r0, #1
|
|
80006de: fa00 f202 lsl.w r2, r0, r2
|
|
80006e2: f841 2023 str.w r2, [r1, r3, lsl #2]
|
|
}
|
|
}
|
|
80006e6: bf00 nop
|
|
80006e8: 370c adds r7, #12
|
|
80006ea: 46bd mov sp, r7
|
|
80006ec: f85d 7b04 ldr.w r7, [sp], #4
|
|
80006f0: 4770 bx lr
|
|
80006f2: bf00 nop
|
|
80006f4: e000e100 .word 0xe000e100
|
|
|
|
080006f8 <__NVIC_SetPriority>:
|
|
\param [in] IRQn Interrupt number.
|
|
\param [in] priority Priority to set.
|
|
\note The priority cannot be set for every processor exception.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
|
{
|
|
80006f8: b480 push {r7}
|
|
80006fa: b083 sub sp, #12
|
|
80006fc: af00 add r7, sp, #0
|
|
80006fe: 4603 mov r3, r0
|
|
8000700: 6039 str r1, [r7, #0]
|
|
8000702: 71fb strb r3, [r7, #7]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
8000704: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8000708: 2b00 cmp r3, #0
|
|
800070a: db0a blt.n 8000722 <__NVIC_SetPriority+0x2a>
|
|
{
|
|
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
800070c: 683b ldr r3, [r7, #0]
|
|
800070e: b2da uxtb r2, r3
|
|
8000710: 490c ldr r1, [pc, #48] @ (8000744 <__NVIC_SetPriority+0x4c>)
|
|
8000712: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8000716: 0112 lsls r2, r2, #4
|
|
8000718: b2d2 uxtb r2, r2
|
|
800071a: 440b add r3, r1
|
|
800071c: f883 2300 strb.w r2, [r3, #768] @ 0x300
|
|
}
|
|
else
|
|
{
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
}
|
|
}
|
|
8000720: e00a b.n 8000738 <__NVIC_SetPriority+0x40>
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
8000722: 683b ldr r3, [r7, #0]
|
|
8000724: b2da uxtb r2, r3
|
|
8000726: 4908 ldr r1, [pc, #32] @ (8000748 <__NVIC_SetPriority+0x50>)
|
|
8000728: 79fb ldrb r3, [r7, #7]
|
|
800072a: f003 030f and.w r3, r3, #15
|
|
800072e: 3b04 subs r3, #4
|
|
8000730: 0112 lsls r2, r2, #4
|
|
8000732: b2d2 uxtb r2, r2
|
|
8000734: 440b add r3, r1
|
|
8000736: 761a strb r2, [r3, #24]
|
|
}
|
|
8000738: bf00 nop
|
|
800073a: 370c adds r7, #12
|
|
800073c: 46bd mov sp, r7
|
|
800073e: f85d 7b04 ldr.w r7, [sp], #4
|
|
8000742: 4770 bx lr
|
|
8000744: e000e100 .word 0xe000e100
|
|
8000748: e000ed00 .word 0xe000ed00
|
|
|
|
0800074c <NVIC_EncodePriority>:
|
|
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
|
\param [in] SubPriority Subpriority value (starting from 0).
|
|
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
|
*/
|
|
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
800074c: b480 push {r7}
|
|
800074e: b089 sub sp, #36 @ 0x24
|
|
8000750: af00 add r7, sp, #0
|
|
8000752: 60f8 str r0, [r7, #12]
|
|
8000754: 60b9 str r1, [r7, #8]
|
|
8000756: 607a str r2, [r7, #4]
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
8000758: 68fb ldr r3, [r7, #12]
|
|
800075a: f003 0307 and.w r3, r3, #7
|
|
800075e: 61fb str r3, [r7, #28]
|
|
uint32_t PreemptPriorityBits;
|
|
uint32_t SubPriorityBits;
|
|
|
|
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
|
8000760: 69fb ldr r3, [r7, #28]
|
|
8000762: f1c3 0307 rsb r3, r3, #7
|
|
8000766: 2b04 cmp r3, #4
|
|
8000768: bf28 it cs
|
|
800076a: 2304 movcs r3, #4
|
|
800076c: 61bb str r3, [r7, #24]
|
|
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
|
800076e: 69fb ldr r3, [r7, #28]
|
|
8000770: 3304 adds r3, #4
|
|
8000772: 2b06 cmp r3, #6
|
|
8000774: d902 bls.n 800077c <NVIC_EncodePriority+0x30>
|
|
8000776: 69fb ldr r3, [r7, #28]
|
|
8000778: 3b03 subs r3, #3
|
|
800077a: e000 b.n 800077e <NVIC_EncodePriority+0x32>
|
|
800077c: 2300 movs r3, #0
|
|
800077e: 617b str r3, [r7, #20]
|
|
|
|
return (
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
8000780: f04f 32ff mov.w r2, #4294967295
|
|
8000784: 69bb ldr r3, [r7, #24]
|
|
8000786: fa02 f303 lsl.w r3, r2, r3
|
|
800078a: 43da mvns r2, r3
|
|
800078c: 68bb ldr r3, [r7, #8]
|
|
800078e: 401a ands r2, r3
|
|
8000790: 697b ldr r3, [r7, #20]
|
|
8000792: 409a lsls r2, r3
|
|
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
|
8000794: f04f 31ff mov.w r1, #4294967295
|
|
8000798: 697b ldr r3, [r7, #20]
|
|
800079a: fa01 f303 lsl.w r3, r1, r3
|
|
800079e: 43d9 mvns r1, r3
|
|
80007a0: 687b ldr r3, [r7, #4]
|
|
80007a2: 400b ands r3, r1
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
80007a4: 4313 orrs r3, r2
|
|
);
|
|
}
|
|
80007a6: 4618 mov r0, r3
|
|
80007a8: 3724 adds r7, #36 @ 0x24
|
|
80007aa: 46bd mov sp, r7
|
|
80007ac: f85d 7b04 ldr.w r7, [sp], #4
|
|
80007b0: 4770 bx lr
|
|
...
|
|
|
|
080007b4 <SysTick_Config>:
|
|
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
|
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
|
must contain a vendor-specific implementation of this function.
|
|
*/
|
|
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
|
{
|
|
80007b4: b580 push {r7, lr}
|
|
80007b6: b082 sub sp, #8
|
|
80007b8: af00 add r7, sp, #0
|
|
80007ba: 6078 str r0, [r7, #4]
|
|
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
|
80007bc: 687b ldr r3, [r7, #4]
|
|
80007be: 3b01 subs r3, #1
|
|
80007c0: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
|
|
80007c4: d301 bcc.n 80007ca <SysTick_Config+0x16>
|
|
{
|
|
return (1UL); /* Reload value impossible */
|
|
80007c6: 2301 movs r3, #1
|
|
80007c8: e00f b.n 80007ea <SysTick_Config+0x36>
|
|
}
|
|
|
|
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
|
80007ca: 4a0a ldr r2, [pc, #40] @ (80007f4 <SysTick_Config+0x40>)
|
|
80007cc: 687b ldr r3, [r7, #4]
|
|
80007ce: 3b01 subs r3, #1
|
|
80007d0: 6053 str r3, [r2, #4]
|
|
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
|
80007d2: 210f movs r1, #15
|
|
80007d4: f04f 30ff mov.w r0, #4294967295
|
|
80007d8: f7ff ff8e bl 80006f8 <__NVIC_SetPriority>
|
|
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
|
80007dc: 4b05 ldr r3, [pc, #20] @ (80007f4 <SysTick_Config+0x40>)
|
|
80007de: 2200 movs r2, #0
|
|
80007e0: 609a str r2, [r3, #8]
|
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
|
80007e2: 4b04 ldr r3, [pc, #16] @ (80007f4 <SysTick_Config+0x40>)
|
|
80007e4: 2207 movs r2, #7
|
|
80007e6: 601a str r2, [r3, #0]
|
|
SysTick_CTRL_TICKINT_Msk |
|
|
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
|
return (0UL); /* Function successful */
|
|
80007e8: 2300 movs r3, #0
|
|
}
|
|
80007ea: 4618 mov r0, r3
|
|
80007ec: 3708 adds r7, #8
|
|
80007ee: 46bd mov sp, r7
|
|
80007f0: bd80 pop {r7, pc}
|
|
80007f2: bf00 nop
|
|
80007f4: e000e010 .word 0xe000e010
|
|
|
|
080007f8 <HAL_NVIC_SetPriorityGrouping>:
|
|
* @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
|
|
* The pending IRQ priority will be managed only by the subpriority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
|
{
|
|
80007f8: b580 push {r7, lr}
|
|
80007fa: b082 sub sp, #8
|
|
80007fc: af00 add r7, sp, #0
|
|
80007fe: 6078 str r0, [r7, #4]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
|
|
|
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
|
NVIC_SetPriorityGrouping(PriorityGroup);
|
|
8000800: 6878 ldr r0, [r7, #4]
|
|
8000802: f7ff ff29 bl 8000658 <__NVIC_SetPriorityGrouping>
|
|
}
|
|
8000806: bf00 nop
|
|
8000808: 3708 adds r7, #8
|
|
800080a: 46bd mov sp, r7
|
|
800080c: bd80 pop {r7, pc}
|
|
|
|
0800080e <HAL_NVIC_SetPriority>:
|
|
* This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Priority_Table
|
|
* A lower priority value indicates a higher priority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
800080e: b580 push {r7, lr}
|
|
8000810: b086 sub sp, #24
|
|
8000812: af00 add r7, sp, #0
|
|
8000814: 4603 mov r3, r0
|
|
8000816: 60b9 str r1, [r7, #8]
|
|
8000818: 607a str r2, [r7, #4]
|
|
800081a: 73fb strb r3, [r7, #15]
|
|
uint32_t prioritygroup = 0x00U;
|
|
800081c: 2300 movs r3, #0
|
|
800081e: 617b str r3, [r7, #20]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
|
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
|
|
|
prioritygroup = NVIC_GetPriorityGrouping();
|
|
8000820: f7ff ff3e bl 80006a0 <__NVIC_GetPriorityGrouping>
|
|
8000824: 6178 str r0, [r7, #20]
|
|
|
|
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
|
8000826: 687a ldr r2, [r7, #4]
|
|
8000828: 68b9 ldr r1, [r7, #8]
|
|
800082a: 6978 ldr r0, [r7, #20]
|
|
800082c: f7ff ff8e bl 800074c <NVIC_EncodePriority>
|
|
8000830: 4602 mov r2, r0
|
|
8000832: f997 300f ldrsb.w r3, [r7, #15]
|
|
8000836: 4611 mov r1, r2
|
|
8000838: 4618 mov r0, r3
|
|
800083a: f7ff ff5d bl 80006f8 <__NVIC_SetPriority>
|
|
}
|
|
800083e: bf00 nop
|
|
8000840: 3718 adds r7, #24
|
|
8000842: 46bd mov sp, r7
|
|
8000844: bd80 pop {r7, pc}
|
|
|
|
08000846 <HAL_NVIC_EnableIRQ>:
|
|
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
|
|
{
|
|
8000846: b580 push {r7, lr}
|
|
8000848: b082 sub sp, #8
|
|
800084a: af00 add r7, sp, #0
|
|
800084c: 4603 mov r3, r0
|
|
800084e: 71fb strb r3, [r7, #7]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
|
|
|
|
/* Enable interrupt */
|
|
NVIC_EnableIRQ(IRQn);
|
|
8000850: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8000854: 4618 mov r0, r3
|
|
8000856: f7ff ff31 bl 80006bc <__NVIC_EnableIRQ>
|
|
}
|
|
800085a: bf00 nop
|
|
800085c: 3708 adds r7, #8
|
|
800085e: 46bd mov sp, r7
|
|
8000860: bd80 pop {r7, pc}
|
|
|
|
08000862 <HAL_SYSTICK_Config>:
|
|
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
|
|
* @retval status: - 0 Function succeeded.
|
|
* - 1 Function failed.
|
|
*/
|
|
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|
{
|
|
8000862: b580 push {r7, lr}
|
|
8000864: b082 sub sp, #8
|
|
8000866: af00 add r7, sp, #0
|
|
8000868: 6078 str r0, [r7, #4]
|
|
return SysTick_Config(TicksNumb);
|
|
800086a: 6878 ldr r0, [r7, #4]
|
|
800086c: f7ff ffa2 bl 80007b4 <SysTick_Config>
|
|
8000870: 4603 mov r3, r0
|
|
}
|
|
8000872: 4618 mov r0, r3
|
|
8000874: 3708 adds r7, #8
|
|
8000876: 46bd mov sp, r7
|
|
8000878: bd80 pop {r7, pc}
|
|
...
|
|
|
|
0800087c <HAL_GPIO_Init>:
|
|
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
|
|
* the configuration information for the specified GPIO peripheral.
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
|
{
|
|
800087c: b480 push {r7}
|
|
800087e: b087 sub sp, #28
|
|
8000880: af00 add r7, sp, #0
|
|
8000882: 6078 str r0, [r7, #4]
|
|
8000884: 6039 str r1, [r7, #0]
|
|
uint32_t position = 0x00u;
|
|
8000886: 2300 movs r3, #0
|
|
8000888: 617b str r3, [r7, #20]
|
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
|
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
|
|
|
/* Configure the port pins */
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
800088a: e14e b.n 8000b2a <HAL_GPIO_Init+0x2ae>
|
|
{
|
|
/* Get current io position */
|
|
iocurrent = (GPIO_Init->Pin) & (1uL << position);
|
|
800088c: 683b ldr r3, [r7, #0]
|
|
800088e: 681a ldr r2, [r3, #0]
|
|
8000890: 2101 movs r1, #1
|
|
8000892: 697b ldr r3, [r7, #20]
|
|
8000894: fa01 f303 lsl.w r3, r1, r3
|
|
8000898: 4013 ands r3, r2
|
|
800089a: 60fb str r3, [r7, #12]
|
|
|
|
if (iocurrent != 0x00u)
|
|
800089c: 68fb ldr r3, [r7, #12]
|
|
800089e: 2b00 cmp r3, #0
|
|
80008a0: f000 8140 beq.w 8000b24 <HAL_GPIO_Init+0x2a8>
|
|
{
|
|
/*--------------------- GPIO Mode Configuration ------------------------*/
|
|
/* In case of Output or Alternate function mode selection */
|
|
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
|
|
80008a4: 683b ldr r3, [r7, #0]
|
|
80008a6: 685b ldr r3, [r3, #4]
|
|
80008a8: f003 0303 and.w r3, r3, #3
|
|
80008ac: 2b01 cmp r3, #1
|
|
80008ae: d005 beq.n 80008bc <HAL_GPIO_Init+0x40>
|
|
80008b0: 683b ldr r3, [r7, #0]
|
|
80008b2: 685b ldr r3, [r3, #4]
|
|
80008b4: f003 0303 and.w r3, r3, #3
|
|
80008b8: 2b02 cmp r3, #2
|
|
80008ba: d130 bne.n 800091e <HAL_GPIO_Init+0xa2>
|
|
{
|
|
/* Check the Speed parameter */
|
|
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
|
|
/* Configure the IO Speed */
|
|
temp = GPIOx->OSPEEDR;
|
|
80008bc: 687b ldr r3, [r7, #4]
|
|
80008be: 689b ldr r3, [r3, #8]
|
|
80008c0: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u));
|
|
80008c2: 697b ldr r3, [r7, #20]
|
|
80008c4: 005b lsls r3, r3, #1
|
|
80008c6: 2203 movs r2, #3
|
|
80008c8: fa02 f303 lsl.w r3, r2, r3
|
|
80008cc: 43db mvns r3, r3
|
|
80008ce: 693a ldr r2, [r7, #16]
|
|
80008d0: 4013 ands r3, r2
|
|
80008d2: 613b str r3, [r7, #16]
|
|
temp |= (GPIO_Init->Speed << (position * 2u));
|
|
80008d4: 683b ldr r3, [r7, #0]
|
|
80008d6: 68da ldr r2, [r3, #12]
|
|
80008d8: 697b ldr r3, [r7, #20]
|
|
80008da: 005b lsls r3, r3, #1
|
|
80008dc: fa02 f303 lsl.w r3, r2, r3
|
|
80008e0: 693a ldr r2, [r7, #16]
|
|
80008e2: 4313 orrs r3, r2
|
|
80008e4: 613b str r3, [r7, #16]
|
|
GPIOx->OSPEEDR = temp;
|
|
80008e6: 687b ldr r3, [r7, #4]
|
|
80008e8: 693a ldr r2, [r7, #16]
|
|
80008ea: 609a str r2, [r3, #8]
|
|
|
|
/* Configure the IO Output Type */
|
|
temp = GPIOx->OTYPER;
|
|
80008ec: 687b ldr r3, [r7, #4]
|
|
80008ee: 685b ldr r3, [r3, #4]
|
|
80008f0: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
|
|
80008f2: 2201 movs r2, #1
|
|
80008f4: 697b ldr r3, [r7, #20]
|
|
80008f6: fa02 f303 lsl.w r3, r2, r3
|
|
80008fa: 43db mvns r3, r3
|
|
80008fc: 693a ldr r2, [r7, #16]
|
|
80008fe: 4013 ands r3, r2
|
|
8000900: 613b str r3, [r7, #16]
|
|
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
|
|
8000902: 683b ldr r3, [r7, #0]
|
|
8000904: 685b ldr r3, [r3, #4]
|
|
8000906: 091b lsrs r3, r3, #4
|
|
8000908: f003 0201 and.w r2, r3, #1
|
|
800090c: 697b ldr r3, [r7, #20]
|
|
800090e: fa02 f303 lsl.w r3, r2, r3
|
|
8000912: 693a ldr r2, [r7, #16]
|
|
8000914: 4313 orrs r3, r2
|
|
8000916: 613b str r3, [r7, #16]
|
|
GPIOx->OTYPER = temp;
|
|
8000918: 687b ldr r3, [r7, #4]
|
|
800091a: 693a ldr r2, [r7, #16]
|
|
800091c: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
|
|
800091e: 683b ldr r3, [r7, #0]
|
|
8000920: 685b ldr r3, [r3, #4]
|
|
8000922: f003 0303 and.w r3, r3, #3
|
|
8000926: 2b03 cmp r3, #3
|
|
8000928: d017 beq.n 800095a <HAL_GPIO_Init+0xde>
|
|
{
|
|
/* Check the Pull parameter */
|
|
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
|
|
|
|
/* Activate the Pull-up or Pull down resistor for the current IO */
|
|
temp = GPIOx->PUPDR;
|
|
800092a: 687b ldr r3, [r7, #4]
|
|
800092c: 68db ldr r3, [r3, #12]
|
|
800092e: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u));
|
|
8000930: 697b ldr r3, [r7, #20]
|
|
8000932: 005b lsls r3, r3, #1
|
|
8000934: 2203 movs r2, #3
|
|
8000936: fa02 f303 lsl.w r3, r2, r3
|
|
800093a: 43db mvns r3, r3
|
|
800093c: 693a ldr r2, [r7, #16]
|
|
800093e: 4013 ands r3, r2
|
|
8000940: 613b str r3, [r7, #16]
|
|
temp |= ((GPIO_Init->Pull) << (position * 2u));
|
|
8000942: 683b ldr r3, [r7, #0]
|
|
8000944: 689a ldr r2, [r3, #8]
|
|
8000946: 697b ldr r3, [r7, #20]
|
|
8000948: 005b lsls r3, r3, #1
|
|
800094a: fa02 f303 lsl.w r3, r2, r3
|
|
800094e: 693a ldr r2, [r7, #16]
|
|
8000950: 4313 orrs r3, r2
|
|
8000952: 613b str r3, [r7, #16]
|
|
GPIOx->PUPDR = temp;
|
|
8000954: 687b ldr r3, [r7, #4]
|
|
8000956: 693a ldr r2, [r7, #16]
|
|
8000958: 60da str r2, [r3, #12]
|
|
}
|
|
|
|
/*--------------------- GPIO Mode Configuration ------------------------*/
|
|
/* In case of Alternate function mode selection */
|
|
if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
|
|
800095a: 683b ldr r3, [r7, #0]
|
|
800095c: 685b ldr r3, [r3, #4]
|
|
800095e: f003 0303 and.w r3, r3, #3
|
|
8000962: 2b02 cmp r3, #2
|
|
8000964: d123 bne.n 80009ae <HAL_GPIO_Init+0x132>
|
|
/* Check the Alternate function parameters */
|
|
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
|
|
|
|
/* Configure Alternate function mapped with the current IO */
|
|
temp = GPIOx->AFR[position >> 3u];
|
|
8000966: 697b ldr r3, [r7, #20]
|
|
8000968: 08da lsrs r2, r3, #3
|
|
800096a: 687b ldr r3, [r7, #4]
|
|
800096c: 3208 adds r2, #8
|
|
800096e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
|
8000972: 613b str r3, [r7, #16]
|
|
temp &= ~(0xFu << ((position & 0x07u) * 4u));
|
|
8000974: 697b ldr r3, [r7, #20]
|
|
8000976: f003 0307 and.w r3, r3, #7
|
|
800097a: 009b lsls r3, r3, #2
|
|
800097c: 220f movs r2, #15
|
|
800097e: fa02 f303 lsl.w r3, r2, r3
|
|
8000982: 43db mvns r3, r3
|
|
8000984: 693a ldr r2, [r7, #16]
|
|
8000986: 4013 ands r3, r2
|
|
8000988: 613b str r3, [r7, #16]
|
|
temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u));
|
|
800098a: 683b ldr r3, [r7, #0]
|
|
800098c: 691a ldr r2, [r3, #16]
|
|
800098e: 697b ldr r3, [r7, #20]
|
|
8000990: f003 0307 and.w r3, r3, #7
|
|
8000994: 009b lsls r3, r3, #2
|
|
8000996: fa02 f303 lsl.w r3, r2, r3
|
|
800099a: 693a ldr r2, [r7, #16]
|
|
800099c: 4313 orrs r3, r2
|
|
800099e: 613b str r3, [r7, #16]
|
|
GPIOx->AFR[position >> 3u] = temp;
|
|
80009a0: 697b ldr r3, [r7, #20]
|
|
80009a2: 08da lsrs r2, r3, #3
|
|
80009a4: 687b ldr r3, [r7, #4]
|
|
80009a6: 3208 adds r2, #8
|
|
80009a8: 6939 ldr r1, [r7, #16]
|
|
80009aa: f843 1022 str.w r1, [r3, r2, lsl #2]
|
|
}
|
|
|
|
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
|
|
temp = GPIOx->MODER;
|
|
80009ae: 687b ldr r3, [r7, #4]
|
|
80009b0: 681b ldr r3, [r3, #0]
|
|
80009b2: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_MODER_MODER0 << (position * 2u));
|
|
80009b4: 697b ldr r3, [r7, #20]
|
|
80009b6: 005b lsls r3, r3, #1
|
|
80009b8: 2203 movs r2, #3
|
|
80009ba: fa02 f303 lsl.w r3, r2, r3
|
|
80009be: 43db mvns r3, r3
|
|
80009c0: 693a ldr r2, [r7, #16]
|
|
80009c2: 4013 ands r3, r2
|
|
80009c4: 613b str r3, [r7, #16]
|
|
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u));
|
|
80009c6: 683b ldr r3, [r7, #0]
|
|
80009c8: 685b ldr r3, [r3, #4]
|
|
80009ca: f003 0203 and.w r2, r3, #3
|
|
80009ce: 697b ldr r3, [r7, #20]
|
|
80009d0: 005b lsls r3, r3, #1
|
|
80009d2: fa02 f303 lsl.w r3, r2, r3
|
|
80009d6: 693a ldr r2, [r7, #16]
|
|
80009d8: 4313 orrs r3, r2
|
|
80009da: 613b str r3, [r7, #16]
|
|
GPIOx->MODER = temp;
|
|
80009dc: 687b ldr r3, [r7, #4]
|
|
80009de: 693a ldr r2, [r7, #16]
|
|
80009e0: 601a str r2, [r3, #0]
|
|
|
|
/*--------------------- EXTI Mode Configuration ------------------------*/
|
|
/* Configure the External Interrupt or event for the current IO */
|
|
if((GPIO_Init->Mode & EXTI_MODE) != 0x00u)
|
|
80009e2: 683b ldr r3, [r7, #0]
|
|
80009e4: 685b ldr r3, [r3, #4]
|
|
80009e6: f403 3340 and.w r3, r3, #196608 @ 0x30000
|
|
80009ea: 2b00 cmp r3, #0
|
|
80009ec: f000 809a beq.w 8000b24 <HAL_GPIO_Init+0x2a8>
|
|
{
|
|
/* Enable SYSCFG Clock */
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
80009f0: 4b55 ldr r3, [pc, #340] @ (8000b48 <HAL_GPIO_Init+0x2cc>)
|
|
80009f2: 699b ldr r3, [r3, #24]
|
|
80009f4: 4a54 ldr r2, [pc, #336] @ (8000b48 <HAL_GPIO_Init+0x2cc>)
|
|
80009f6: f043 0301 orr.w r3, r3, #1
|
|
80009fa: 6193 str r3, [r2, #24]
|
|
80009fc: 4b52 ldr r3, [pc, #328] @ (8000b48 <HAL_GPIO_Init+0x2cc>)
|
|
80009fe: 699b ldr r3, [r3, #24]
|
|
8000a00: f003 0301 and.w r3, r3, #1
|
|
8000a04: 60bb str r3, [r7, #8]
|
|
8000a06: 68bb ldr r3, [r7, #8]
|
|
|
|
temp = SYSCFG->EXTICR[position >> 2u];
|
|
8000a08: 4a50 ldr r2, [pc, #320] @ (8000b4c <HAL_GPIO_Init+0x2d0>)
|
|
8000a0a: 697b ldr r3, [r7, #20]
|
|
8000a0c: 089b lsrs r3, r3, #2
|
|
8000a0e: 3302 adds r3, #2
|
|
8000a10: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
|
8000a14: 613b str r3, [r7, #16]
|
|
temp &= ~(0x0FuL << (4u * (position & 0x03u)));
|
|
8000a16: 697b ldr r3, [r7, #20]
|
|
8000a18: f003 0303 and.w r3, r3, #3
|
|
8000a1c: 009b lsls r3, r3, #2
|
|
8000a1e: 220f movs r2, #15
|
|
8000a20: fa02 f303 lsl.w r3, r2, r3
|
|
8000a24: 43db mvns r3, r3
|
|
8000a26: 693a ldr r2, [r7, #16]
|
|
8000a28: 4013 ands r3, r2
|
|
8000a2a: 613b str r3, [r7, #16]
|
|
temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)));
|
|
8000a2c: 687b ldr r3, [r7, #4]
|
|
8000a2e: f1b3 4f90 cmp.w r3, #1207959552 @ 0x48000000
|
|
8000a32: d013 beq.n 8000a5c <HAL_GPIO_Init+0x1e0>
|
|
8000a34: 687b ldr r3, [r7, #4]
|
|
8000a36: 4a46 ldr r2, [pc, #280] @ (8000b50 <HAL_GPIO_Init+0x2d4>)
|
|
8000a38: 4293 cmp r3, r2
|
|
8000a3a: d00d beq.n 8000a58 <HAL_GPIO_Init+0x1dc>
|
|
8000a3c: 687b ldr r3, [r7, #4]
|
|
8000a3e: 4a45 ldr r2, [pc, #276] @ (8000b54 <HAL_GPIO_Init+0x2d8>)
|
|
8000a40: 4293 cmp r3, r2
|
|
8000a42: d007 beq.n 8000a54 <HAL_GPIO_Init+0x1d8>
|
|
8000a44: 687b ldr r3, [r7, #4]
|
|
8000a46: 4a44 ldr r2, [pc, #272] @ (8000b58 <HAL_GPIO_Init+0x2dc>)
|
|
8000a48: 4293 cmp r3, r2
|
|
8000a4a: d101 bne.n 8000a50 <HAL_GPIO_Init+0x1d4>
|
|
8000a4c: 2303 movs r3, #3
|
|
8000a4e: e006 b.n 8000a5e <HAL_GPIO_Init+0x1e2>
|
|
8000a50: 2305 movs r3, #5
|
|
8000a52: e004 b.n 8000a5e <HAL_GPIO_Init+0x1e2>
|
|
8000a54: 2302 movs r3, #2
|
|
8000a56: e002 b.n 8000a5e <HAL_GPIO_Init+0x1e2>
|
|
8000a58: 2301 movs r3, #1
|
|
8000a5a: e000 b.n 8000a5e <HAL_GPIO_Init+0x1e2>
|
|
8000a5c: 2300 movs r3, #0
|
|
8000a5e: 697a ldr r2, [r7, #20]
|
|
8000a60: f002 0203 and.w r2, r2, #3
|
|
8000a64: 0092 lsls r2, r2, #2
|
|
8000a66: 4093 lsls r3, r2
|
|
8000a68: 693a ldr r2, [r7, #16]
|
|
8000a6a: 4313 orrs r3, r2
|
|
8000a6c: 613b str r3, [r7, #16]
|
|
SYSCFG->EXTICR[position >> 2u] = temp;
|
|
8000a6e: 4937 ldr r1, [pc, #220] @ (8000b4c <HAL_GPIO_Init+0x2d0>)
|
|
8000a70: 697b ldr r3, [r7, #20]
|
|
8000a72: 089b lsrs r3, r3, #2
|
|
8000a74: 3302 adds r3, #2
|
|
8000a76: 693a ldr r2, [r7, #16]
|
|
8000a78: f841 2023 str.w r2, [r1, r3, lsl #2]
|
|
|
|
/* Clear Rising Falling edge configuration */
|
|
temp = EXTI->RTSR;
|
|
8000a7c: 4b37 ldr r3, [pc, #220] @ (8000b5c <HAL_GPIO_Init+0x2e0>)
|
|
8000a7e: 689b ldr r3, [r3, #8]
|
|
8000a80: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8000a82: 68fb ldr r3, [r7, #12]
|
|
8000a84: 43db mvns r3, r3
|
|
8000a86: 693a ldr r2, [r7, #16]
|
|
8000a88: 4013 ands r3, r2
|
|
8000a8a: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u)
|
|
8000a8c: 683b ldr r3, [r7, #0]
|
|
8000a8e: 685b ldr r3, [r3, #4]
|
|
8000a90: f403 1380 and.w r3, r3, #1048576 @ 0x100000
|
|
8000a94: 2b00 cmp r3, #0
|
|
8000a96: d003 beq.n 8000aa0 <HAL_GPIO_Init+0x224>
|
|
{
|
|
temp |= iocurrent;
|
|
8000a98: 693a ldr r2, [r7, #16]
|
|
8000a9a: 68fb ldr r3, [r7, #12]
|
|
8000a9c: 4313 orrs r3, r2
|
|
8000a9e: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->RTSR = temp;
|
|
8000aa0: 4a2e ldr r2, [pc, #184] @ (8000b5c <HAL_GPIO_Init+0x2e0>)
|
|
8000aa2: 693b ldr r3, [r7, #16]
|
|
8000aa4: 6093 str r3, [r2, #8]
|
|
|
|
temp = EXTI->FTSR;
|
|
8000aa6: 4b2d ldr r3, [pc, #180] @ (8000b5c <HAL_GPIO_Init+0x2e0>)
|
|
8000aa8: 68db ldr r3, [r3, #12]
|
|
8000aaa: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8000aac: 68fb ldr r3, [r7, #12]
|
|
8000aae: 43db mvns r3, r3
|
|
8000ab0: 693a ldr r2, [r7, #16]
|
|
8000ab2: 4013 ands r3, r2
|
|
8000ab4: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u)
|
|
8000ab6: 683b ldr r3, [r7, #0]
|
|
8000ab8: 685b ldr r3, [r3, #4]
|
|
8000aba: f403 1300 and.w r3, r3, #2097152 @ 0x200000
|
|
8000abe: 2b00 cmp r3, #0
|
|
8000ac0: d003 beq.n 8000aca <HAL_GPIO_Init+0x24e>
|
|
{
|
|
temp |= iocurrent;
|
|
8000ac2: 693a ldr r2, [r7, #16]
|
|
8000ac4: 68fb ldr r3, [r7, #12]
|
|
8000ac6: 4313 orrs r3, r2
|
|
8000ac8: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->FTSR = temp;
|
|
8000aca: 4a24 ldr r2, [pc, #144] @ (8000b5c <HAL_GPIO_Init+0x2e0>)
|
|
8000acc: 693b ldr r3, [r7, #16]
|
|
8000ace: 60d3 str r3, [r2, #12]
|
|
|
|
temp = EXTI->EMR;
|
|
8000ad0: 4b22 ldr r3, [pc, #136] @ (8000b5c <HAL_GPIO_Init+0x2e0>)
|
|
8000ad2: 685b ldr r3, [r3, #4]
|
|
8000ad4: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8000ad6: 68fb ldr r3, [r7, #12]
|
|
8000ad8: 43db mvns r3, r3
|
|
8000ada: 693a ldr r2, [r7, #16]
|
|
8000adc: 4013 ands r3, r2
|
|
8000ade: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
|
|
8000ae0: 683b ldr r3, [r7, #0]
|
|
8000ae2: 685b ldr r3, [r3, #4]
|
|
8000ae4: f403 3300 and.w r3, r3, #131072 @ 0x20000
|
|
8000ae8: 2b00 cmp r3, #0
|
|
8000aea: d003 beq.n 8000af4 <HAL_GPIO_Init+0x278>
|
|
{
|
|
temp |= iocurrent;
|
|
8000aec: 693a ldr r2, [r7, #16]
|
|
8000aee: 68fb ldr r3, [r7, #12]
|
|
8000af0: 4313 orrs r3, r2
|
|
8000af2: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->EMR = temp;
|
|
8000af4: 4a19 ldr r2, [pc, #100] @ (8000b5c <HAL_GPIO_Init+0x2e0>)
|
|
8000af6: 693b ldr r3, [r7, #16]
|
|
8000af8: 6053 str r3, [r2, #4]
|
|
|
|
/* Clear EXTI line configuration */
|
|
temp = EXTI->IMR;
|
|
8000afa: 4b18 ldr r3, [pc, #96] @ (8000b5c <HAL_GPIO_Init+0x2e0>)
|
|
8000afc: 681b ldr r3, [r3, #0]
|
|
8000afe: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8000b00: 68fb ldr r3, [r7, #12]
|
|
8000b02: 43db mvns r3, r3
|
|
8000b04: 693a ldr r2, [r7, #16]
|
|
8000b06: 4013 ands r3, r2
|
|
8000b08: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & EXTI_IT) != 0x00u)
|
|
8000b0a: 683b ldr r3, [r7, #0]
|
|
8000b0c: 685b ldr r3, [r3, #4]
|
|
8000b0e: f403 3380 and.w r3, r3, #65536 @ 0x10000
|
|
8000b12: 2b00 cmp r3, #0
|
|
8000b14: d003 beq.n 8000b1e <HAL_GPIO_Init+0x2a2>
|
|
{
|
|
temp |= iocurrent;
|
|
8000b16: 693a ldr r2, [r7, #16]
|
|
8000b18: 68fb ldr r3, [r7, #12]
|
|
8000b1a: 4313 orrs r3, r2
|
|
8000b1c: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->IMR = temp;
|
|
8000b1e: 4a0f ldr r2, [pc, #60] @ (8000b5c <HAL_GPIO_Init+0x2e0>)
|
|
8000b20: 693b ldr r3, [r7, #16]
|
|
8000b22: 6013 str r3, [r2, #0]
|
|
}
|
|
}
|
|
|
|
position++;
|
|
8000b24: 697b ldr r3, [r7, #20]
|
|
8000b26: 3301 adds r3, #1
|
|
8000b28: 617b str r3, [r7, #20]
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
8000b2a: 683b ldr r3, [r7, #0]
|
|
8000b2c: 681a ldr r2, [r3, #0]
|
|
8000b2e: 697b ldr r3, [r7, #20]
|
|
8000b30: fa22 f303 lsr.w r3, r2, r3
|
|
8000b34: 2b00 cmp r3, #0
|
|
8000b36: f47f aea9 bne.w 800088c <HAL_GPIO_Init+0x10>
|
|
}
|
|
}
|
|
8000b3a: bf00 nop
|
|
8000b3c: bf00 nop
|
|
8000b3e: 371c adds r7, #28
|
|
8000b40: 46bd mov sp, r7
|
|
8000b42: f85d 7b04 ldr.w r7, [sp], #4
|
|
8000b46: 4770 bx lr
|
|
8000b48: 40021000 .word 0x40021000
|
|
8000b4c: 40010000 .word 0x40010000
|
|
8000b50: 48000400 .word 0x48000400
|
|
8000b54: 48000800 .word 0x48000800
|
|
8000b58: 48000c00 .word 0x48000c00
|
|
8000b5c: 40010400 .word 0x40010400
|
|
|
|
08000b60 <HAL_PCD_Init>:
|
|
* parameters in the PCD_InitTypeDef and initialize the associated handle.
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
8000b60: b5f0 push {r4, r5, r6, r7, lr}
|
|
8000b62: b08b sub sp, #44 @ 0x2c
|
|
8000b64: af06 add r7, sp, #24
|
|
8000b66: 6078 str r0, [r7, #4]
|
|
uint8_t i;
|
|
|
|
/* Check the PCD handle allocation */
|
|
if (hpcd == NULL)
|
|
8000b68: 687b ldr r3, [r7, #4]
|
|
8000b6a: 2b00 cmp r3, #0
|
|
8000b6c: d101 bne.n 8000b72 <HAL_PCD_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8000b6e: 2301 movs r3, #1
|
|
8000b70: e0c4 b.n 8000cfc <HAL_PCD_Init+0x19c>
|
|
}
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
|
|
|
|
if (hpcd->State == HAL_PCD_STATE_RESET)
|
|
8000b72: 687b ldr r3, [r7, #4]
|
|
8000b74: f893 32a9 ldrb.w r3, [r3, #681] @ 0x2a9
|
|
8000b78: b2db uxtb r3, r3
|
|
8000b7a: 2b00 cmp r3, #0
|
|
8000b7c: d106 bne.n 8000b8c <HAL_PCD_Init+0x2c>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hpcd->Lock = HAL_UNLOCKED;
|
|
8000b7e: 687b ldr r3, [r7, #4]
|
|
8000b80: 2200 movs r2, #0
|
|
8000b82: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
|
|
/* Init the low level hardware */
|
|
hpcd->MspInitCallback(hpcd);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|
HAL_PCD_MspInit(hpcd);
|
|
8000b86: 6878 ldr r0, [r7, #4]
|
|
8000b88: f007 fd28 bl 80085dc <HAL_PCD_MspInit>
|
|
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
|
|
}
|
|
|
|
hpcd->State = HAL_PCD_STATE_BUSY;
|
|
8000b8c: 687b ldr r3, [r7, #4]
|
|
8000b8e: 2203 movs r2, #3
|
|
8000b90: f883 22a9 strb.w r2, [r3, #681] @ 0x2a9
|
|
|
|
/* Disable the Interrupts */
|
|
__HAL_PCD_DISABLE(hpcd);
|
|
8000b94: 687b ldr r3, [r7, #4]
|
|
8000b96: 681b ldr r3, [r3, #0]
|
|
8000b98: 4618 mov r0, r3
|
|
8000b9a: f003 fc5b bl 8004454 <USB_DisableGlobalInt>
|
|
|
|
/* Init endpoints structures */
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
8000b9e: 2300 movs r3, #0
|
|
8000ba0: 73fb strb r3, [r7, #15]
|
|
8000ba2: e040 b.n 8000c26 <HAL_PCD_Init+0xc6>
|
|
{
|
|
/* Init ep structure */
|
|
hpcd->IN_ep[i].is_in = 1U;
|
|
8000ba4: 7bfb ldrb r3, [r7, #15]
|
|
8000ba6: 6879 ldr r1, [r7, #4]
|
|
8000ba8: 1c5a adds r2, r3, #1
|
|
8000baa: 4613 mov r3, r2
|
|
8000bac: 009b lsls r3, r3, #2
|
|
8000bae: 4413 add r3, r2
|
|
8000bb0: 00db lsls r3, r3, #3
|
|
8000bb2: 440b add r3, r1
|
|
8000bb4: 3301 adds r3, #1
|
|
8000bb6: 2201 movs r2, #1
|
|
8000bb8: 701a strb r2, [r3, #0]
|
|
hpcd->IN_ep[i].num = i;
|
|
8000bba: 7bfb ldrb r3, [r7, #15]
|
|
8000bbc: 6879 ldr r1, [r7, #4]
|
|
8000bbe: 1c5a adds r2, r3, #1
|
|
8000bc0: 4613 mov r3, r2
|
|
8000bc2: 009b lsls r3, r3, #2
|
|
8000bc4: 4413 add r3, r2
|
|
8000bc6: 00db lsls r3, r3, #3
|
|
8000bc8: 440b add r3, r1
|
|
8000bca: 7bfa ldrb r2, [r7, #15]
|
|
8000bcc: 701a strb r2, [r3, #0]
|
|
/* Control until ep is activated */
|
|
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
|
|
8000bce: 7bfb ldrb r3, [r7, #15]
|
|
8000bd0: 6879 ldr r1, [r7, #4]
|
|
8000bd2: 1c5a adds r2, r3, #1
|
|
8000bd4: 4613 mov r3, r2
|
|
8000bd6: 009b lsls r3, r3, #2
|
|
8000bd8: 4413 add r3, r2
|
|
8000bda: 00db lsls r3, r3, #3
|
|
8000bdc: 440b add r3, r1
|
|
8000bde: 3303 adds r3, #3
|
|
8000be0: 2200 movs r2, #0
|
|
8000be2: 701a strb r2, [r3, #0]
|
|
hpcd->IN_ep[i].maxpacket = 0U;
|
|
8000be4: 7bfa ldrb r2, [r7, #15]
|
|
8000be6: 6879 ldr r1, [r7, #4]
|
|
8000be8: 4613 mov r3, r2
|
|
8000bea: 009b lsls r3, r3, #2
|
|
8000bec: 4413 add r3, r2
|
|
8000bee: 00db lsls r3, r3, #3
|
|
8000bf0: 440b add r3, r1
|
|
8000bf2: 3338 adds r3, #56 @ 0x38
|
|
8000bf4: 2200 movs r2, #0
|
|
8000bf6: 601a str r2, [r3, #0]
|
|
hpcd->IN_ep[i].xfer_buff = 0U;
|
|
8000bf8: 7bfa ldrb r2, [r7, #15]
|
|
8000bfa: 6879 ldr r1, [r7, #4]
|
|
8000bfc: 4613 mov r3, r2
|
|
8000bfe: 009b lsls r3, r3, #2
|
|
8000c00: 4413 add r3, r2
|
|
8000c02: 00db lsls r3, r3, #3
|
|
8000c04: 440b add r3, r1
|
|
8000c06: 333c adds r3, #60 @ 0x3c
|
|
8000c08: 2200 movs r2, #0
|
|
8000c0a: 601a str r2, [r3, #0]
|
|
hpcd->IN_ep[i].xfer_len = 0U;
|
|
8000c0c: 7bfa ldrb r2, [r7, #15]
|
|
8000c0e: 6879 ldr r1, [r7, #4]
|
|
8000c10: 4613 mov r3, r2
|
|
8000c12: 009b lsls r3, r3, #2
|
|
8000c14: 4413 add r3, r2
|
|
8000c16: 00db lsls r3, r3, #3
|
|
8000c18: 440b add r3, r1
|
|
8000c1a: 3340 adds r3, #64 @ 0x40
|
|
8000c1c: 2200 movs r2, #0
|
|
8000c1e: 601a str r2, [r3, #0]
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
8000c20: 7bfb ldrb r3, [r7, #15]
|
|
8000c22: 3301 adds r3, #1
|
|
8000c24: 73fb strb r3, [r7, #15]
|
|
8000c26: 7bfa ldrb r2, [r7, #15]
|
|
8000c28: 687b ldr r3, [r7, #4]
|
|
8000c2a: 685b ldr r3, [r3, #4]
|
|
8000c2c: 429a cmp r2, r3
|
|
8000c2e: d3b9 bcc.n 8000ba4 <HAL_PCD_Init+0x44>
|
|
}
|
|
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
8000c30: 2300 movs r3, #0
|
|
8000c32: 73fb strb r3, [r7, #15]
|
|
8000c34: e044 b.n 8000cc0 <HAL_PCD_Init+0x160>
|
|
{
|
|
hpcd->OUT_ep[i].is_in = 0U;
|
|
8000c36: 7bfa ldrb r2, [r7, #15]
|
|
8000c38: 6879 ldr r1, [r7, #4]
|
|
8000c3a: 4613 mov r3, r2
|
|
8000c3c: 009b lsls r3, r3, #2
|
|
8000c3e: 4413 add r3, r2
|
|
8000c40: 00db lsls r3, r3, #3
|
|
8000c42: 440b add r3, r1
|
|
8000c44: f203 1369 addw r3, r3, #361 @ 0x169
|
|
8000c48: 2200 movs r2, #0
|
|
8000c4a: 701a strb r2, [r3, #0]
|
|
hpcd->OUT_ep[i].num = i;
|
|
8000c4c: 7bfa ldrb r2, [r7, #15]
|
|
8000c4e: 6879 ldr r1, [r7, #4]
|
|
8000c50: 4613 mov r3, r2
|
|
8000c52: 009b lsls r3, r3, #2
|
|
8000c54: 4413 add r3, r2
|
|
8000c56: 00db lsls r3, r3, #3
|
|
8000c58: 440b add r3, r1
|
|
8000c5a: f503 73b4 add.w r3, r3, #360 @ 0x168
|
|
8000c5e: 7bfa ldrb r2, [r7, #15]
|
|
8000c60: 701a strb r2, [r3, #0]
|
|
/* Control until ep is activated */
|
|
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
|
|
8000c62: 7bfa ldrb r2, [r7, #15]
|
|
8000c64: 6879 ldr r1, [r7, #4]
|
|
8000c66: 4613 mov r3, r2
|
|
8000c68: 009b lsls r3, r3, #2
|
|
8000c6a: 4413 add r3, r2
|
|
8000c6c: 00db lsls r3, r3, #3
|
|
8000c6e: 440b add r3, r1
|
|
8000c70: f203 136b addw r3, r3, #363 @ 0x16b
|
|
8000c74: 2200 movs r2, #0
|
|
8000c76: 701a strb r2, [r3, #0]
|
|
hpcd->OUT_ep[i].maxpacket = 0U;
|
|
8000c78: 7bfa ldrb r2, [r7, #15]
|
|
8000c7a: 6879 ldr r1, [r7, #4]
|
|
8000c7c: 4613 mov r3, r2
|
|
8000c7e: 009b lsls r3, r3, #2
|
|
8000c80: 4413 add r3, r2
|
|
8000c82: 00db lsls r3, r3, #3
|
|
8000c84: 440b add r3, r1
|
|
8000c86: f503 73bc add.w r3, r3, #376 @ 0x178
|
|
8000c8a: 2200 movs r2, #0
|
|
8000c8c: 601a str r2, [r3, #0]
|
|
hpcd->OUT_ep[i].xfer_buff = 0U;
|
|
8000c8e: 7bfa ldrb r2, [r7, #15]
|
|
8000c90: 6879 ldr r1, [r7, #4]
|
|
8000c92: 4613 mov r3, r2
|
|
8000c94: 009b lsls r3, r3, #2
|
|
8000c96: 4413 add r3, r2
|
|
8000c98: 00db lsls r3, r3, #3
|
|
8000c9a: 440b add r3, r1
|
|
8000c9c: f503 73be add.w r3, r3, #380 @ 0x17c
|
|
8000ca0: 2200 movs r2, #0
|
|
8000ca2: 601a str r2, [r3, #0]
|
|
hpcd->OUT_ep[i].xfer_len = 0U;
|
|
8000ca4: 7bfa ldrb r2, [r7, #15]
|
|
8000ca6: 6879 ldr r1, [r7, #4]
|
|
8000ca8: 4613 mov r3, r2
|
|
8000caa: 009b lsls r3, r3, #2
|
|
8000cac: 4413 add r3, r2
|
|
8000cae: 00db lsls r3, r3, #3
|
|
8000cb0: 440b add r3, r1
|
|
8000cb2: f503 73c0 add.w r3, r3, #384 @ 0x180
|
|
8000cb6: 2200 movs r2, #0
|
|
8000cb8: 601a str r2, [r3, #0]
|
|
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
|
|
8000cba: 7bfb ldrb r3, [r7, #15]
|
|
8000cbc: 3301 adds r3, #1
|
|
8000cbe: 73fb strb r3, [r7, #15]
|
|
8000cc0: 7bfa ldrb r2, [r7, #15]
|
|
8000cc2: 687b ldr r3, [r7, #4]
|
|
8000cc4: 685b ldr r3, [r3, #4]
|
|
8000cc6: 429a cmp r2, r3
|
|
8000cc8: d3b5 bcc.n 8000c36 <HAL_PCD_Init+0xd6>
|
|
}
|
|
|
|
/* Init Device */
|
|
(void)USB_DevInit(hpcd->Instance, hpcd->Init);
|
|
8000cca: 687b ldr r3, [r7, #4]
|
|
8000ccc: 681b ldr r3, [r3, #0]
|
|
8000cce: 603b str r3, [r7, #0]
|
|
8000cd0: 687e ldr r6, [r7, #4]
|
|
8000cd2: 466d mov r5, sp
|
|
8000cd4: f106 0410 add.w r4, r6, #16
|
|
8000cd8: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
8000cda: c50f stmia r5!, {r0, r1, r2, r3}
|
|
8000cdc: 6823 ldr r3, [r4, #0]
|
|
8000cde: 602b str r3, [r5, #0]
|
|
8000ce0: 1d33 adds r3, r6, #4
|
|
8000ce2: cb0e ldmia r3, {r1, r2, r3}
|
|
8000ce4: 6838 ldr r0, [r7, #0]
|
|
8000ce6: f003 fbd0 bl 800448a <USB_DevInit>
|
|
|
|
hpcd->USB_Address = 0U;
|
|
8000cea: 687b ldr r3, [r7, #4]
|
|
8000cec: 2200 movs r2, #0
|
|
8000cee: f883 2024 strb.w r2, [r3, #36] @ 0x24
|
|
hpcd->State = HAL_PCD_STATE_READY;
|
|
8000cf2: 687b ldr r3, [r7, #4]
|
|
8000cf4: 2201 movs r2, #1
|
|
8000cf6: f883 22a9 strb.w r2, [r3, #681] @ 0x2a9
|
|
return HAL_OK;
|
|
8000cfa: 2300 movs r3, #0
|
|
}
|
|
8000cfc: 4618 mov r0, r3
|
|
8000cfe: 3714 adds r7, #20
|
|
8000d00: 46bd mov sp, r7
|
|
8000d02: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
08000d04 <HAL_PCD_Start>:
|
|
* @brief Start the USB device
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
8000d04: b580 push {r7, lr}
|
|
8000d06: b082 sub sp, #8
|
|
8000d08: af00 add r7, sp, #0
|
|
8000d0a: 6078 str r0, [r7, #4]
|
|
__HAL_LOCK(hpcd);
|
|
8000d0c: 687b ldr r3, [r7, #4]
|
|
8000d0e: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
|
|
8000d12: 2b01 cmp r3, #1
|
|
8000d14: d101 bne.n 8000d1a <HAL_PCD_Start+0x16>
|
|
8000d16: 2302 movs r3, #2
|
|
8000d18: e016 b.n 8000d48 <HAL_PCD_Start+0x44>
|
|
8000d1a: 687b ldr r3, [r7, #4]
|
|
8000d1c: 2201 movs r2, #1
|
|
8000d1e: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
__HAL_PCD_ENABLE(hpcd);
|
|
8000d22: 687b ldr r3, [r7, #4]
|
|
8000d24: 681b ldr r3, [r3, #0]
|
|
8000d26: 4618 mov r0, r3
|
|
8000d28: f003 fb7d bl 8004426 <USB_EnableGlobalInt>
|
|
|
|
HAL_PCDEx_SetConnectionState(hpcd, 1U);
|
|
8000d2c: 2101 movs r1, #1
|
|
8000d2e: 6878 ldr r0, [r7, #4]
|
|
8000d30: f007 fecc bl 8008acc <HAL_PCDEx_SetConnectionState>
|
|
|
|
(void)USB_DevConnect(hpcd->Instance);
|
|
8000d34: 687b ldr r3, [r7, #4]
|
|
8000d36: 681b ldr r3, [r3, #0]
|
|
8000d38: 4618 mov r0, r3
|
|
8000d3a: f005 fe3c bl 80069b6 <USB_DevConnect>
|
|
__HAL_UNLOCK(hpcd);
|
|
8000d3e: 687b ldr r3, [r7, #4]
|
|
8000d40: 2200 movs r2, #0
|
|
8000d42: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
|
|
return HAL_OK;
|
|
8000d46: 2300 movs r3, #0
|
|
}
|
|
8000d48: 4618 mov r0, r3
|
|
8000d4a: 3708 adds r7, #8
|
|
8000d4c: 46bd mov sp, r7
|
|
8000d4e: bd80 pop {r7, pc}
|
|
|
|
08000d50 <HAL_PCD_IRQHandler>:
|
|
* @brief This function handles PCD interrupt request.
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
8000d50: b580 push {r7, lr}
|
|
8000d52: b084 sub sp, #16
|
|
8000d54: af00 add r7, sp, #0
|
|
8000d56: 6078 str r0, [r7, #4]
|
|
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
|
|
8000d58: 687b ldr r3, [r7, #4]
|
|
8000d5a: 681b ldr r3, [r3, #0]
|
|
8000d5c: 4618 mov r0, r3
|
|
8000d5e: f005 fe35 bl 80069cc <USB_ReadInterrupts>
|
|
8000d62: 60f8 str r0, [r7, #12]
|
|
|
|
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
|
|
8000d64: 68fb ldr r3, [r7, #12]
|
|
8000d66: f403 4300 and.w r3, r3, #32768 @ 0x8000
|
|
8000d6a: 2b00 cmp r3, #0
|
|
8000d6c: d003 beq.n 8000d76 <HAL_PCD_IRQHandler+0x26>
|
|
{
|
|
/* servicing of the endpoint correct transfer interrupt */
|
|
/* clear of the CTR flag into the sub */
|
|
(void)PCD_EP_ISR_Handler(hpcd);
|
|
8000d6e: 6878 ldr r0, [r7, #4]
|
|
8000d70: f000 fab2 bl 80012d8 <PCD_EP_ISR_Handler>
|
|
|
|
return;
|
|
8000d74: e0bd b.n 8000ef2 <HAL_PCD_IRQHandler+0x1a2>
|
|
}
|
|
|
|
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
|
|
8000d76: 68fb ldr r3, [r7, #12]
|
|
8000d78: f403 6380 and.w r3, r3, #1024 @ 0x400
|
|
8000d7c: 2b00 cmp r3, #0
|
|
8000d7e: d013 beq.n 8000da8 <HAL_PCD_IRQHandler+0x58>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
|
|
8000d80: 687b ldr r3, [r7, #4]
|
|
8000d82: 681b ldr r3, [r3, #0]
|
|
8000d84: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
8000d88: b29a uxth r2, r3
|
|
8000d8a: 687b ldr r3, [r7, #4]
|
|
8000d8c: 681b ldr r3, [r3, #0]
|
|
8000d8e: f422 6280 bic.w r2, r2, #1024 @ 0x400
|
|
8000d92: b292 uxth r2, r2
|
|
8000d94: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->ResetCallback(hpcd);
|
|
#else
|
|
HAL_PCD_ResetCallback(hpcd);
|
|
8000d98: 6878 ldr r0, [r7, #4]
|
|
8000d9a: f007 fc9a bl 80086d2 <HAL_PCD_ResetCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
(void)HAL_PCD_SetAddress(hpcd, 0U);
|
|
8000d9e: 2100 movs r1, #0
|
|
8000da0: 6878 ldr r0, [r7, #4]
|
|
8000da2: f000 f8a9 bl 8000ef8 <HAL_PCD_SetAddress>
|
|
|
|
return;
|
|
8000da6: e0a4 b.n 8000ef2 <HAL_PCD_IRQHandler+0x1a2>
|
|
}
|
|
|
|
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
|
|
8000da8: 68fb ldr r3, [r7, #12]
|
|
8000daa: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8000dae: 2b00 cmp r3, #0
|
|
8000db0: d00c beq.n 8000dcc <HAL_PCD_IRQHandler+0x7c>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
|
|
8000db2: 687b ldr r3, [r7, #4]
|
|
8000db4: 681b ldr r3, [r3, #0]
|
|
8000db6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
8000dba: b29a uxth r2, r3
|
|
8000dbc: 687b ldr r3, [r7, #4]
|
|
8000dbe: 681b ldr r3, [r3, #0]
|
|
8000dc0: f422 4280 bic.w r2, r2, #16384 @ 0x4000
|
|
8000dc4: b292 uxth r2, r2
|
|
8000dc6: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
|
|
|
|
return;
|
|
8000dca: e092 b.n 8000ef2 <HAL_PCD_IRQHandler+0x1a2>
|
|
}
|
|
|
|
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
|
|
8000dcc: 68fb ldr r3, [r7, #12]
|
|
8000dce: f403 5300 and.w r3, r3, #8192 @ 0x2000
|
|
8000dd2: 2b00 cmp r3, #0
|
|
8000dd4: d00c beq.n 8000df0 <HAL_PCD_IRQHandler+0xa0>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
|
|
8000dd6: 687b ldr r3, [r7, #4]
|
|
8000dd8: 681b ldr r3, [r3, #0]
|
|
8000dda: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
8000dde: b29a uxth r2, r3
|
|
8000de0: 687b ldr r3, [r7, #4]
|
|
8000de2: 681b ldr r3, [r3, #0]
|
|
8000de4: f422 5200 bic.w r2, r2, #8192 @ 0x2000
|
|
8000de8: b292 uxth r2, r2
|
|
8000dea: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
|
|
|
|
return;
|
|
8000dee: e080 b.n 8000ef2 <HAL_PCD_IRQHandler+0x1a2>
|
|
}
|
|
|
|
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
|
|
8000df0: 68fb ldr r3, [r7, #12]
|
|
8000df2: f403 5380 and.w r3, r3, #4096 @ 0x1000
|
|
8000df6: 2b00 cmp r3, #0
|
|
8000df8: d027 beq.n 8000e4a <HAL_PCD_IRQHandler+0xfa>
|
|
{
|
|
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LPMODE);
|
|
8000dfa: 687b ldr r3, [r7, #4]
|
|
8000dfc: 681b ldr r3, [r3, #0]
|
|
8000dfe: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
|
|
8000e02: b29a uxth r2, r3
|
|
8000e04: 687b ldr r3, [r7, #4]
|
|
8000e06: 681b ldr r3, [r3, #0]
|
|
8000e08: f022 0204 bic.w r2, r2, #4
|
|
8000e0c: b292 uxth r2, r2
|
|
8000e0e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
|
|
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
|
|
8000e12: 687b ldr r3, [r7, #4]
|
|
8000e14: 681b ldr r3, [r3, #0]
|
|
8000e16: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
|
|
8000e1a: b29a uxth r2, r3
|
|
8000e1c: 687b ldr r3, [r7, #4]
|
|
8000e1e: 681b ldr r3, [r3, #0]
|
|
8000e20: f022 0208 bic.w r2, r2, #8
|
|
8000e24: b292 uxth r2, r2
|
|
8000e26: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->ResumeCallback(hpcd);
|
|
#else
|
|
HAL_PCD_ResumeCallback(hpcd);
|
|
8000e2a: 6878 ldr r0, [r7, #4]
|
|
8000e2c: f007 fc8a bl 8008744 <HAL_PCD_ResumeCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
|
|
8000e30: 687b ldr r3, [r7, #4]
|
|
8000e32: 681b ldr r3, [r3, #0]
|
|
8000e34: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
8000e38: b29a uxth r2, r3
|
|
8000e3a: 687b ldr r3, [r7, #4]
|
|
8000e3c: 681b ldr r3, [r3, #0]
|
|
8000e3e: f422 5280 bic.w r2, r2, #4096 @ 0x1000
|
|
8000e42: b292 uxth r2, r2
|
|
8000e44: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
|
|
|
|
return;
|
|
8000e48: e053 b.n 8000ef2 <HAL_PCD_IRQHandler+0x1a2>
|
|
}
|
|
|
|
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
|
|
8000e4a: 68fb ldr r3, [r7, #12]
|
|
8000e4c: f403 6300 and.w r3, r3, #2048 @ 0x800
|
|
8000e50: 2b00 cmp r3, #0
|
|
8000e52: d027 beq.n 8000ea4 <HAL_PCD_IRQHandler+0x154>
|
|
{
|
|
/* Force low-power mode in the macrocell */
|
|
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
|
|
8000e54: 687b ldr r3, [r7, #4]
|
|
8000e56: 681b ldr r3, [r3, #0]
|
|
8000e58: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
|
|
8000e5c: b29a uxth r2, r3
|
|
8000e5e: 687b ldr r3, [r7, #4]
|
|
8000e60: 681b ldr r3, [r3, #0]
|
|
8000e62: f042 0208 orr.w r2, r2, #8
|
|
8000e66: b292 uxth r2, r2
|
|
8000e68: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
|
|
|
|
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
|
|
8000e6c: 687b ldr r3, [r7, #4]
|
|
8000e6e: 681b ldr r3, [r3, #0]
|
|
8000e70: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
8000e74: b29a uxth r2, r3
|
|
8000e76: 687b ldr r3, [r7, #4]
|
|
8000e78: 681b ldr r3, [r3, #0]
|
|
8000e7a: f422 6200 bic.w r2, r2, #2048 @ 0x800
|
|
8000e7e: b292 uxth r2, r2
|
|
8000e80: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
|
|
|
|
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LPMODE;
|
|
8000e84: 687b ldr r3, [r7, #4]
|
|
8000e86: 681b ldr r3, [r3, #0]
|
|
8000e88: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
|
|
8000e8c: b29a uxth r2, r3
|
|
8000e8e: 687b ldr r3, [r7, #4]
|
|
8000e90: 681b ldr r3, [r3, #0]
|
|
8000e92: f042 0204 orr.w r2, r2, #4
|
|
8000e96: b292 uxth r2, r2
|
|
8000e98: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->SuspendCallback(hpcd);
|
|
#else
|
|
HAL_PCD_SuspendCallback(hpcd);
|
|
8000e9c: 6878 ldr r0, [r7, #4]
|
|
8000e9e: f007 fc37 bl 8008710 <HAL_PCD_SuspendCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
return;
|
|
8000ea2: e026 b.n 8000ef2 <HAL_PCD_IRQHandler+0x1a2>
|
|
}
|
|
|
|
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
|
|
8000ea4: 68fb ldr r3, [r7, #12]
|
|
8000ea6: f403 7300 and.w r3, r3, #512 @ 0x200
|
|
8000eaa: 2b00 cmp r3, #0
|
|
8000eac: d00f beq.n 8000ece <HAL_PCD_IRQHandler+0x17e>
|
|
{
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
|
|
8000eae: 687b ldr r3, [r7, #4]
|
|
8000eb0: 681b ldr r3, [r3, #0]
|
|
8000eb2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
8000eb6: b29a uxth r2, r3
|
|
8000eb8: 687b ldr r3, [r7, #4]
|
|
8000eba: 681b ldr r3, [r3, #0]
|
|
8000ebc: f422 7200 bic.w r2, r2, #512 @ 0x200
|
|
8000ec0: b292 uxth r2, r2
|
|
8000ec2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
|
|
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->SOFCallback(hpcd);
|
|
#else
|
|
HAL_PCD_SOFCallback(hpcd);
|
|
8000ec6: 6878 ldr r0, [r7, #4]
|
|
8000ec8: f007 fbf5 bl 80086b6 <HAL_PCD_SOFCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
return;
|
|
8000ecc: e011 b.n 8000ef2 <HAL_PCD_IRQHandler+0x1a2>
|
|
}
|
|
|
|
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
|
|
8000ece: 68fb ldr r3, [r7, #12]
|
|
8000ed0: f403 7380 and.w r3, r3, #256 @ 0x100
|
|
8000ed4: 2b00 cmp r3, #0
|
|
8000ed6: d00c beq.n 8000ef2 <HAL_PCD_IRQHandler+0x1a2>
|
|
{
|
|
/* clear ESOF flag in ISTR */
|
|
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
|
|
8000ed8: 687b ldr r3, [r7, #4]
|
|
8000eda: 681b ldr r3, [r3, #0]
|
|
8000edc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
8000ee0: b29a uxth r2, r3
|
|
8000ee2: 687b ldr r3, [r7, #4]
|
|
8000ee4: 681b ldr r3, [r3, #0]
|
|
8000ee6: f422 7280 bic.w r2, r2, #256 @ 0x100
|
|
8000eea: b292 uxth r2, r2
|
|
8000eec: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
|
|
|
|
return;
|
|
8000ef0: bf00 nop
|
|
}
|
|
}
|
|
8000ef2: 3710 adds r7, #16
|
|
8000ef4: 46bd mov sp, r7
|
|
8000ef6: bd80 pop {r7, pc}
|
|
|
|
08000ef8 <HAL_PCD_SetAddress>:
|
|
* @param hpcd PCD handle
|
|
* @param address new device address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
|
|
{
|
|
8000ef8: b580 push {r7, lr}
|
|
8000efa: b082 sub sp, #8
|
|
8000efc: af00 add r7, sp, #0
|
|
8000efe: 6078 str r0, [r7, #4]
|
|
8000f00: 460b mov r3, r1
|
|
8000f02: 70fb strb r3, [r7, #3]
|
|
__HAL_LOCK(hpcd);
|
|
8000f04: 687b ldr r3, [r7, #4]
|
|
8000f06: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
|
|
8000f0a: 2b01 cmp r3, #1
|
|
8000f0c: d101 bne.n 8000f12 <HAL_PCD_SetAddress+0x1a>
|
|
8000f0e: 2302 movs r3, #2
|
|
8000f10: e013 b.n 8000f3a <HAL_PCD_SetAddress+0x42>
|
|
8000f12: 687b ldr r3, [r7, #4]
|
|
8000f14: 2201 movs r2, #1
|
|
8000f16: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
hpcd->USB_Address = address;
|
|
8000f1a: 687b ldr r3, [r7, #4]
|
|
8000f1c: 78fa ldrb r2, [r7, #3]
|
|
8000f1e: f883 2024 strb.w r2, [r3, #36] @ 0x24
|
|
(void)USB_SetDevAddress(hpcd->Instance, address);
|
|
8000f22: 687b ldr r3, [r7, #4]
|
|
8000f24: 681b ldr r3, [r3, #0]
|
|
8000f26: 78fa ldrb r2, [r7, #3]
|
|
8000f28: 4611 mov r1, r2
|
|
8000f2a: 4618 mov r0, r3
|
|
8000f2c: f005 fd2f bl 800698e <USB_SetDevAddress>
|
|
__HAL_UNLOCK(hpcd);
|
|
8000f30: 687b ldr r3, [r7, #4]
|
|
8000f32: 2200 movs r2, #0
|
|
8000f34: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
|
|
return HAL_OK;
|
|
8000f38: 2300 movs r3, #0
|
|
}
|
|
8000f3a: 4618 mov r0, r3
|
|
8000f3c: 3708 adds r7, #8
|
|
8000f3e: 46bd mov sp, r7
|
|
8000f40: bd80 pop {r7, pc}
|
|
|
|
08000f42 <HAL_PCD_EP_Open>:
|
|
* @param ep_type endpoint type
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
|
|
uint16_t ep_mps, uint8_t ep_type)
|
|
{
|
|
8000f42: b580 push {r7, lr}
|
|
8000f44: b084 sub sp, #16
|
|
8000f46: af00 add r7, sp, #0
|
|
8000f48: 6078 str r0, [r7, #4]
|
|
8000f4a: 4608 mov r0, r1
|
|
8000f4c: 4611 mov r1, r2
|
|
8000f4e: 461a mov r2, r3
|
|
8000f50: 4603 mov r3, r0
|
|
8000f52: 70fb strb r3, [r7, #3]
|
|
8000f54: 460b mov r3, r1
|
|
8000f56: 803b strh r3, [r7, #0]
|
|
8000f58: 4613 mov r3, r2
|
|
8000f5a: 70bb strb r3, [r7, #2]
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
8000f5c: 2300 movs r3, #0
|
|
8000f5e: 72fb strb r3, [r7, #11]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
8000f60: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8000f64: 2b00 cmp r3, #0
|
|
8000f66: da0e bge.n 8000f86 <HAL_PCD_EP_Open+0x44>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8000f68: 78fb ldrb r3, [r7, #3]
|
|
8000f6a: f003 0307 and.w r3, r3, #7
|
|
8000f6e: 1c5a adds r2, r3, #1
|
|
8000f70: 4613 mov r3, r2
|
|
8000f72: 009b lsls r3, r3, #2
|
|
8000f74: 4413 add r3, r2
|
|
8000f76: 00db lsls r3, r3, #3
|
|
8000f78: 687a ldr r2, [r7, #4]
|
|
8000f7a: 4413 add r3, r2
|
|
8000f7c: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
8000f7e: 68fb ldr r3, [r7, #12]
|
|
8000f80: 2201 movs r2, #1
|
|
8000f82: 705a strb r2, [r3, #1]
|
|
8000f84: e00e b.n 8000fa4 <HAL_PCD_EP_Open+0x62>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8000f86: 78fb ldrb r3, [r7, #3]
|
|
8000f88: f003 0207 and.w r2, r3, #7
|
|
8000f8c: 4613 mov r3, r2
|
|
8000f8e: 009b lsls r3, r3, #2
|
|
8000f90: 4413 add r3, r2
|
|
8000f92: 00db lsls r3, r3, #3
|
|
8000f94: f503 73b4 add.w r3, r3, #360 @ 0x168
|
|
8000f98: 687a ldr r2, [r7, #4]
|
|
8000f9a: 4413 add r3, r2
|
|
8000f9c: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8000f9e: 68fb ldr r3, [r7, #12]
|
|
8000fa0: 2200 movs r2, #0
|
|
8000fa2: 705a strb r2, [r3, #1]
|
|
}
|
|
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8000fa4: 78fb ldrb r3, [r7, #3]
|
|
8000fa6: f003 0307 and.w r3, r3, #7
|
|
8000faa: b2da uxtb r2, r3
|
|
8000fac: 68fb ldr r3, [r7, #12]
|
|
8000fae: 701a strb r2, [r3, #0]
|
|
ep->maxpacket = ep_mps;
|
|
8000fb0: 883a ldrh r2, [r7, #0]
|
|
8000fb2: 68fb ldr r3, [r7, #12]
|
|
8000fb4: 611a str r2, [r3, #16]
|
|
ep->type = ep_type;
|
|
8000fb6: 68fb ldr r3, [r7, #12]
|
|
8000fb8: 78ba ldrb r2, [r7, #2]
|
|
8000fba: 70da strb r2, [r3, #3]
|
|
|
|
/* Set initial data PID. */
|
|
if (ep_type == EP_TYPE_BULK)
|
|
8000fbc: 78bb ldrb r3, [r7, #2]
|
|
8000fbe: 2b02 cmp r3, #2
|
|
8000fc0: d102 bne.n 8000fc8 <HAL_PCD_EP_Open+0x86>
|
|
{
|
|
ep->data_pid_start = 0U;
|
|
8000fc2: 68fb ldr r3, [r7, #12]
|
|
8000fc4: 2200 movs r2, #0
|
|
8000fc6: 711a strb r2, [r3, #4]
|
|
}
|
|
|
|
__HAL_LOCK(hpcd);
|
|
8000fc8: 687b ldr r3, [r7, #4]
|
|
8000fca: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
|
|
8000fce: 2b01 cmp r3, #1
|
|
8000fd0: d101 bne.n 8000fd6 <HAL_PCD_EP_Open+0x94>
|
|
8000fd2: 2302 movs r3, #2
|
|
8000fd4: e00e b.n 8000ff4 <HAL_PCD_EP_Open+0xb2>
|
|
8000fd6: 687b ldr r3, [r7, #4]
|
|
8000fd8: 2201 movs r2, #1
|
|
8000fda: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
|
|
8000fde: 687b ldr r3, [r7, #4]
|
|
8000fe0: 681b ldr r3, [r3, #0]
|
|
8000fe2: 68f9 ldr r1, [r7, #12]
|
|
8000fe4: 4618 mov r0, r3
|
|
8000fe6: f003 fa71 bl 80044cc <USB_ActivateEndpoint>
|
|
__HAL_UNLOCK(hpcd);
|
|
8000fea: 687b ldr r3, [r7, #4]
|
|
8000fec: 2200 movs r2, #0
|
|
8000fee: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
|
|
return ret;
|
|
8000ff2: 7afb ldrb r3, [r7, #11]
|
|
}
|
|
8000ff4: 4618 mov r0, r3
|
|
8000ff6: 3710 adds r7, #16
|
|
8000ff8: 46bd mov sp, r7
|
|
8000ffa: bd80 pop {r7, pc}
|
|
|
|
08000ffc <HAL_PCD_EP_Close>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8000ffc: b580 push {r7, lr}
|
|
8000ffe: b084 sub sp, #16
|
|
8001000: af00 add r7, sp, #0
|
|
8001002: 6078 str r0, [r7, #4]
|
|
8001004: 460b mov r3, r1
|
|
8001006: 70fb strb r3, [r7, #3]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
8001008: f997 3003 ldrsb.w r3, [r7, #3]
|
|
800100c: 2b00 cmp r3, #0
|
|
800100e: da0e bge.n 800102e <HAL_PCD_EP_Close+0x32>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001010: 78fb ldrb r3, [r7, #3]
|
|
8001012: f003 0307 and.w r3, r3, #7
|
|
8001016: 1c5a adds r2, r3, #1
|
|
8001018: 4613 mov r3, r2
|
|
800101a: 009b lsls r3, r3, #2
|
|
800101c: 4413 add r3, r2
|
|
800101e: 00db lsls r3, r3, #3
|
|
8001020: 687a ldr r2, [r7, #4]
|
|
8001022: 4413 add r3, r2
|
|
8001024: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
8001026: 68fb ldr r3, [r7, #12]
|
|
8001028: 2201 movs r2, #1
|
|
800102a: 705a strb r2, [r3, #1]
|
|
800102c: e00e b.n 800104c <HAL_PCD_EP_Close+0x50>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
800102e: 78fb ldrb r3, [r7, #3]
|
|
8001030: f003 0207 and.w r2, r3, #7
|
|
8001034: 4613 mov r3, r2
|
|
8001036: 009b lsls r3, r3, #2
|
|
8001038: 4413 add r3, r2
|
|
800103a: 00db lsls r3, r3, #3
|
|
800103c: f503 73b4 add.w r3, r3, #360 @ 0x168
|
|
8001040: 687a ldr r2, [r7, #4]
|
|
8001042: 4413 add r3, r2
|
|
8001044: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
8001046: 68fb ldr r3, [r7, #12]
|
|
8001048: 2200 movs r2, #0
|
|
800104a: 705a strb r2, [r3, #1]
|
|
}
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
800104c: 78fb ldrb r3, [r7, #3]
|
|
800104e: f003 0307 and.w r3, r3, #7
|
|
8001052: b2da uxtb r2, r3
|
|
8001054: 68fb ldr r3, [r7, #12]
|
|
8001056: 701a strb r2, [r3, #0]
|
|
|
|
__HAL_LOCK(hpcd);
|
|
8001058: 687b ldr r3, [r7, #4]
|
|
800105a: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
|
|
800105e: 2b01 cmp r3, #1
|
|
8001060: d101 bne.n 8001066 <HAL_PCD_EP_Close+0x6a>
|
|
8001062: 2302 movs r3, #2
|
|
8001064: e00e b.n 8001084 <HAL_PCD_EP_Close+0x88>
|
|
8001066: 687b ldr r3, [r7, #4]
|
|
8001068: 2201 movs r2, #1
|
|
800106a: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
|
|
800106e: 687b ldr r3, [r7, #4]
|
|
8001070: 681b ldr r3, [r3, #0]
|
|
8001072: 68f9 ldr r1, [r7, #12]
|
|
8001074: 4618 mov r0, r3
|
|
8001076: f003 fded bl 8004c54 <USB_DeactivateEndpoint>
|
|
__HAL_UNLOCK(hpcd);
|
|
800107a: 687b ldr r3, [r7, #4]
|
|
800107c: 2200 movs r2, #0
|
|
800107e: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
return HAL_OK;
|
|
8001082: 2300 movs r3, #0
|
|
}
|
|
8001084: 4618 mov r0, r3
|
|
8001086: 3710 adds r7, #16
|
|
8001088: 46bd mov sp, r7
|
|
800108a: bd80 pop {r7, pc}
|
|
|
|
0800108c <HAL_PCD_EP_Receive>:
|
|
* @param pBuf pointer to the reception buffer
|
|
* @param len amount of data to be received
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
|
|
{
|
|
800108c: b580 push {r7, lr}
|
|
800108e: b086 sub sp, #24
|
|
8001090: af00 add r7, sp, #0
|
|
8001092: 60f8 str r0, [r7, #12]
|
|
8001094: 607a str r2, [r7, #4]
|
|
8001096: 603b str r3, [r7, #0]
|
|
8001098: 460b mov r3, r1
|
|
800109a: 72fb strb r3, [r7, #11]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
800109c: 7afb ldrb r3, [r7, #11]
|
|
800109e: f003 0207 and.w r2, r3, #7
|
|
80010a2: 4613 mov r3, r2
|
|
80010a4: 009b lsls r3, r3, #2
|
|
80010a6: 4413 add r3, r2
|
|
80010a8: 00db lsls r3, r3, #3
|
|
80010aa: f503 73b4 add.w r3, r3, #360 @ 0x168
|
|
80010ae: 68fa ldr r2, [r7, #12]
|
|
80010b0: 4413 add r3, r2
|
|
80010b2: 617b str r3, [r7, #20]
|
|
|
|
/*setup and start the Xfer */
|
|
ep->xfer_buff = pBuf;
|
|
80010b4: 697b ldr r3, [r7, #20]
|
|
80010b6: 687a ldr r2, [r7, #4]
|
|
80010b8: 615a str r2, [r3, #20]
|
|
ep->xfer_len = len;
|
|
80010ba: 697b ldr r3, [r7, #20]
|
|
80010bc: 683a ldr r2, [r7, #0]
|
|
80010be: 619a str r2, [r3, #24]
|
|
ep->xfer_count = 0U;
|
|
80010c0: 697b ldr r3, [r7, #20]
|
|
80010c2: 2200 movs r2, #0
|
|
80010c4: 61da str r2, [r3, #28]
|
|
ep->is_in = 0U;
|
|
80010c6: 697b ldr r3, [r7, #20]
|
|
80010c8: 2200 movs r2, #0
|
|
80010ca: 705a strb r2, [r3, #1]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
80010cc: 7afb ldrb r3, [r7, #11]
|
|
80010ce: f003 0307 and.w r3, r3, #7
|
|
80010d2: b2da uxtb r2, r3
|
|
80010d4: 697b ldr r3, [r7, #20]
|
|
80010d6: 701a strb r2, [r3, #0]
|
|
|
|
(void)USB_EPStartXfer(hpcd->Instance, ep);
|
|
80010d8: 68fb ldr r3, [r7, #12]
|
|
80010da: 681b ldr r3, [r3, #0]
|
|
80010dc: 6979 ldr r1, [r7, #20]
|
|
80010de: 4618 mov r0, r3
|
|
80010e0: f003 ffa5 bl 800502e <USB_EPStartXfer>
|
|
|
|
return HAL_OK;
|
|
80010e4: 2300 movs r3, #0
|
|
}
|
|
80010e6: 4618 mov r0, r3
|
|
80010e8: 3718 adds r7, #24
|
|
80010ea: 46bd mov sp, r7
|
|
80010ec: bd80 pop {r7, pc}
|
|
|
|
080010ee <HAL_PCD_EP_GetRxCount>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval Data Size
|
|
*/
|
|
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
80010ee: b480 push {r7}
|
|
80010f0: b083 sub sp, #12
|
|
80010f2: af00 add r7, sp, #0
|
|
80010f4: 6078 str r0, [r7, #4]
|
|
80010f6: 460b mov r3, r1
|
|
80010f8: 70fb strb r3, [r7, #3]
|
|
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
|
|
80010fa: 78fb ldrb r3, [r7, #3]
|
|
80010fc: f003 0207 and.w r2, r3, #7
|
|
8001100: 6879 ldr r1, [r7, #4]
|
|
8001102: 4613 mov r3, r2
|
|
8001104: 009b lsls r3, r3, #2
|
|
8001106: 4413 add r3, r2
|
|
8001108: 00db lsls r3, r3, #3
|
|
800110a: 440b add r3, r1
|
|
800110c: f503 73c2 add.w r3, r3, #388 @ 0x184
|
|
8001110: 681b ldr r3, [r3, #0]
|
|
}
|
|
8001112: 4618 mov r0, r3
|
|
8001114: 370c adds r7, #12
|
|
8001116: 46bd mov sp, r7
|
|
8001118: f85d 7b04 ldr.w r7, [sp], #4
|
|
800111c: 4770 bx lr
|
|
|
|
0800111e <HAL_PCD_EP_Transmit>:
|
|
* @param pBuf pointer to the transmission buffer
|
|
* @param len amount of data to be sent
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
|
|
{
|
|
800111e: b580 push {r7, lr}
|
|
8001120: b086 sub sp, #24
|
|
8001122: af00 add r7, sp, #0
|
|
8001124: 60f8 str r0, [r7, #12]
|
|
8001126: 607a str r2, [r7, #4]
|
|
8001128: 603b str r3, [r7, #0]
|
|
800112a: 460b mov r3, r1
|
|
800112c: 72fb strb r3, [r7, #11]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
800112e: 7afb ldrb r3, [r7, #11]
|
|
8001130: f003 0307 and.w r3, r3, #7
|
|
8001134: 1c5a adds r2, r3, #1
|
|
8001136: 4613 mov r3, r2
|
|
8001138: 009b lsls r3, r3, #2
|
|
800113a: 4413 add r3, r2
|
|
800113c: 00db lsls r3, r3, #3
|
|
800113e: 68fa ldr r2, [r7, #12]
|
|
8001140: 4413 add r3, r2
|
|
8001142: 617b str r3, [r7, #20]
|
|
|
|
/*setup and start the Xfer */
|
|
ep->xfer_buff = pBuf;
|
|
8001144: 697b ldr r3, [r7, #20]
|
|
8001146: 687a ldr r2, [r7, #4]
|
|
8001148: 615a str r2, [r3, #20]
|
|
ep->xfer_len = len;
|
|
800114a: 697b ldr r3, [r7, #20]
|
|
800114c: 683a ldr r2, [r7, #0]
|
|
800114e: 619a str r2, [r3, #24]
|
|
ep->xfer_fill_db = 1U;
|
|
8001150: 697b ldr r3, [r7, #20]
|
|
8001152: 2201 movs r2, #1
|
|
8001154: f883 2024 strb.w r2, [r3, #36] @ 0x24
|
|
ep->xfer_len_db = len;
|
|
8001158: 697b ldr r3, [r7, #20]
|
|
800115a: 683a ldr r2, [r7, #0]
|
|
800115c: 621a str r2, [r3, #32]
|
|
ep->xfer_count = 0U;
|
|
800115e: 697b ldr r3, [r7, #20]
|
|
8001160: 2200 movs r2, #0
|
|
8001162: 61da str r2, [r3, #28]
|
|
ep->is_in = 1U;
|
|
8001164: 697b ldr r3, [r7, #20]
|
|
8001166: 2201 movs r2, #1
|
|
8001168: 705a strb r2, [r3, #1]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
800116a: 7afb ldrb r3, [r7, #11]
|
|
800116c: f003 0307 and.w r3, r3, #7
|
|
8001170: b2da uxtb r2, r3
|
|
8001172: 697b ldr r3, [r7, #20]
|
|
8001174: 701a strb r2, [r3, #0]
|
|
|
|
(void)USB_EPStartXfer(hpcd->Instance, ep);
|
|
8001176: 68fb ldr r3, [r7, #12]
|
|
8001178: 681b ldr r3, [r3, #0]
|
|
800117a: 6979 ldr r1, [r7, #20]
|
|
800117c: 4618 mov r0, r3
|
|
800117e: f003 ff56 bl 800502e <USB_EPStartXfer>
|
|
|
|
return HAL_OK;
|
|
8001182: 2300 movs r3, #0
|
|
}
|
|
8001184: 4618 mov r0, r3
|
|
8001186: 3718 adds r7, #24
|
|
8001188: 46bd mov sp, r7
|
|
800118a: bd80 pop {r7, pc}
|
|
|
|
0800118c <HAL_PCD_EP_SetStall>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
800118c: b580 push {r7, lr}
|
|
800118e: b084 sub sp, #16
|
|
8001190: af00 add r7, sp, #0
|
|
8001192: 6078 str r0, [r7, #4]
|
|
8001194: 460b mov r3, r1
|
|
8001196: 70fb strb r3, [r7, #3]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
|
|
8001198: 78fb ldrb r3, [r7, #3]
|
|
800119a: f003 0207 and.w r2, r3, #7
|
|
800119e: 687b ldr r3, [r7, #4]
|
|
80011a0: 685b ldr r3, [r3, #4]
|
|
80011a2: 429a cmp r2, r3
|
|
80011a4: d901 bls.n 80011aa <HAL_PCD_EP_SetStall+0x1e>
|
|
{
|
|
return HAL_ERROR;
|
|
80011a6: 2301 movs r3, #1
|
|
80011a8: e03e b.n 8001228 <HAL_PCD_EP_SetStall+0x9c>
|
|
}
|
|
|
|
if ((0x80U & ep_addr) == 0x80U)
|
|
80011aa: f997 3003 ldrsb.w r3, [r7, #3]
|
|
80011ae: 2b00 cmp r3, #0
|
|
80011b0: da0e bge.n 80011d0 <HAL_PCD_EP_SetStall+0x44>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
80011b2: 78fb ldrb r3, [r7, #3]
|
|
80011b4: f003 0307 and.w r3, r3, #7
|
|
80011b8: 1c5a adds r2, r3, #1
|
|
80011ba: 4613 mov r3, r2
|
|
80011bc: 009b lsls r3, r3, #2
|
|
80011be: 4413 add r3, r2
|
|
80011c0: 00db lsls r3, r3, #3
|
|
80011c2: 687a ldr r2, [r7, #4]
|
|
80011c4: 4413 add r3, r2
|
|
80011c6: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
80011c8: 68fb ldr r3, [r7, #12]
|
|
80011ca: 2201 movs r2, #1
|
|
80011cc: 705a strb r2, [r3, #1]
|
|
80011ce: e00c b.n 80011ea <HAL_PCD_EP_SetStall+0x5e>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr];
|
|
80011d0: 78fa ldrb r2, [r7, #3]
|
|
80011d2: 4613 mov r3, r2
|
|
80011d4: 009b lsls r3, r3, #2
|
|
80011d6: 4413 add r3, r2
|
|
80011d8: 00db lsls r3, r3, #3
|
|
80011da: f503 73b4 add.w r3, r3, #360 @ 0x168
|
|
80011de: 687a ldr r2, [r7, #4]
|
|
80011e0: 4413 add r3, r2
|
|
80011e2: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
80011e4: 68fb ldr r3, [r7, #12]
|
|
80011e6: 2200 movs r2, #0
|
|
80011e8: 705a strb r2, [r3, #1]
|
|
}
|
|
|
|
ep->is_stall = 1U;
|
|
80011ea: 68fb ldr r3, [r7, #12]
|
|
80011ec: 2201 movs r2, #1
|
|
80011ee: 709a strb r2, [r3, #2]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
80011f0: 78fb ldrb r3, [r7, #3]
|
|
80011f2: f003 0307 and.w r3, r3, #7
|
|
80011f6: b2da uxtb r2, r3
|
|
80011f8: 68fb ldr r3, [r7, #12]
|
|
80011fa: 701a strb r2, [r3, #0]
|
|
|
|
__HAL_LOCK(hpcd);
|
|
80011fc: 687b ldr r3, [r7, #4]
|
|
80011fe: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
|
|
8001202: 2b01 cmp r3, #1
|
|
8001204: d101 bne.n 800120a <HAL_PCD_EP_SetStall+0x7e>
|
|
8001206: 2302 movs r3, #2
|
|
8001208: e00e b.n 8001228 <HAL_PCD_EP_SetStall+0x9c>
|
|
800120a: 687b ldr r3, [r7, #4]
|
|
800120c: 2201 movs r2, #1
|
|
800120e: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
|
|
(void)USB_EPSetStall(hpcd->Instance, ep);
|
|
8001212: 687b ldr r3, [r7, #4]
|
|
8001214: 681b ldr r3, [r3, #0]
|
|
8001216: 68f9 ldr r1, [r7, #12]
|
|
8001218: 4618 mov r0, r3
|
|
800121a: f005 fab9 bl 8006790 <USB_EPSetStall>
|
|
|
|
__HAL_UNLOCK(hpcd);
|
|
800121e: 687b ldr r3, [r7, #4]
|
|
8001220: 2200 movs r2, #0
|
|
8001222: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
|
|
return HAL_OK;
|
|
8001226: 2300 movs r3, #0
|
|
}
|
|
8001228: 4618 mov r0, r3
|
|
800122a: 3710 adds r7, #16
|
|
800122c: 46bd mov sp, r7
|
|
800122e: bd80 pop {r7, pc}
|
|
|
|
08001230 <HAL_PCD_EP_ClrStall>:
|
|
* @param hpcd PCD handle
|
|
* @param ep_addr endpoint address
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
|
|
{
|
|
8001230: b580 push {r7, lr}
|
|
8001232: b084 sub sp, #16
|
|
8001234: af00 add r7, sp, #0
|
|
8001236: 6078 str r0, [r7, #4]
|
|
8001238: 460b mov r3, r1
|
|
800123a: 70fb strb r3, [r7, #3]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
|
|
800123c: 78fb ldrb r3, [r7, #3]
|
|
800123e: f003 020f and.w r2, r3, #15
|
|
8001242: 687b ldr r3, [r7, #4]
|
|
8001244: 685b ldr r3, [r3, #4]
|
|
8001246: 429a cmp r2, r3
|
|
8001248: d901 bls.n 800124e <HAL_PCD_EP_ClrStall+0x1e>
|
|
{
|
|
return HAL_ERROR;
|
|
800124a: 2301 movs r3, #1
|
|
800124c: e040 b.n 80012d0 <HAL_PCD_EP_ClrStall+0xa0>
|
|
}
|
|
|
|
if ((0x80U & ep_addr) == 0x80U)
|
|
800124e: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8001252: 2b00 cmp r3, #0
|
|
8001254: da0e bge.n 8001274 <HAL_PCD_EP_ClrStall+0x44>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
8001256: 78fb ldrb r3, [r7, #3]
|
|
8001258: f003 0307 and.w r3, r3, #7
|
|
800125c: 1c5a adds r2, r3, #1
|
|
800125e: 4613 mov r3, r2
|
|
8001260: 009b lsls r3, r3, #2
|
|
8001262: 4413 add r3, r2
|
|
8001264: 00db lsls r3, r3, #3
|
|
8001266: 687a ldr r2, [r7, #4]
|
|
8001268: 4413 add r3, r2
|
|
800126a: 60fb str r3, [r7, #12]
|
|
ep->is_in = 1U;
|
|
800126c: 68fb ldr r3, [r7, #12]
|
|
800126e: 2201 movs r2, #1
|
|
8001270: 705a strb r2, [r3, #1]
|
|
8001272: e00e b.n 8001292 <HAL_PCD_EP_ClrStall+0x62>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
|
|
8001274: 78fb ldrb r3, [r7, #3]
|
|
8001276: f003 0207 and.w r2, r3, #7
|
|
800127a: 4613 mov r3, r2
|
|
800127c: 009b lsls r3, r3, #2
|
|
800127e: 4413 add r3, r2
|
|
8001280: 00db lsls r3, r3, #3
|
|
8001282: f503 73b4 add.w r3, r3, #360 @ 0x168
|
|
8001286: 687a ldr r2, [r7, #4]
|
|
8001288: 4413 add r3, r2
|
|
800128a: 60fb str r3, [r7, #12]
|
|
ep->is_in = 0U;
|
|
800128c: 68fb ldr r3, [r7, #12]
|
|
800128e: 2200 movs r2, #0
|
|
8001290: 705a strb r2, [r3, #1]
|
|
}
|
|
|
|
ep->is_stall = 0U;
|
|
8001292: 68fb ldr r3, [r7, #12]
|
|
8001294: 2200 movs r2, #0
|
|
8001296: 709a strb r2, [r3, #2]
|
|
ep->num = ep_addr & EP_ADDR_MSK;
|
|
8001298: 78fb ldrb r3, [r7, #3]
|
|
800129a: f003 0307 and.w r3, r3, #7
|
|
800129e: b2da uxtb r2, r3
|
|
80012a0: 68fb ldr r3, [r7, #12]
|
|
80012a2: 701a strb r2, [r3, #0]
|
|
|
|
__HAL_LOCK(hpcd);
|
|
80012a4: 687b ldr r3, [r7, #4]
|
|
80012a6: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
|
|
80012aa: 2b01 cmp r3, #1
|
|
80012ac: d101 bne.n 80012b2 <HAL_PCD_EP_ClrStall+0x82>
|
|
80012ae: 2302 movs r3, #2
|
|
80012b0: e00e b.n 80012d0 <HAL_PCD_EP_ClrStall+0xa0>
|
|
80012b2: 687b ldr r3, [r7, #4]
|
|
80012b4: 2201 movs r2, #1
|
|
80012b6: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
(void)USB_EPClearStall(hpcd->Instance, ep);
|
|
80012ba: 687b ldr r3, [r7, #4]
|
|
80012bc: 681b ldr r3, [r3, #0]
|
|
80012be: 68f9 ldr r1, [r7, #12]
|
|
80012c0: 4618 mov r0, r3
|
|
80012c2: f005 fab6 bl 8006832 <USB_EPClearStall>
|
|
__HAL_UNLOCK(hpcd);
|
|
80012c6: 687b ldr r3, [r7, #4]
|
|
80012c8: 2200 movs r2, #0
|
|
80012ca: f883 22a8 strb.w r2, [r3, #680] @ 0x2a8
|
|
|
|
return HAL_OK;
|
|
80012ce: 2300 movs r3, #0
|
|
}
|
|
80012d0: 4618 mov r0, r3
|
|
80012d2: 3710 adds r7, #16
|
|
80012d4: 46bd mov sp, r7
|
|
80012d6: bd80 pop {r7, pc}
|
|
|
|
080012d8 <PCD_EP_ISR_Handler>:
|
|
* @brief This function handles PCD Endpoint interrupt request.
|
|
* @param hpcd PCD handle
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
|
|
{
|
|
80012d8: b580 push {r7, lr}
|
|
80012da: b096 sub sp, #88 @ 0x58
|
|
80012dc: af00 add r7, sp, #0
|
|
80012de: 6078 str r0, [r7, #4]
|
|
#if (USE_USB_DOUBLE_BUFFER != 1U)
|
|
count = 0U;
|
|
#endif /* USE_USB_DOUBLE_BUFFER */
|
|
|
|
/* stay in loop while pending interrupts */
|
|
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
|
|
80012e0: e3b0 b.n 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
{
|
|
wIstr = hpcd->Instance->ISTR;
|
|
80012e2: 687b ldr r3, [r7, #4]
|
|
80012e4: 681b ldr r3, [r3, #0]
|
|
80012e6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
80012ea: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
|
|
|
|
/* extract highest priority endpoint number */
|
|
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
|
|
80012ee: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
|
|
80012f2: b2db uxtb r3, r3
|
|
80012f4: f003 030f and.w r3, r3, #15
|
|
80012f8: f887 304d strb.w r3, [r7, #77] @ 0x4d
|
|
|
|
if (epindex == 0U)
|
|
80012fc: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
|
|
8001300: 2b00 cmp r3, #0
|
|
8001302: f040 8172 bne.w 80015ea <PCD_EP_ISR_Handler+0x312>
|
|
{
|
|
/* Decode and service control endpoint interrupt */
|
|
|
|
/* DIR bit = origin of the interrupt */
|
|
if ((wIstr & USB_ISTR_DIR) == 0U)
|
|
8001306: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
|
|
800130a: f003 0310 and.w r3, r3, #16
|
|
800130e: 2b00 cmp r3, #0
|
|
8001310: d14f bne.n 80013b2 <PCD_EP_ISR_Handler+0xda>
|
|
{
|
|
/* DIR = 0 */
|
|
|
|
/* DIR = 0 => IN int */
|
|
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
|
|
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
|
|
8001312: 687b ldr r3, [r7, #4]
|
|
8001314: 681b ldr r3, [r3, #0]
|
|
8001316: 881b ldrh r3, [r3, #0]
|
|
8001318: b29b uxth r3, r3
|
|
800131a: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
|
|
800131e: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8001322: 81fb strh r3, [r7, #14]
|
|
8001324: 687b ldr r3, [r7, #4]
|
|
8001326: 681a ldr r2, [r3, #0]
|
|
8001328: 89fb ldrh r3, [r7, #14]
|
|
800132a: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800132e: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8001332: b29b uxth r3, r3
|
|
8001334: 8013 strh r3, [r2, #0]
|
|
ep = &hpcd->IN_ep[0];
|
|
8001336: 687b ldr r3, [r7, #4]
|
|
8001338: 3328 adds r3, #40 @ 0x28
|
|
800133a: 657b str r3, [r7, #84] @ 0x54
|
|
|
|
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
|
|
800133c: 687b ldr r3, [r7, #4]
|
|
800133e: 681b ldr r3, [r3, #0]
|
|
8001340: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001344: b29b uxth r3, r3
|
|
8001346: 461a mov r2, r3
|
|
8001348: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800134a: 781b ldrb r3, [r3, #0]
|
|
800134c: 00db lsls r3, r3, #3
|
|
800134e: 4413 add r3, r2
|
|
8001350: 687a ldr r2, [r7, #4]
|
|
8001352: 6812 ldr r2, [r2, #0]
|
|
8001354: 4413 add r3, r2
|
|
8001356: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
800135a: 881b ldrh r3, [r3, #0]
|
|
800135c: f3c3 0209 ubfx r2, r3, #0, #10
|
|
8001360: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001362: 61da str r2, [r3, #28]
|
|
ep->xfer_buff += ep->xfer_count;
|
|
8001364: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001366: 695a ldr r2, [r3, #20]
|
|
8001368: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800136a: 69db ldr r3, [r3, #28]
|
|
800136c: 441a add r2, r3
|
|
800136e: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001370: 615a str r2, [r3, #20]
|
|
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, 0U);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, 0U);
|
|
8001372: 2100 movs r1, #0
|
|
8001374: 6878 ldr r0, [r7, #4]
|
|
8001376: f007 f984 bl 8008682 <HAL_PCD_DataInStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
|
|
800137a: 687b ldr r3, [r7, #4]
|
|
800137c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
|
|
8001380: b2db uxtb r3, r3
|
|
8001382: 2b00 cmp r3, #0
|
|
8001384: f000 835e beq.w 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
8001388: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800138a: 699b ldr r3, [r3, #24]
|
|
800138c: 2b00 cmp r3, #0
|
|
800138e: f040 8359 bne.w 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
{
|
|
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
|
|
8001392: 687b ldr r3, [r7, #4]
|
|
8001394: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
|
|
8001398: b2db uxtb r3, r3
|
|
800139a: f063 037f orn r3, r3, #127 @ 0x7f
|
|
800139e: b2da uxtb r2, r3
|
|
80013a0: 687b ldr r3, [r7, #4]
|
|
80013a2: 681b ldr r3, [r3, #0]
|
|
80013a4: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
|
|
hpcd->USB_Address = 0U;
|
|
80013a8: 687b ldr r3, [r7, #4]
|
|
80013aa: 2200 movs r2, #0
|
|
80013ac: f883 2024 strb.w r2, [r3, #36] @ 0x24
|
|
80013b0: e348 b.n 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
{
|
|
/* DIR = 1 */
|
|
|
|
/* DIR = 1 & CTR_RX => SETUP or OUT int */
|
|
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
|
|
ep = &hpcd->OUT_ep[0];
|
|
80013b2: 687b ldr r3, [r7, #4]
|
|
80013b4: f503 73b4 add.w r3, r3, #360 @ 0x168
|
|
80013b8: 657b str r3, [r7, #84] @ 0x54
|
|
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
|
|
80013ba: 687b ldr r3, [r7, #4]
|
|
80013bc: 681b ldr r3, [r3, #0]
|
|
80013be: 881b ldrh r3, [r3, #0]
|
|
80013c0: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
|
|
|
|
if ((wEPVal & USB_EP_SETUP) != 0U)
|
|
80013c4: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
|
|
80013c8: f403 6300 and.w r3, r3, #2048 @ 0x800
|
|
80013cc: 2b00 cmp r3, #0
|
|
80013ce: d032 beq.n 8001436 <PCD_EP_ISR_Handler+0x15e>
|
|
{
|
|
/* Get SETUP Packet */
|
|
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
|
|
80013d0: 687b ldr r3, [r7, #4]
|
|
80013d2: 681b ldr r3, [r3, #0]
|
|
80013d4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80013d8: b29b uxth r3, r3
|
|
80013da: 461a mov r2, r3
|
|
80013dc: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80013de: 781b ldrb r3, [r3, #0]
|
|
80013e0: 00db lsls r3, r3, #3
|
|
80013e2: 4413 add r3, r2
|
|
80013e4: 687a ldr r2, [r7, #4]
|
|
80013e6: 6812 ldr r2, [r2, #0]
|
|
80013e8: 4413 add r3, r2
|
|
80013ea: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
80013ee: 881b ldrh r3, [r3, #0]
|
|
80013f0: f3c3 0209 ubfx r2, r3, #0, #10
|
|
80013f4: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80013f6: 61da str r2, [r3, #28]
|
|
|
|
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
|
|
80013f8: 687b ldr r3, [r7, #4]
|
|
80013fa: 6818 ldr r0, [r3, #0]
|
|
80013fc: 687b ldr r3, [r7, #4]
|
|
80013fe: f503 712c add.w r1, r3, #688 @ 0x2b0
|
|
8001402: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001404: 88da ldrh r2, [r3, #6]
|
|
ep->pmaadress, (uint16_t)ep->xfer_count);
|
|
8001406: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001408: 69db ldr r3, [r3, #28]
|
|
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
|
|
800140a: b29b uxth r3, r3
|
|
800140c: f005 fb30 bl 8006a70 <USB_ReadPMA>
|
|
|
|
/* SETUP bit kept frozen while CTR_RX = 1 */
|
|
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
|
|
8001410: 687b ldr r3, [r7, #4]
|
|
8001412: 681b ldr r3, [r3, #0]
|
|
8001414: 881b ldrh r3, [r3, #0]
|
|
8001416: b29a uxth r2, r3
|
|
8001418: f640 738f movw r3, #3983 @ 0xf8f
|
|
800141c: 4013 ands r3, r2
|
|
800141e: 823b strh r3, [r7, #16]
|
|
8001420: 687b ldr r3, [r7, #4]
|
|
8001422: 681b ldr r3, [r3, #0]
|
|
8001424: 8a3a ldrh r2, [r7, #16]
|
|
8001426: f042 0280 orr.w r2, r2, #128 @ 0x80
|
|
800142a: b292 uxth r2, r2
|
|
800142c: 801a strh r2, [r3, #0]
|
|
|
|
/* Process SETUP Packet*/
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->SetupStageCallback(hpcd);
|
|
#else
|
|
HAL_PCD_SetupStageCallback(hpcd);
|
|
800142e: 6878 ldr r0, [r7, #4]
|
|
8001430: f007 f8fa bl 8008628 <HAL_PCD_SetupStageCallback>
|
|
8001434: e306 b.n 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
|
|
8001436: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
|
|
800143a: 2b00 cmp r3, #0
|
|
800143c: f280 8302 bge.w 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
{
|
|
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
|
|
8001440: 687b ldr r3, [r7, #4]
|
|
8001442: 681b ldr r3, [r3, #0]
|
|
8001444: 881b ldrh r3, [r3, #0]
|
|
8001446: b29a uxth r2, r3
|
|
8001448: f640 738f movw r3, #3983 @ 0xf8f
|
|
800144c: 4013 ands r3, r2
|
|
800144e: 83fb strh r3, [r7, #30]
|
|
8001450: 687b ldr r3, [r7, #4]
|
|
8001452: 681b ldr r3, [r3, #0]
|
|
8001454: 8bfa ldrh r2, [r7, #30]
|
|
8001456: f042 0280 orr.w r2, r2, #128 @ 0x80
|
|
800145a: b292 uxth r2, r2
|
|
800145c: 801a strh r2, [r3, #0]
|
|
|
|
/* Get Control Data OUT Packet */
|
|
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
|
|
800145e: 687b ldr r3, [r7, #4]
|
|
8001460: 681b ldr r3, [r3, #0]
|
|
8001462: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001466: b29b uxth r3, r3
|
|
8001468: 461a mov r2, r3
|
|
800146a: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800146c: 781b ldrb r3, [r3, #0]
|
|
800146e: 00db lsls r3, r3, #3
|
|
8001470: 4413 add r3, r2
|
|
8001472: 687a ldr r2, [r7, #4]
|
|
8001474: 6812 ldr r2, [r2, #0]
|
|
8001476: 4413 add r3, r2
|
|
8001478: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
800147c: 881b ldrh r3, [r3, #0]
|
|
800147e: f3c3 0209 ubfx r2, r3, #0, #10
|
|
8001482: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001484: 61da str r2, [r3, #28]
|
|
|
|
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
|
|
8001486: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001488: 69db ldr r3, [r3, #28]
|
|
800148a: 2b00 cmp r3, #0
|
|
800148c: d019 beq.n 80014c2 <PCD_EP_ISR_Handler+0x1ea>
|
|
800148e: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001490: 695b ldr r3, [r3, #20]
|
|
8001492: 2b00 cmp r3, #0
|
|
8001494: d015 beq.n 80014c2 <PCD_EP_ISR_Handler+0x1ea>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
|
|
8001496: 687b ldr r3, [r7, #4]
|
|
8001498: 6818 ldr r0, [r3, #0]
|
|
800149a: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800149c: 6959 ldr r1, [r3, #20]
|
|
800149e: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80014a0: 88da ldrh r2, [r3, #6]
|
|
ep->pmaadress, (uint16_t)ep->xfer_count);
|
|
80014a2: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80014a4: 69db ldr r3, [r3, #28]
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
|
|
80014a6: b29b uxth r3, r3
|
|
80014a8: f005 fae2 bl 8006a70 <USB_ReadPMA>
|
|
|
|
ep->xfer_buff += ep->xfer_count;
|
|
80014ac: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80014ae: 695a ldr r2, [r3, #20]
|
|
80014b0: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80014b2: 69db ldr r3, [r3, #28]
|
|
80014b4: 441a add r2, r3
|
|
80014b6: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80014b8: 615a str r2, [r3, #20]
|
|
|
|
/* Process Control Data OUT Packet */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataOutStageCallback(hpcd, 0U);
|
|
#else
|
|
HAL_PCD_DataOutStageCallback(hpcd, 0U);
|
|
80014ba: 2100 movs r1, #0
|
|
80014bc: 6878 ldr r0, [r7, #4]
|
|
80014be: f007 f8c5 bl 800864c <HAL_PCD_DataOutStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
|
|
80014c2: 687b ldr r3, [r7, #4]
|
|
80014c4: 681b ldr r3, [r3, #0]
|
|
80014c6: 881b ldrh r3, [r3, #0]
|
|
80014c8: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
|
|
|
|
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
|
|
80014cc: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
|
|
80014d0: f403 6300 and.w r3, r3, #2048 @ 0x800
|
|
80014d4: 2b00 cmp r3, #0
|
|
80014d6: f040 82b5 bne.w 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
80014da: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
|
|
80014de: f403 5340 and.w r3, r3, #12288 @ 0x3000
|
|
80014e2: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
|
|
80014e6: f000 82ad beq.w 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
{
|
|
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
|
|
80014ea: 687b ldr r3, [r7, #4]
|
|
80014ec: 681b ldr r3, [r3, #0]
|
|
80014ee: 61bb str r3, [r7, #24]
|
|
80014f0: 687b ldr r3, [r7, #4]
|
|
80014f2: 681b ldr r3, [r3, #0]
|
|
80014f4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80014f8: b29b uxth r3, r3
|
|
80014fa: 461a mov r2, r3
|
|
80014fc: 69bb ldr r3, [r7, #24]
|
|
80014fe: 4413 add r3, r2
|
|
8001500: 61bb str r3, [r7, #24]
|
|
8001502: 69bb ldr r3, [r7, #24]
|
|
8001504: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8001508: 617b str r3, [r7, #20]
|
|
800150a: 697b ldr r3, [r7, #20]
|
|
800150c: 881b ldrh r3, [r3, #0]
|
|
800150e: b29b uxth r3, r3
|
|
8001510: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001514: b29a uxth r2, r3
|
|
8001516: 697b ldr r3, [r7, #20]
|
|
8001518: 801a strh r2, [r3, #0]
|
|
800151a: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800151c: 691b ldr r3, [r3, #16]
|
|
800151e: 2b3e cmp r3, #62 @ 0x3e
|
|
8001520: d91d bls.n 800155e <PCD_EP_ISR_Handler+0x286>
|
|
8001522: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001524: 691b ldr r3, [r3, #16]
|
|
8001526: 095b lsrs r3, r3, #5
|
|
8001528: 647b str r3, [r7, #68] @ 0x44
|
|
800152a: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800152c: 691b ldr r3, [r3, #16]
|
|
800152e: f003 031f and.w r3, r3, #31
|
|
8001532: 2b00 cmp r3, #0
|
|
8001534: d102 bne.n 800153c <PCD_EP_ISR_Handler+0x264>
|
|
8001536: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
8001538: 3b01 subs r3, #1
|
|
800153a: 647b str r3, [r7, #68] @ 0x44
|
|
800153c: 697b ldr r3, [r7, #20]
|
|
800153e: 881b ldrh r3, [r3, #0]
|
|
8001540: b29a uxth r2, r3
|
|
8001542: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
8001544: b29b uxth r3, r3
|
|
8001546: 029b lsls r3, r3, #10
|
|
8001548: b29b uxth r3, r3
|
|
800154a: 4313 orrs r3, r2
|
|
800154c: b29b uxth r3, r3
|
|
800154e: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8001552: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8001556: b29a uxth r2, r3
|
|
8001558: 697b ldr r3, [r7, #20]
|
|
800155a: 801a strh r2, [r3, #0]
|
|
800155c: e026 b.n 80015ac <PCD_EP_ISR_Handler+0x2d4>
|
|
800155e: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001560: 691b ldr r3, [r3, #16]
|
|
8001562: 2b00 cmp r3, #0
|
|
8001564: d10a bne.n 800157c <PCD_EP_ISR_Handler+0x2a4>
|
|
8001566: 697b ldr r3, [r7, #20]
|
|
8001568: 881b ldrh r3, [r3, #0]
|
|
800156a: b29b uxth r3, r3
|
|
800156c: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8001570: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8001574: b29a uxth r2, r3
|
|
8001576: 697b ldr r3, [r7, #20]
|
|
8001578: 801a strh r2, [r3, #0]
|
|
800157a: e017 b.n 80015ac <PCD_EP_ISR_Handler+0x2d4>
|
|
800157c: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800157e: 691b ldr r3, [r3, #16]
|
|
8001580: 085b lsrs r3, r3, #1
|
|
8001582: 647b str r3, [r7, #68] @ 0x44
|
|
8001584: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001586: 691b ldr r3, [r3, #16]
|
|
8001588: f003 0301 and.w r3, r3, #1
|
|
800158c: 2b00 cmp r3, #0
|
|
800158e: d002 beq.n 8001596 <PCD_EP_ISR_Handler+0x2be>
|
|
8001590: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
8001592: 3301 adds r3, #1
|
|
8001594: 647b str r3, [r7, #68] @ 0x44
|
|
8001596: 697b ldr r3, [r7, #20]
|
|
8001598: 881b ldrh r3, [r3, #0]
|
|
800159a: b29a uxth r2, r3
|
|
800159c: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
800159e: b29b uxth r3, r3
|
|
80015a0: 029b lsls r3, r3, #10
|
|
80015a2: b29b uxth r3, r3
|
|
80015a4: 4313 orrs r3, r2
|
|
80015a6: b29a uxth r2, r3
|
|
80015a8: 697b ldr r3, [r7, #20]
|
|
80015aa: 801a strh r2, [r3, #0]
|
|
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
|
|
80015ac: 687b ldr r3, [r7, #4]
|
|
80015ae: 681b ldr r3, [r3, #0]
|
|
80015b0: 881b ldrh r3, [r3, #0]
|
|
80015b2: b29b uxth r3, r3
|
|
80015b4: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
80015b8: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
80015bc: 827b strh r3, [r7, #18]
|
|
80015be: 8a7b ldrh r3, [r7, #18]
|
|
80015c0: f483 5380 eor.w r3, r3, #4096 @ 0x1000
|
|
80015c4: 827b strh r3, [r7, #18]
|
|
80015c6: 8a7b ldrh r3, [r7, #18]
|
|
80015c8: f483 5300 eor.w r3, r3, #8192 @ 0x2000
|
|
80015cc: 827b strh r3, [r7, #18]
|
|
80015ce: 687b ldr r3, [r7, #4]
|
|
80015d0: 681a ldr r2, [r3, #0]
|
|
80015d2: 8a7b ldrh r3, [r7, #18]
|
|
80015d4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
80015d8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
80015dc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
80015e0: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
80015e4: b29b uxth r3, r3
|
|
80015e6: 8013 strh r3, [r2, #0]
|
|
80015e8: e22c b.n 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
}
|
|
else
|
|
{
|
|
/* Decode and service non control endpoints interrupt */
|
|
/* process related endpoint register */
|
|
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
|
|
80015ea: 687b ldr r3, [r7, #4]
|
|
80015ec: 681b ldr r3, [r3, #0]
|
|
80015ee: 461a mov r2, r3
|
|
80015f0: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
|
|
80015f4: 009b lsls r3, r3, #2
|
|
80015f6: 4413 add r3, r2
|
|
80015f8: 881b ldrh r3, [r3, #0]
|
|
80015fa: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
|
|
|
|
if ((wEPVal & USB_EP_CTR_RX) != 0U)
|
|
80015fe: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
|
|
8001602: 2b00 cmp r3, #0
|
|
8001604: f280 80f6 bge.w 80017f4 <PCD_EP_ISR_Handler+0x51c>
|
|
{
|
|
/* clear int flag */
|
|
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
|
|
8001608: 687b ldr r3, [r7, #4]
|
|
800160a: 681b ldr r3, [r3, #0]
|
|
800160c: 461a mov r2, r3
|
|
800160e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
|
|
8001612: 009b lsls r3, r3, #2
|
|
8001614: 4413 add r3, r2
|
|
8001616: 881b ldrh r3, [r3, #0]
|
|
8001618: b29a uxth r2, r3
|
|
800161a: f640 738f movw r3, #3983 @ 0xf8f
|
|
800161e: 4013 ands r3, r2
|
|
8001620: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
|
|
8001624: 687b ldr r3, [r7, #4]
|
|
8001626: 681b ldr r3, [r3, #0]
|
|
8001628: 461a mov r2, r3
|
|
800162a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
|
|
800162e: 009b lsls r3, r3, #2
|
|
8001630: 4413 add r3, r2
|
|
8001632: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
|
|
8001636: f042 0280 orr.w r2, r2, #128 @ 0x80
|
|
800163a: b292 uxth r2, r2
|
|
800163c: 801a strh r2, [r3, #0]
|
|
ep = &hpcd->OUT_ep[epindex];
|
|
800163e: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
|
|
8001642: 4613 mov r3, r2
|
|
8001644: 009b lsls r3, r3, #2
|
|
8001646: 4413 add r3, r2
|
|
8001648: 00db lsls r3, r3, #3
|
|
800164a: f503 73b4 add.w r3, r3, #360 @ 0x168
|
|
800164e: 687a ldr r2, [r7, #4]
|
|
8001650: 4413 add r3, r2
|
|
8001652: 657b str r3, [r7, #84] @ 0x54
|
|
|
|
/* OUT Single Buffering */
|
|
if (ep->doublebuffer == 0U)
|
|
8001654: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001656: 7b1b ldrb r3, [r3, #12]
|
|
8001658: 2b00 cmp r3, #0
|
|
800165a: d123 bne.n 80016a4 <PCD_EP_ISR_Handler+0x3cc>
|
|
{
|
|
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
|
|
800165c: 687b ldr r3, [r7, #4]
|
|
800165e: 681b ldr r3, [r3, #0]
|
|
8001660: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001664: b29b uxth r3, r3
|
|
8001666: 461a mov r2, r3
|
|
8001668: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800166a: 781b ldrb r3, [r3, #0]
|
|
800166c: 00db lsls r3, r3, #3
|
|
800166e: 4413 add r3, r2
|
|
8001670: 687a ldr r2, [r7, #4]
|
|
8001672: 6812 ldr r2, [r2, #0]
|
|
8001674: 4413 add r3, r2
|
|
8001676: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
800167a: 881b ldrh r3, [r3, #0]
|
|
800167c: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001680: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
|
|
|
|
if (count != 0U)
|
|
8001684: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
|
|
8001688: 2b00 cmp r3, #0
|
|
800168a: f000 808e beq.w 80017aa <PCD_EP_ISR_Handler+0x4d2>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
|
|
800168e: 687b ldr r3, [r7, #4]
|
|
8001690: 6818 ldr r0, [r3, #0]
|
|
8001692: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001694: 6959 ldr r1, [r3, #20]
|
|
8001696: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001698: 88da ldrh r2, [r3, #6]
|
|
800169a: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
|
|
800169e: f005 f9e7 bl 8006a70 <USB_ReadPMA>
|
|
80016a2: e082 b.n 80017aa <PCD_EP_ISR_Handler+0x4d2>
|
|
}
|
|
#if (USE_USB_DOUBLE_BUFFER == 1U)
|
|
else
|
|
{
|
|
/* manage double buffer bulk out */
|
|
if (ep->type == EP_TYPE_BULK)
|
|
80016a4: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80016a6: 78db ldrb r3, [r3, #3]
|
|
80016a8: 2b02 cmp r3, #2
|
|
80016aa: d10a bne.n 80016c2 <PCD_EP_ISR_Handler+0x3ea>
|
|
{
|
|
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
|
|
80016ac: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
|
|
80016b0: 461a mov r2, r3
|
|
80016b2: 6d79 ldr r1, [r7, #84] @ 0x54
|
|
80016b4: 6878 ldr r0, [r7, #4]
|
|
80016b6: f000 f9d3 bl 8001a60 <HAL_PCD_EP_DB_Receive>
|
|
80016ba: 4603 mov r3, r0
|
|
80016bc: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
|
|
80016c0: e073 b.n 80017aa <PCD_EP_ISR_Handler+0x4d2>
|
|
}
|
|
else /* manage double buffer iso out */
|
|
{
|
|
/* free EP OUT Buffer */
|
|
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
|
|
80016c2: 687b ldr r3, [r7, #4]
|
|
80016c4: 681b ldr r3, [r3, #0]
|
|
80016c6: 461a mov r2, r3
|
|
80016c8: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80016ca: 781b ldrb r3, [r3, #0]
|
|
80016cc: 009b lsls r3, r3, #2
|
|
80016ce: 4413 add r3, r2
|
|
80016d0: 881b ldrh r3, [r3, #0]
|
|
80016d2: b29b uxth r3, r3
|
|
80016d4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
80016d8: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
80016dc: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
|
|
80016e0: 687b ldr r3, [r7, #4]
|
|
80016e2: 681b ldr r3, [r3, #0]
|
|
80016e4: 461a mov r2, r3
|
|
80016e6: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80016e8: 781b ldrb r3, [r3, #0]
|
|
80016ea: 009b lsls r3, r3, #2
|
|
80016ec: 441a add r2, r3
|
|
80016ee: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
|
|
80016f2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
80016f6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
80016fa: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
80016fe: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8001702: b29b uxth r3, r3
|
|
8001704: 8013 strh r3, [r2, #0]
|
|
|
|
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
|
|
8001706: 687b ldr r3, [r7, #4]
|
|
8001708: 681b ldr r3, [r3, #0]
|
|
800170a: 461a mov r2, r3
|
|
800170c: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800170e: 781b ldrb r3, [r3, #0]
|
|
8001710: 009b lsls r3, r3, #2
|
|
8001712: 4413 add r3, r2
|
|
8001714: 881b ldrh r3, [r3, #0]
|
|
8001716: b29b uxth r3, r3
|
|
8001718: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
800171c: 2b00 cmp r3, #0
|
|
800171e: d022 beq.n 8001766 <PCD_EP_ISR_Handler+0x48e>
|
|
{
|
|
/* read from endpoint BUF0Addr buffer */
|
|
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
|
|
8001720: 687b ldr r3, [r7, #4]
|
|
8001722: 681b ldr r3, [r3, #0]
|
|
8001724: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001728: b29b uxth r3, r3
|
|
800172a: 461a mov r2, r3
|
|
800172c: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800172e: 781b ldrb r3, [r3, #0]
|
|
8001730: 00db lsls r3, r3, #3
|
|
8001732: 4413 add r3, r2
|
|
8001734: 687a ldr r2, [r7, #4]
|
|
8001736: 6812 ldr r2, [r2, #0]
|
|
8001738: 4413 add r3, r2
|
|
800173a: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
800173e: 881b ldrh r3, [r3, #0]
|
|
8001740: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001744: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
|
|
|
|
if (count != 0U)
|
|
8001748: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
|
|
800174c: 2b00 cmp r3, #0
|
|
800174e: d02c beq.n 80017aa <PCD_EP_ISR_Handler+0x4d2>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
|
|
8001750: 687b ldr r3, [r7, #4]
|
|
8001752: 6818 ldr r0, [r3, #0]
|
|
8001754: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001756: 6959 ldr r1, [r3, #20]
|
|
8001758: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800175a: 891a ldrh r2, [r3, #8]
|
|
800175c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
|
|
8001760: f005 f986 bl 8006a70 <USB_ReadPMA>
|
|
8001764: e021 b.n 80017aa <PCD_EP_ISR_Handler+0x4d2>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* read from endpoint BUF1Addr buffer */
|
|
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
|
|
8001766: 687b ldr r3, [r7, #4]
|
|
8001768: 681b ldr r3, [r3, #0]
|
|
800176a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800176e: b29b uxth r3, r3
|
|
8001770: 461a mov r2, r3
|
|
8001772: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001774: 781b ldrb r3, [r3, #0]
|
|
8001776: 00db lsls r3, r3, #3
|
|
8001778: 4413 add r3, r2
|
|
800177a: 687a ldr r2, [r7, #4]
|
|
800177c: 6812 ldr r2, [r2, #0]
|
|
800177e: 4413 add r3, r2
|
|
8001780: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8001784: 881b ldrh r3, [r3, #0]
|
|
8001786: f3c3 0309 ubfx r3, r3, #0, #10
|
|
800178a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
|
|
|
|
if (count != 0U)
|
|
800178e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
|
|
8001792: 2b00 cmp r3, #0
|
|
8001794: d009 beq.n 80017aa <PCD_EP_ISR_Handler+0x4d2>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
|
|
8001796: 687b ldr r3, [r7, #4]
|
|
8001798: 6818 ldr r0, [r3, #0]
|
|
800179a: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800179c: 6959 ldr r1, [r3, #20]
|
|
800179e: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80017a0: 895a ldrh r2, [r3, #10]
|
|
80017a2: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
|
|
80017a6: f005 f963 bl 8006a70 <USB_ReadPMA>
|
|
}
|
|
}
|
|
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
|
|
|
|
/* multi-packet on the NON control OUT endpoint */
|
|
ep->xfer_count += count;
|
|
80017aa: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80017ac: 69da ldr r2, [r3, #28]
|
|
80017ae: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
|
|
80017b2: 441a add r2, r3
|
|
80017b4: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80017b6: 61da str r2, [r3, #28]
|
|
ep->xfer_buff += count;
|
|
80017b8: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80017ba: 695a ldr r2, [r3, #20]
|
|
80017bc: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
|
|
80017c0: 441a add r2, r3
|
|
80017c2: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80017c4: 615a str r2, [r3, #20]
|
|
|
|
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
|
|
80017c6: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80017c8: 699b ldr r3, [r3, #24]
|
|
80017ca: 2b00 cmp r3, #0
|
|
80017cc: d005 beq.n 80017da <PCD_EP_ISR_Handler+0x502>
|
|
80017ce: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
|
|
80017d2: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80017d4: 691b ldr r3, [r3, #16]
|
|
80017d6: 429a cmp r2, r3
|
|
80017d8: d206 bcs.n 80017e8 <PCD_EP_ISR_Handler+0x510>
|
|
{
|
|
/* RX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataOutStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
|
|
80017da: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80017dc: 781b ldrb r3, [r3, #0]
|
|
80017de: 4619 mov r1, r3
|
|
80017e0: 6878 ldr r0, [r7, #4]
|
|
80017e2: f006 ff33 bl 800864c <HAL_PCD_DataOutStageCallback>
|
|
80017e6: e005 b.n 80017f4 <PCD_EP_ISR_Handler+0x51c>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
else
|
|
{
|
|
(void)USB_EPStartXfer(hpcd->Instance, ep);
|
|
80017e8: 687b ldr r3, [r7, #4]
|
|
80017ea: 681b ldr r3, [r3, #0]
|
|
80017ec: 6d79 ldr r1, [r7, #84] @ 0x54
|
|
80017ee: 4618 mov r0, r3
|
|
80017f0: f003 fc1d bl 800502e <USB_EPStartXfer>
|
|
}
|
|
}
|
|
|
|
if ((wEPVal & USB_EP_CTR_TX) != 0U)
|
|
80017f4: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
|
|
80017f8: f003 0380 and.w r3, r3, #128 @ 0x80
|
|
80017fc: 2b00 cmp r3, #0
|
|
80017fe: f000 8121 beq.w 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
{
|
|
ep = &hpcd->IN_ep[epindex];
|
|
8001802: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
|
|
8001806: 1c5a adds r2, r3, #1
|
|
8001808: 4613 mov r3, r2
|
|
800180a: 009b lsls r3, r3, #2
|
|
800180c: 4413 add r3, r2
|
|
800180e: 00db lsls r3, r3, #3
|
|
8001810: 687a ldr r2, [r7, #4]
|
|
8001812: 4413 add r3, r2
|
|
8001814: 657b str r3, [r7, #84] @ 0x54
|
|
|
|
/* clear int flag */
|
|
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
|
|
8001816: 687b ldr r3, [r7, #4]
|
|
8001818: 681b ldr r3, [r3, #0]
|
|
800181a: 461a mov r2, r3
|
|
800181c: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
|
|
8001820: 009b lsls r3, r3, #2
|
|
8001822: 4413 add r3, r2
|
|
8001824: 881b ldrh r3, [r3, #0]
|
|
8001826: b29b uxth r3, r3
|
|
8001828: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
|
|
800182c: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8001830: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
|
|
8001834: 687b ldr r3, [r7, #4]
|
|
8001836: 681b ldr r3, [r3, #0]
|
|
8001838: 461a mov r2, r3
|
|
800183a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
|
|
800183e: 009b lsls r3, r3, #2
|
|
8001840: 441a add r2, r3
|
|
8001842: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
|
|
8001846: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800184a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800184e: b29b uxth r3, r3
|
|
8001850: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type == EP_TYPE_ISOC)
|
|
8001852: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001854: 78db ldrb r3, [r3, #3]
|
|
8001856: 2b01 cmp r3, #1
|
|
8001858: f040 80a2 bne.w 80019a0 <PCD_EP_ISR_Handler+0x6c8>
|
|
{
|
|
ep->xfer_len = 0U;
|
|
800185c: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800185e: 2200 movs r2, #0
|
|
8001860: 619a str r2, [r3, #24]
|
|
|
|
#if (USE_USB_DOUBLE_BUFFER == 1U)
|
|
if (ep->doublebuffer != 0U)
|
|
8001862: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001864: 7b1b ldrb r3, [r3, #12]
|
|
8001866: 2b00 cmp r3, #0
|
|
8001868: f000 8093 beq.w 8001992 <PCD_EP_ISR_Handler+0x6ba>
|
|
{
|
|
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
|
|
800186c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
|
|
8001870: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8001874: 2b00 cmp r3, #0
|
|
8001876: d046 beq.n 8001906 <PCD_EP_ISR_Handler+0x62e>
|
|
{
|
|
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
|
|
8001878: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800187a: 785b ldrb r3, [r3, #1]
|
|
800187c: 2b00 cmp r3, #0
|
|
800187e: d126 bne.n 80018ce <PCD_EP_ISR_Handler+0x5f6>
|
|
8001880: 687b ldr r3, [r7, #4]
|
|
8001882: 681b ldr r3, [r3, #0]
|
|
8001884: 627b str r3, [r7, #36] @ 0x24
|
|
8001886: 687b ldr r3, [r7, #4]
|
|
8001888: 681b ldr r3, [r3, #0]
|
|
800188a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800188e: b29b uxth r3, r3
|
|
8001890: 461a mov r2, r3
|
|
8001892: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8001894: 4413 add r3, r2
|
|
8001896: 627b str r3, [r7, #36] @ 0x24
|
|
8001898: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800189a: 781b ldrb r3, [r3, #0]
|
|
800189c: 00da lsls r2, r3, #3
|
|
800189e: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80018a0: 4413 add r3, r2
|
|
80018a2: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
80018a6: 623b str r3, [r7, #32]
|
|
80018a8: 6a3b ldr r3, [r7, #32]
|
|
80018aa: 881b ldrh r3, [r3, #0]
|
|
80018ac: b29b uxth r3, r3
|
|
80018ae: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80018b2: b29a uxth r2, r3
|
|
80018b4: 6a3b ldr r3, [r7, #32]
|
|
80018b6: 801a strh r2, [r3, #0]
|
|
80018b8: 6a3b ldr r3, [r7, #32]
|
|
80018ba: 881b ldrh r3, [r3, #0]
|
|
80018bc: b29b uxth r3, r3
|
|
80018be: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80018c2: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80018c6: b29a uxth r2, r3
|
|
80018c8: 6a3b ldr r3, [r7, #32]
|
|
80018ca: 801a strh r2, [r3, #0]
|
|
80018cc: e061 b.n 8001992 <PCD_EP_ISR_Handler+0x6ba>
|
|
80018ce: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80018d0: 785b ldrb r3, [r3, #1]
|
|
80018d2: 2b01 cmp r3, #1
|
|
80018d4: d15d bne.n 8001992 <PCD_EP_ISR_Handler+0x6ba>
|
|
80018d6: 687b ldr r3, [r7, #4]
|
|
80018d8: 681b ldr r3, [r3, #0]
|
|
80018da: 62fb str r3, [r7, #44] @ 0x2c
|
|
80018dc: 687b ldr r3, [r7, #4]
|
|
80018de: 681b ldr r3, [r3, #0]
|
|
80018e0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80018e4: b29b uxth r3, r3
|
|
80018e6: 461a mov r2, r3
|
|
80018e8: 6afb ldr r3, [r7, #44] @ 0x2c
|
|
80018ea: 4413 add r3, r2
|
|
80018ec: 62fb str r3, [r7, #44] @ 0x2c
|
|
80018ee: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80018f0: 781b ldrb r3, [r3, #0]
|
|
80018f2: 00da lsls r2, r3, #3
|
|
80018f4: 6afb ldr r3, [r7, #44] @ 0x2c
|
|
80018f6: 4413 add r3, r2
|
|
80018f8: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
80018fc: 62bb str r3, [r7, #40] @ 0x28
|
|
80018fe: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8001900: 2200 movs r2, #0
|
|
8001902: 801a strh r2, [r3, #0]
|
|
8001904: e045 b.n 8001992 <PCD_EP_ISR_Handler+0x6ba>
|
|
}
|
|
else
|
|
{
|
|
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
|
|
8001906: 687b ldr r3, [r7, #4]
|
|
8001908: 681b ldr r3, [r3, #0]
|
|
800190a: 63fb str r3, [r7, #60] @ 0x3c
|
|
800190c: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800190e: 785b ldrb r3, [r3, #1]
|
|
8001910: 2b00 cmp r3, #0
|
|
8001912: d126 bne.n 8001962 <PCD_EP_ISR_Handler+0x68a>
|
|
8001914: 687b ldr r3, [r7, #4]
|
|
8001916: 681b ldr r3, [r3, #0]
|
|
8001918: 637b str r3, [r7, #52] @ 0x34
|
|
800191a: 687b ldr r3, [r7, #4]
|
|
800191c: 681b ldr r3, [r3, #0]
|
|
800191e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001922: b29b uxth r3, r3
|
|
8001924: 461a mov r2, r3
|
|
8001926: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
8001928: 4413 add r3, r2
|
|
800192a: 637b str r3, [r7, #52] @ 0x34
|
|
800192c: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800192e: 781b ldrb r3, [r3, #0]
|
|
8001930: 00da lsls r2, r3, #3
|
|
8001932: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
8001934: 4413 add r3, r2
|
|
8001936: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
800193a: 633b str r3, [r7, #48] @ 0x30
|
|
800193c: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
800193e: 881b ldrh r3, [r3, #0]
|
|
8001940: b29b uxth r3, r3
|
|
8001942: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001946: b29a uxth r2, r3
|
|
8001948: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
800194a: 801a strh r2, [r3, #0]
|
|
800194c: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
800194e: 881b ldrh r3, [r3, #0]
|
|
8001950: b29b uxth r3, r3
|
|
8001952: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8001956: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800195a: b29a uxth r2, r3
|
|
800195c: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
800195e: 801a strh r2, [r3, #0]
|
|
8001960: e017 b.n 8001992 <PCD_EP_ISR_Handler+0x6ba>
|
|
8001962: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001964: 785b ldrb r3, [r3, #1]
|
|
8001966: 2b01 cmp r3, #1
|
|
8001968: d113 bne.n 8001992 <PCD_EP_ISR_Handler+0x6ba>
|
|
800196a: 687b ldr r3, [r7, #4]
|
|
800196c: 681b ldr r3, [r3, #0]
|
|
800196e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001972: b29b uxth r3, r3
|
|
8001974: 461a mov r2, r3
|
|
8001976: 6bfb ldr r3, [r7, #60] @ 0x3c
|
|
8001978: 4413 add r3, r2
|
|
800197a: 63fb str r3, [r7, #60] @ 0x3c
|
|
800197c: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800197e: 781b ldrb r3, [r3, #0]
|
|
8001980: 00da lsls r2, r3, #3
|
|
8001982: 6bfb ldr r3, [r7, #60] @ 0x3c
|
|
8001984: 4413 add r3, r2
|
|
8001986: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
800198a: 63bb str r3, [r7, #56] @ 0x38
|
|
800198c: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
800198e: 2200 movs r2, #0
|
|
8001990: 801a strh r2, [r3, #0]
|
|
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, ep->num);
|
|
8001992: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001994: 781b ldrb r3, [r3, #0]
|
|
8001996: 4619 mov r1, r3
|
|
8001998: 6878 ldr r0, [r7, #4]
|
|
800199a: f006 fe72 bl 8008682 <HAL_PCD_DataInStageCallback>
|
|
800199e: e051 b.n 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
else
|
|
{
|
|
/* Manage Single Buffer Transaction */
|
|
if ((wEPVal & USB_EP_KIND) == 0U)
|
|
80019a0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
|
|
80019a4: f403 7380 and.w r3, r3, #256 @ 0x100
|
|
80019a8: 2b00 cmp r3, #0
|
|
80019aa: d144 bne.n 8001a36 <PCD_EP_ISR_Handler+0x75e>
|
|
{
|
|
/* multi-packet on the NON control IN endpoint */
|
|
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
|
|
80019ac: 687b ldr r3, [r7, #4]
|
|
80019ae: 681b ldr r3, [r3, #0]
|
|
80019b0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80019b4: b29b uxth r3, r3
|
|
80019b6: 461a mov r2, r3
|
|
80019b8: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80019ba: 781b ldrb r3, [r3, #0]
|
|
80019bc: 00db lsls r3, r3, #3
|
|
80019be: 4413 add r3, r2
|
|
80019c0: 687a ldr r2, [r7, #4]
|
|
80019c2: 6812 ldr r2, [r2, #0]
|
|
80019c4: 4413 add r3, r2
|
|
80019c6: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
80019ca: 881b ldrh r3, [r3, #0]
|
|
80019cc: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80019d0: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
|
|
|
|
if (ep->xfer_len > TxPctSize)
|
|
80019d4: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80019d6: 699a ldr r2, [r3, #24]
|
|
80019d8: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
|
|
80019dc: 429a cmp r2, r3
|
|
80019de: d907 bls.n 80019f0 <PCD_EP_ISR_Handler+0x718>
|
|
{
|
|
ep->xfer_len -= TxPctSize;
|
|
80019e0: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80019e2: 699a ldr r2, [r3, #24]
|
|
80019e4: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
|
|
80019e8: 1ad2 subs r2, r2, r3
|
|
80019ea: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80019ec: 619a str r2, [r3, #24]
|
|
80019ee: e002 b.n 80019f6 <PCD_EP_ISR_Handler+0x71e>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
80019f0: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80019f2: 2200 movs r2, #0
|
|
80019f4: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
/* Zero Length Packet? */
|
|
if (ep->xfer_len == 0U)
|
|
80019f6: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80019f8: 699b ldr r3, [r3, #24]
|
|
80019fa: 2b00 cmp r3, #0
|
|
80019fc: d106 bne.n 8001a0c <PCD_EP_ISR_Handler+0x734>
|
|
{
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, ep->num);
|
|
80019fe: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001a00: 781b ldrb r3, [r3, #0]
|
|
8001a02: 4619 mov r1, r3
|
|
8001a04: 6878 ldr r0, [r7, #4]
|
|
8001a06: f006 fe3c bl 8008682 <HAL_PCD_DataInStageCallback>
|
|
8001a0a: e01b b.n 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
}
|
|
else
|
|
{
|
|
/* Transfer is not yet Done */
|
|
ep->xfer_buff += TxPctSize;
|
|
8001a0c: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001a0e: 695a ldr r2, [r3, #20]
|
|
8001a10: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
|
|
8001a14: 441a add r2, r3
|
|
8001a16: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001a18: 615a str r2, [r3, #20]
|
|
ep->xfer_count += TxPctSize;
|
|
8001a1a: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001a1c: 69da ldr r2, [r3, #28]
|
|
8001a1e: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
|
|
8001a22: 441a add r2, r3
|
|
8001a24: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8001a26: 61da str r2, [r3, #28]
|
|
(void)USB_EPStartXfer(hpcd->Instance, ep);
|
|
8001a28: 687b ldr r3, [r7, #4]
|
|
8001a2a: 681b ldr r3, [r3, #0]
|
|
8001a2c: 6d79 ldr r1, [r7, #84] @ 0x54
|
|
8001a2e: 4618 mov r0, r3
|
|
8001a30: f003 fafd bl 800502e <USB_EPStartXfer>
|
|
8001a34: e006 b.n 8001a44 <PCD_EP_ISR_Handler+0x76c>
|
|
}
|
|
#if (USE_USB_DOUBLE_BUFFER == 1U)
|
|
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
|
|
else
|
|
{
|
|
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
|
|
8001a36: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
|
|
8001a3a: 461a mov r2, r3
|
|
8001a3c: 6d79 ldr r1, [r7, #84] @ 0x54
|
|
8001a3e: 6878 ldr r0, [r7, #4]
|
|
8001a40: f000 f917 bl 8001c72 <HAL_PCD_EP_DB_Transmit>
|
|
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
|
|
8001a44: 687b ldr r3, [r7, #4]
|
|
8001a46: 681b ldr r3, [r3, #0]
|
|
8001a48: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
8001a4c: b29b uxth r3, r3
|
|
8001a4e: b21b sxth r3, r3
|
|
8001a50: 2b00 cmp r3, #0
|
|
8001a52: f6ff ac46 blt.w 80012e2 <PCD_EP_ISR_Handler+0xa>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8001a56: 2300 movs r3, #0
|
|
}
|
|
8001a58: 4618 mov r0, r3
|
|
8001a5a: 3758 adds r7, #88 @ 0x58
|
|
8001a5c: 46bd mov sp, r7
|
|
8001a5e: bd80 pop {r7, pc}
|
|
|
|
08001a60 <HAL_PCD_EP_DB_Receive>:
|
|
* @param wEPVal Last snapshot of EPRx register value taken in ISR
|
|
* @retval HAL status
|
|
*/
|
|
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
|
|
PCD_EPTypeDef *ep, uint16_t wEPVal)
|
|
{
|
|
8001a60: b580 push {r7, lr}
|
|
8001a62: b088 sub sp, #32
|
|
8001a64: af00 add r7, sp, #0
|
|
8001a66: 60f8 str r0, [r7, #12]
|
|
8001a68: 60b9 str r1, [r7, #8]
|
|
8001a6a: 4613 mov r3, r2
|
|
8001a6c: 80fb strh r3, [r7, #6]
|
|
uint16_t count;
|
|
|
|
/* Manage Buffer0 OUT */
|
|
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
|
|
8001a6e: 88fb ldrh r3, [r7, #6]
|
|
8001a70: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8001a74: 2b00 cmp r3, #0
|
|
8001a76: d07c beq.n 8001b72 <HAL_PCD_EP_DB_Receive+0x112>
|
|
{
|
|
/* Get count of received Data on buffer0 */
|
|
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
|
|
8001a78: 68fb ldr r3, [r7, #12]
|
|
8001a7a: 681b ldr r3, [r3, #0]
|
|
8001a7c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001a80: b29b uxth r3, r3
|
|
8001a82: 461a mov r2, r3
|
|
8001a84: 68bb ldr r3, [r7, #8]
|
|
8001a86: 781b ldrb r3, [r3, #0]
|
|
8001a88: 00db lsls r3, r3, #3
|
|
8001a8a: 4413 add r3, r2
|
|
8001a8c: 68fa ldr r2, [r7, #12]
|
|
8001a8e: 6812 ldr r2, [r2, #0]
|
|
8001a90: 4413 add r3, r2
|
|
8001a92: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8001a96: 881b ldrh r3, [r3, #0]
|
|
8001a98: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001a9c: 837b strh r3, [r7, #26]
|
|
|
|
if (ep->xfer_len >= count)
|
|
8001a9e: 68bb ldr r3, [r7, #8]
|
|
8001aa0: 699a ldr r2, [r3, #24]
|
|
8001aa2: 8b7b ldrh r3, [r7, #26]
|
|
8001aa4: 429a cmp r2, r3
|
|
8001aa6: d306 bcc.n 8001ab6 <HAL_PCD_EP_DB_Receive+0x56>
|
|
{
|
|
ep->xfer_len -= count;
|
|
8001aa8: 68bb ldr r3, [r7, #8]
|
|
8001aaa: 699a ldr r2, [r3, #24]
|
|
8001aac: 8b7b ldrh r3, [r7, #26]
|
|
8001aae: 1ad2 subs r2, r2, r3
|
|
8001ab0: 68bb ldr r3, [r7, #8]
|
|
8001ab2: 619a str r2, [r3, #24]
|
|
8001ab4: e002 b.n 8001abc <HAL_PCD_EP_DB_Receive+0x5c>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
8001ab6: 68bb ldr r3, [r7, #8]
|
|
8001ab8: 2200 movs r2, #0
|
|
8001aba: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
if (ep->xfer_len == 0U)
|
|
8001abc: 68bb ldr r3, [r7, #8]
|
|
8001abe: 699b ldr r3, [r3, #24]
|
|
8001ac0: 2b00 cmp r3, #0
|
|
8001ac2: d123 bne.n 8001b0c <HAL_PCD_EP_DB_Receive+0xac>
|
|
{
|
|
/* set NAK to OUT endpoint since double buffer is enabled */
|
|
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
|
|
8001ac4: 68fb ldr r3, [r7, #12]
|
|
8001ac6: 681b ldr r3, [r3, #0]
|
|
8001ac8: 461a mov r2, r3
|
|
8001aca: 68bb ldr r3, [r7, #8]
|
|
8001acc: 781b ldrb r3, [r3, #0]
|
|
8001ace: 009b lsls r3, r3, #2
|
|
8001ad0: 4413 add r3, r2
|
|
8001ad2: 881b ldrh r3, [r3, #0]
|
|
8001ad4: b29b uxth r3, r3
|
|
8001ad6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
8001ada: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8001ade: 833b strh r3, [r7, #24]
|
|
8001ae0: 8b3b ldrh r3, [r7, #24]
|
|
8001ae2: f483 5300 eor.w r3, r3, #8192 @ 0x2000
|
|
8001ae6: 833b strh r3, [r7, #24]
|
|
8001ae8: 68fb ldr r3, [r7, #12]
|
|
8001aea: 681b ldr r3, [r3, #0]
|
|
8001aec: 461a mov r2, r3
|
|
8001aee: 68bb ldr r3, [r7, #8]
|
|
8001af0: 781b ldrb r3, [r3, #0]
|
|
8001af2: 009b lsls r3, r3, #2
|
|
8001af4: 441a add r2, r3
|
|
8001af6: 8b3b ldrh r3, [r7, #24]
|
|
8001af8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8001afc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8001b00: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8001b04: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8001b08: b29b uxth r3, r3
|
|
8001b0a: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
/* Check if Buffer1 is in blocked state which requires to toggle */
|
|
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
|
|
8001b0c: 88fb ldrh r3, [r7, #6]
|
|
8001b0e: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8001b12: 2b00 cmp r3, #0
|
|
8001b14: d01f beq.n 8001b56 <HAL_PCD_EP_DB_Receive+0xf6>
|
|
{
|
|
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
|
|
8001b16: 68fb ldr r3, [r7, #12]
|
|
8001b18: 681b ldr r3, [r3, #0]
|
|
8001b1a: 461a mov r2, r3
|
|
8001b1c: 68bb ldr r3, [r7, #8]
|
|
8001b1e: 781b ldrb r3, [r3, #0]
|
|
8001b20: 009b lsls r3, r3, #2
|
|
8001b22: 4413 add r3, r2
|
|
8001b24: 881b ldrh r3, [r3, #0]
|
|
8001b26: b29b uxth r3, r3
|
|
8001b28: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8001b2c: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8001b30: 82fb strh r3, [r7, #22]
|
|
8001b32: 68fb ldr r3, [r7, #12]
|
|
8001b34: 681b ldr r3, [r3, #0]
|
|
8001b36: 461a mov r2, r3
|
|
8001b38: 68bb ldr r3, [r7, #8]
|
|
8001b3a: 781b ldrb r3, [r3, #0]
|
|
8001b3c: 009b lsls r3, r3, #2
|
|
8001b3e: 441a add r2, r3
|
|
8001b40: 8afb ldrh r3, [r7, #22]
|
|
8001b42: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8001b46: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8001b4a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8001b4e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8001b52: b29b uxth r3, r3
|
|
8001b54: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
if (count != 0U)
|
|
8001b56: 8b7b ldrh r3, [r7, #26]
|
|
8001b58: 2b00 cmp r3, #0
|
|
8001b5a: f000 8085 beq.w 8001c68 <HAL_PCD_EP_DB_Receive+0x208>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
|
|
8001b5e: 68fb ldr r3, [r7, #12]
|
|
8001b60: 6818 ldr r0, [r3, #0]
|
|
8001b62: 68bb ldr r3, [r7, #8]
|
|
8001b64: 6959 ldr r1, [r3, #20]
|
|
8001b66: 68bb ldr r3, [r7, #8]
|
|
8001b68: 891a ldrh r2, [r3, #8]
|
|
8001b6a: 8b7b ldrh r3, [r7, #26]
|
|
8001b6c: f004 ff80 bl 8006a70 <USB_ReadPMA>
|
|
8001b70: e07a b.n 8001c68 <HAL_PCD_EP_DB_Receive+0x208>
|
|
}
|
|
/* Manage Buffer 1 DTOG_RX=0 */
|
|
else
|
|
{
|
|
/* Get count of received data */
|
|
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
|
|
8001b72: 68fb ldr r3, [r7, #12]
|
|
8001b74: 681b ldr r3, [r3, #0]
|
|
8001b76: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001b7a: b29b uxth r3, r3
|
|
8001b7c: 461a mov r2, r3
|
|
8001b7e: 68bb ldr r3, [r7, #8]
|
|
8001b80: 781b ldrb r3, [r3, #0]
|
|
8001b82: 00db lsls r3, r3, #3
|
|
8001b84: 4413 add r3, r2
|
|
8001b86: 68fa ldr r2, [r7, #12]
|
|
8001b88: 6812 ldr r2, [r2, #0]
|
|
8001b8a: 4413 add r3, r2
|
|
8001b8c: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8001b90: 881b ldrh r3, [r3, #0]
|
|
8001b92: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001b96: 837b strh r3, [r7, #26]
|
|
|
|
if (ep->xfer_len >= count)
|
|
8001b98: 68bb ldr r3, [r7, #8]
|
|
8001b9a: 699a ldr r2, [r3, #24]
|
|
8001b9c: 8b7b ldrh r3, [r7, #26]
|
|
8001b9e: 429a cmp r2, r3
|
|
8001ba0: d306 bcc.n 8001bb0 <HAL_PCD_EP_DB_Receive+0x150>
|
|
{
|
|
ep->xfer_len -= count;
|
|
8001ba2: 68bb ldr r3, [r7, #8]
|
|
8001ba4: 699a ldr r2, [r3, #24]
|
|
8001ba6: 8b7b ldrh r3, [r7, #26]
|
|
8001ba8: 1ad2 subs r2, r2, r3
|
|
8001baa: 68bb ldr r3, [r7, #8]
|
|
8001bac: 619a str r2, [r3, #24]
|
|
8001bae: e002 b.n 8001bb6 <HAL_PCD_EP_DB_Receive+0x156>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
8001bb0: 68bb ldr r3, [r7, #8]
|
|
8001bb2: 2200 movs r2, #0
|
|
8001bb4: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
if (ep->xfer_len == 0U)
|
|
8001bb6: 68bb ldr r3, [r7, #8]
|
|
8001bb8: 699b ldr r3, [r3, #24]
|
|
8001bba: 2b00 cmp r3, #0
|
|
8001bbc: d123 bne.n 8001c06 <HAL_PCD_EP_DB_Receive+0x1a6>
|
|
{
|
|
/* set NAK on the current endpoint */
|
|
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
|
|
8001bbe: 68fb ldr r3, [r7, #12]
|
|
8001bc0: 681b ldr r3, [r3, #0]
|
|
8001bc2: 461a mov r2, r3
|
|
8001bc4: 68bb ldr r3, [r7, #8]
|
|
8001bc6: 781b ldrb r3, [r3, #0]
|
|
8001bc8: 009b lsls r3, r3, #2
|
|
8001bca: 4413 add r3, r2
|
|
8001bcc: 881b ldrh r3, [r3, #0]
|
|
8001bce: b29b uxth r3, r3
|
|
8001bd0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
8001bd4: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8001bd8: 83fb strh r3, [r7, #30]
|
|
8001bda: 8bfb ldrh r3, [r7, #30]
|
|
8001bdc: f483 5300 eor.w r3, r3, #8192 @ 0x2000
|
|
8001be0: 83fb strh r3, [r7, #30]
|
|
8001be2: 68fb ldr r3, [r7, #12]
|
|
8001be4: 681b ldr r3, [r3, #0]
|
|
8001be6: 461a mov r2, r3
|
|
8001be8: 68bb ldr r3, [r7, #8]
|
|
8001bea: 781b ldrb r3, [r3, #0]
|
|
8001bec: 009b lsls r3, r3, #2
|
|
8001bee: 441a add r2, r3
|
|
8001bf0: 8bfb ldrh r3, [r7, #30]
|
|
8001bf2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8001bf6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8001bfa: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8001bfe: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8001c02: b29b uxth r3, r3
|
|
8001c04: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
/*Need to FreeUser Buffer*/
|
|
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
|
|
8001c06: 88fb ldrh r3, [r7, #6]
|
|
8001c08: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8001c0c: 2b00 cmp r3, #0
|
|
8001c0e: d11f bne.n 8001c50 <HAL_PCD_EP_DB_Receive+0x1f0>
|
|
{
|
|
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
|
|
8001c10: 68fb ldr r3, [r7, #12]
|
|
8001c12: 681b ldr r3, [r3, #0]
|
|
8001c14: 461a mov r2, r3
|
|
8001c16: 68bb ldr r3, [r7, #8]
|
|
8001c18: 781b ldrb r3, [r3, #0]
|
|
8001c1a: 009b lsls r3, r3, #2
|
|
8001c1c: 4413 add r3, r2
|
|
8001c1e: 881b ldrh r3, [r3, #0]
|
|
8001c20: b29b uxth r3, r3
|
|
8001c22: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8001c26: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8001c2a: 83bb strh r3, [r7, #28]
|
|
8001c2c: 68fb ldr r3, [r7, #12]
|
|
8001c2e: 681b ldr r3, [r3, #0]
|
|
8001c30: 461a mov r2, r3
|
|
8001c32: 68bb ldr r3, [r7, #8]
|
|
8001c34: 781b ldrb r3, [r3, #0]
|
|
8001c36: 009b lsls r3, r3, #2
|
|
8001c38: 441a add r2, r3
|
|
8001c3a: 8bbb ldrh r3, [r7, #28]
|
|
8001c3c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8001c40: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8001c44: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8001c48: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8001c4c: b29b uxth r3, r3
|
|
8001c4e: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
if (count != 0U)
|
|
8001c50: 8b7b ldrh r3, [r7, #26]
|
|
8001c52: 2b00 cmp r3, #0
|
|
8001c54: d008 beq.n 8001c68 <HAL_PCD_EP_DB_Receive+0x208>
|
|
{
|
|
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
|
|
8001c56: 68fb ldr r3, [r7, #12]
|
|
8001c58: 6818 ldr r0, [r3, #0]
|
|
8001c5a: 68bb ldr r3, [r7, #8]
|
|
8001c5c: 6959 ldr r1, [r3, #20]
|
|
8001c5e: 68bb ldr r3, [r7, #8]
|
|
8001c60: 895a ldrh r2, [r3, #10]
|
|
8001c62: 8b7b ldrh r3, [r7, #26]
|
|
8001c64: f004 ff04 bl 8006a70 <USB_ReadPMA>
|
|
}
|
|
}
|
|
|
|
return count;
|
|
8001c68: 8b7b ldrh r3, [r7, #26]
|
|
}
|
|
8001c6a: 4618 mov r0, r3
|
|
8001c6c: 3720 adds r7, #32
|
|
8001c6e: 46bd mov sp, r7
|
|
8001c70: bd80 pop {r7, pc}
|
|
|
|
08001c72 <HAL_PCD_EP_DB_Transmit>:
|
|
* @param wEPVal Last snapshot of EPRx register value taken in ISR
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
|
|
PCD_EPTypeDef *ep, uint16_t wEPVal)
|
|
{
|
|
8001c72: b580 push {r7, lr}
|
|
8001c74: b0a4 sub sp, #144 @ 0x90
|
|
8001c76: af00 add r7, sp, #0
|
|
8001c78: 60f8 str r0, [r7, #12]
|
|
8001c7a: 60b9 str r1, [r7, #8]
|
|
8001c7c: 4613 mov r3, r2
|
|
8001c7e: 80fb strh r3, [r7, #6]
|
|
uint32_t len;
|
|
uint16_t TxPctSize;
|
|
|
|
/* Data Buffer0 ACK received */
|
|
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
|
|
8001c80: 88fb ldrh r3, [r7, #6]
|
|
8001c82: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8001c86: 2b00 cmp r3, #0
|
|
8001c88: f000 81db beq.w 8002042 <HAL_PCD_EP_DB_Transmit+0x3d0>
|
|
{
|
|
/* multi-packet on the NON control IN endpoint */
|
|
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
|
|
8001c8c: 68fb ldr r3, [r7, #12]
|
|
8001c8e: 681b ldr r3, [r3, #0]
|
|
8001c90: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001c94: b29b uxth r3, r3
|
|
8001c96: 461a mov r2, r3
|
|
8001c98: 68bb ldr r3, [r7, #8]
|
|
8001c9a: 781b ldrb r3, [r3, #0]
|
|
8001c9c: 00db lsls r3, r3, #3
|
|
8001c9e: 4413 add r3, r2
|
|
8001ca0: 68fa ldr r2, [r7, #12]
|
|
8001ca2: 6812 ldr r2, [r2, #0]
|
|
8001ca4: 4413 add r3, r2
|
|
8001ca6: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8001caa: 881b ldrh r3, [r3, #0]
|
|
8001cac: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001cb0: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
|
|
|
|
if (ep->xfer_len > TxPctSize)
|
|
8001cb4: 68bb ldr r3, [r7, #8]
|
|
8001cb6: 699a ldr r2, [r3, #24]
|
|
8001cb8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
8001cbc: 429a cmp r2, r3
|
|
8001cbe: d907 bls.n 8001cd0 <HAL_PCD_EP_DB_Transmit+0x5e>
|
|
{
|
|
ep->xfer_len -= TxPctSize;
|
|
8001cc0: 68bb ldr r3, [r7, #8]
|
|
8001cc2: 699a ldr r2, [r3, #24]
|
|
8001cc4: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
8001cc8: 1ad2 subs r2, r2, r3
|
|
8001cca: 68bb ldr r3, [r7, #8]
|
|
8001ccc: 619a str r2, [r3, #24]
|
|
8001cce: e002 b.n 8001cd6 <HAL_PCD_EP_DB_Transmit+0x64>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
8001cd0: 68bb ldr r3, [r7, #8]
|
|
8001cd2: 2200 movs r2, #0
|
|
8001cd4: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
/* Transfer is completed */
|
|
if (ep->xfer_len == 0U)
|
|
8001cd6: 68bb ldr r3, [r7, #8]
|
|
8001cd8: 699b ldr r3, [r3, #24]
|
|
8001cda: 2b00 cmp r3, #0
|
|
8001cdc: f040 80b9 bne.w 8001e52 <HAL_PCD_EP_DB_Transmit+0x1e0>
|
|
{
|
|
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
|
|
8001ce0: 68bb ldr r3, [r7, #8]
|
|
8001ce2: 785b ldrb r3, [r3, #1]
|
|
8001ce4: 2b00 cmp r3, #0
|
|
8001ce6: d126 bne.n 8001d36 <HAL_PCD_EP_DB_Transmit+0xc4>
|
|
8001ce8: 68fb ldr r3, [r7, #12]
|
|
8001cea: 681b ldr r3, [r3, #0]
|
|
8001cec: 62fb str r3, [r7, #44] @ 0x2c
|
|
8001cee: 68fb ldr r3, [r7, #12]
|
|
8001cf0: 681b ldr r3, [r3, #0]
|
|
8001cf2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001cf6: b29b uxth r3, r3
|
|
8001cf8: 461a mov r2, r3
|
|
8001cfa: 6afb ldr r3, [r7, #44] @ 0x2c
|
|
8001cfc: 4413 add r3, r2
|
|
8001cfe: 62fb str r3, [r7, #44] @ 0x2c
|
|
8001d00: 68bb ldr r3, [r7, #8]
|
|
8001d02: 781b ldrb r3, [r3, #0]
|
|
8001d04: 00da lsls r2, r3, #3
|
|
8001d06: 6afb ldr r3, [r7, #44] @ 0x2c
|
|
8001d08: 4413 add r3, r2
|
|
8001d0a: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8001d0e: 62bb str r3, [r7, #40] @ 0x28
|
|
8001d10: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8001d12: 881b ldrh r3, [r3, #0]
|
|
8001d14: b29b uxth r3, r3
|
|
8001d16: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001d1a: b29a uxth r2, r3
|
|
8001d1c: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8001d1e: 801a strh r2, [r3, #0]
|
|
8001d20: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8001d22: 881b ldrh r3, [r3, #0]
|
|
8001d24: b29b uxth r3, r3
|
|
8001d26: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8001d2a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8001d2e: b29a uxth r2, r3
|
|
8001d30: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8001d32: 801a strh r2, [r3, #0]
|
|
8001d34: e01a b.n 8001d6c <HAL_PCD_EP_DB_Transmit+0xfa>
|
|
8001d36: 68bb ldr r3, [r7, #8]
|
|
8001d38: 785b ldrb r3, [r3, #1]
|
|
8001d3a: 2b01 cmp r3, #1
|
|
8001d3c: d116 bne.n 8001d6c <HAL_PCD_EP_DB_Transmit+0xfa>
|
|
8001d3e: 68fb ldr r3, [r7, #12]
|
|
8001d40: 681b ldr r3, [r3, #0]
|
|
8001d42: 637b str r3, [r7, #52] @ 0x34
|
|
8001d44: 68fb ldr r3, [r7, #12]
|
|
8001d46: 681b ldr r3, [r3, #0]
|
|
8001d48: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001d4c: b29b uxth r3, r3
|
|
8001d4e: 461a mov r2, r3
|
|
8001d50: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
8001d52: 4413 add r3, r2
|
|
8001d54: 637b str r3, [r7, #52] @ 0x34
|
|
8001d56: 68bb ldr r3, [r7, #8]
|
|
8001d58: 781b ldrb r3, [r3, #0]
|
|
8001d5a: 00da lsls r2, r3, #3
|
|
8001d5c: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
8001d5e: 4413 add r3, r2
|
|
8001d60: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8001d64: 633b str r3, [r7, #48] @ 0x30
|
|
8001d66: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
8001d68: 2200 movs r2, #0
|
|
8001d6a: 801a strh r2, [r3, #0]
|
|
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
|
|
8001d6c: 68fb ldr r3, [r7, #12]
|
|
8001d6e: 681b ldr r3, [r3, #0]
|
|
8001d70: 627b str r3, [r7, #36] @ 0x24
|
|
8001d72: 68bb ldr r3, [r7, #8]
|
|
8001d74: 785b ldrb r3, [r3, #1]
|
|
8001d76: 2b00 cmp r3, #0
|
|
8001d78: d126 bne.n 8001dc8 <HAL_PCD_EP_DB_Transmit+0x156>
|
|
8001d7a: 68fb ldr r3, [r7, #12]
|
|
8001d7c: 681b ldr r3, [r3, #0]
|
|
8001d7e: 61fb str r3, [r7, #28]
|
|
8001d80: 68fb ldr r3, [r7, #12]
|
|
8001d82: 681b ldr r3, [r3, #0]
|
|
8001d84: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001d88: b29b uxth r3, r3
|
|
8001d8a: 461a mov r2, r3
|
|
8001d8c: 69fb ldr r3, [r7, #28]
|
|
8001d8e: 4413 add r3, r2
|
|
8001d90: 61fb str r3, [r7, #28]
|
|
8001d92: 68bb ldr r3, [r7, #8]
|
|
8001d94: 781b ldrb r3, [r3, #0]
|
|
8001d96: 00da lsls r2, r3, #3
|
|
8001d98: 69fb ldr r3, [r7, #28]
|
|
8001d9a: 4413 add r3, r2
|
|
8001d9c: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8001da0: 61bb str r3, [r7, #24]
|
|
8001da2: 69bb ldr r3, [r7, #24]
|
|
8001da4: 881b ldrh r3, [r3, #0]
|
|
8001da6: b29b uxth r3, r3
|
|
8001da8: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001dac: b29a uxth r2, r3
|
|
8001dae: 69bb ldr r3, [r7, #24]
|
|
8001db0: 801a strh r2, [r3, #0]
|
|
8001db2: 69bb ldr r3, [r7, #24]
|
|
8001db4: 881b ldrh r3, [r3, #0]
|
|
8001db6: b29b uxth r3, r3
|
|
8001db8: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8001dbc: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8001dc0: b29a uxth r2, r3
|
|
8001dc2: 69bb ldr r3, [r7, #24]
|
|
8001dc4: 801a strh r2, [r3, #0]
|
|
8001dc6: e017 b.n 8001df8 <HAL_PCD_EP_DB_Transmit+0x186>
|
|
8001dc8: 68bb ldr r3, [r7, #8]
|
|
8001dca: 785b ldrb r3, [r3, #1]
|
|
8001dcc: 2b01 cmp r3, #1
|
|
8001dce: d113 bne.n 8001df8 <HAL_PCD_EP_DB_Transmit+0x186>
|
|
8001dd0: 68fb ldr r3, [r7, #12]
|
|
8001dd2: 681b ldr r3, [r3, #0]
|
|
8001dd4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001dd8: b29b uxth r3, r3
|
|
8001dda: 461a mov r2, r3
|
|
8001ddc: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8001dde: 4413 add r3, r2
|
|
8001de0: 627b str r3, [r7, #36] @ 0x24
|
|
8001de2: 68bb ldr r3, [r7, #8]
|
|
8001de4: 781b ldrb r3, [r3, #0]
|
|
8001de6: 00da lsls r2, r3, #3
|
|
8001de8: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8001dea: 4413 add r3, r2
|
|
8001dec: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8001df0: 623b str r3, [r7, #32]
|
|
8001df2: 6a3b ldr r3, [r7, #32]
|
|
8001df4: 2200 movs r2, #0
|
|
8001df6: 801a strh r2, [r3, #0]
|
|
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, ep->num);
|
|
8001df8: 68bb ldr r3, [r7, #8]
|
|
8001dfa: 781b ldrb r3, [r3, #0]
|
|
8001dfc: 4619 mov r1, r3
|
|
8001dfe: 68f8 ldr r0, [r7, #12]
|
|
8001e00: f006 fc3f bl 8008682 <HAL_PCD_DataInStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
|
|
8001e04: 88fb ldrh r3, [r7, #6]
|
|
8001e06: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8001e0a: 2b00 cmp r3, #0
|
|
8001e0c: f000 82fa beq.w 8002404 <HAL_PCD_EP_DB_Transmit+0x792>
|
|
{
|
|
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
|
|
8001e10: 68fb ldr r3, [r7, #12]
|
|
8001e12: 681b ldr r3, [r3, #0]
|
|
8001e14: 461a mov r2, r3
|
|
8001e16: 68bb ldr r3, [r7, #8]
|
|
8001e18: 781b ldrb r3, [r3, #0]
|
|
8001e1a: 009b lsls r3, r3, #2
|
|
8001e1c: 4413 add r3, r2
|
|
8001e1e: 881b ldrh r3, [r3, #0]
|
|
8001e20: b29b uxth r3, r3
|
|
8001e22: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8001e26: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8001e2a: 82fb strh r3, [r7, #22]
|
|
8001e2c: 68fb ldr r3, [r7, #12]
|
|
8001e2e: 681b ldr r3, [r3, #0]
|
|
8001e30: 461a mov r2, r3
|
|
8001e32: 68bb ldr r3, [r7, #8]
|
|
8001e34: 781b ldrb r3, [r3, #0]
|
|
8001e36: 009b lsls r3, r3, #2
|
|
8001e38: 441a add r2, r3
|
|
8001e3a: 8afb ldrh r3, [r7, #22]
|
|
8001e3c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8001e40: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8001e44: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8001e48: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8001e4c: b29b uxth r3, r3
|
|
8001e4e: 8013 strh r3, [r2, #0]
|
|
8001e50: e2d8 b.n 8002404 <HAL_PCD_EP_DB_Transmit+0x792>
|
|
}
|
|
}
|
|
else /* Transfer is not yet Done */
|
|
{
|
|
/* need to Free USB Buff */
|
|
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
|
|
8001e52: 88fb ldrh r3, [r7, #6]
|
|
8001e54: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8001e58: 2b00 cmp r3, #0
|
|
8001e5a: d021 beq.n 8001ea0 <HAL_PCD_EP_DB_Transmit+0x22e>
|
|
{
|
|
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
|
|
8001e5c: 68fb ldr r3, [r7, #12]
|
|
8001e5e: 681b ldr r3, [r3, #0]
|
|
8001e60: 461a mov r2, r3
|
|
8001e62: 68bb ldr r3, [r7, #8]
|
|
8001e64: 781b ldrb r3, [r3, #0]
|
|
8001e66: 009b lsls r3, r3, #2
|
|
8001e68: 4413 add r3, r2
|
|
8001e6a: 881b ldrh r3, [r3, #0]
|
|
8001e6c: b29b uxth r3, r3
|
|
8001e6e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8001e72: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8001e76: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
|
|
8001e7a: 68fb ldr r3, [r7, #12]
|
|
8001e7c: 681b ldr r3, [r3, #0]
|
|
8001e7e: 461a mov r2, r3
|
|
8001e80: 68bb ldr r3, [r7, #8]
|
|
8001e82: 781b ldrb r3, [r3, #0]
|
|
8001e84: 009b lsls r3, r3, #2
|
|
8001e86: 441a add r2, r3
|
|
8001e88: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
|
|
8001e8c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8001e90: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8001e94: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8001e98: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8001e9c: b29b uxth r3, r3
|
|
8001e9e: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
/* Still there is data to Fill in the next Buffer */
|
|
if (ep->xfer_fill_db == 1U)
|
|
8001ea0: 68bb ldr r3, [r7, #8]
|
|
8001ea2: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
|
|
8001ea6: 2b01 cmp r3, #1
|
|
8001ea8: f040 82ac bne.w 8002404 <HAL_PCD_EP_DB_Transmit+0x792>
|
|
{
|
|
ep->xfer_buff += TxPctSize;
|
|
8001eac: 68bb ldr r3, [r7, #8]
|
|
8001eae: 695a ldr r2, [r3, #20]
|
|
8001eb0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
8001eb4: 441a add r2, r3
|
|
8001eb6: 68bb ldr r3, [r7, #8]
|
|
8001eb8: 615a str r2, [r3, #20]
|
|
ep->xfer_count += TxPctSize;
|
|
8001eba: 68bb ldr r3, [r7, #8]
|
|
8001ebc: 69da ldr r2, [r3, #28]
|
|
8001ebe: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
8001ec2: 441a add r2, r3
|
|
8001ec4: 68bb ldr r3, [r7, #8]
|
|
8001ec6: 61da str r2, [r3, #28]
|
|
|
|
/* Calculate the len of the new buffer to fill */
|
|
if (ep->xfer_len_db >= ep->maxpacket)
|
|
8001ec8: 68bb ldr r3, [r7, #8]
|
|
8001eca: 6a1a ldr r2, [r3, #32]
|
|
8001ecc: 68bb ldr r3, [r7, #8]
|
|
8001ece: 691b ldr r3, [r3, #16]
|
|
8001ed0: 429a cmp r2, r3
|
|
8001ed2: d30b bcc.n 8001eec <HAL_PCD_EP_DB_Transmit+0x27a>
|
|
{
|
|
len = ep->maxpacket;
|
|
8001ed4: 68bb ldr r3, [r7, #8]
|
|
8001ed6: 691b ldr r3, [r3, #16]
|
|
8001ed8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
|
|
ep->xfer_len_db -= len;
|
|
8001edc: 68bb ldr r3, [r7, #8]
|
|
8001ede: 6a1a ldr r2, [r3, #32]
|
|
8001ee0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8001ee4: 1ad2 subs r2, r2, r3
|
|
8001ee6: 68bb ldr r3, [r7, #8]
|
|
8001ee8: 621a str r2, [r3, #32]
|
|
8001eea: e017 b.n 8001f1c <HAL_PCD_EP_DB_Transmit+0x2aa>
|
|
}
|
|
else if (ep->xfer_len_db == 0U)
|
|
8001eec: 68bb ldr r3, [r7, #8]
|
|
8001eee: 6a1b ldr r3, [r3, #32]
|
|
8001ef0: 2b00 cmp r3, #0
|
|
8001ef2: d108 bne.n 8001f06 <HAL_PCD_EP_DB_Transmit+0x294>
|
|
{
|
|
len = TxPctSize;
|
|
8001ef4: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
8001ef8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
|
|
ep->xfer_fill_db = 0U;
|
|
8001efc: 68bb ldr r3, [r7, #8]
|
|
8001efe: 2200 movs r2, #0
|
|
8001f00: f883 2024 strb.w r2, [r3, #36] @ 0x24
|
|
8001f04: e00a b.n 8001f1c <HAL_PCD_EP_DB_Transmit+0x2aa>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_fill_db = 0U;
|
|
8001f06: 68bb ldr r3, [r7, #8]
|
|
8001f08: 2200 movs r2, #0
|
|
8001f0a: f883 2024 strb.w r2, [r3, #36] @ 0x24
|
|
len = ep->xfer_len_db;
|
|
8001f0e: 68bb ldr r3, [r7, #8]
|
|
8001f10: 6a1b ldr r3, [r3, #32]
|
|
8001f12: f8c7 308c str.w r3, [r7, #140] @ 0x8c
|
|
ep->xfer_len_db = 0U;
|
|
8001f16: 68bb ldr r3, [r7, #8]
|
|
8001f18: 2200 movs r2, #0
|
|
8001f1a: 621a str r2, [r3, #32]
|
|
}
|
|
|
|
/* Write remaining Data to Buffer */
|
|
/* Set the Double buffer counter for pma buffer1 */
|
|
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
|
|
8001f1c: 68bb ldr r3, [r7, #8]
|
|
8001f1e: 785b ldrb r3, [r3, #1]
|
|
8001f20: 2b00 cmp r3, #0
|
|
8001f22: d165 bne.n 8001ff0 <HAL_PCD_EP_DB_Transmit+0x37e>
|
|
8001f24: 68fb ldr r3, [r7, #12]
|
|
8001f26: 681b ldr r3, [r3, #0]
|
|
8001f28: 63fb str r3, [r7, #60] @ 0x3c
|
|
8001f2a: 68fb ldr r3, [r7, #12]
|
|
8001f2c: 681b ldr r3, [r3, #0]
|
|
8001f2e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8001f32: b29b uxth r3, r3
|
|
8001f34: 461a mov r2, r3
|
|
8001f36: 6bfb ldr r3, [r7, #60] @ 0x3c
|
|
8001f38: 4413 add r3, r2
|
|
8001f3a: 63fb str r3, [r7, #60] @ 0x3c
|
|
8001f3c: 68bb ldr r3, [r7, #8]
|
|
8001f3e: 781b ldrb r3, [r3, #0]
|
|
8001f40: 00da lsls r2, r3, #3
|
|
8001f42: 6bfb ldr r3, [r7, #60] @ 0x3c
|
|
8001f44: 4413 add r3, r2
|
|
8001f46: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8001f4a: 63bb str r3, [r7, #56] @ 0x38
|
|
8001f4c: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8001f4e: 881b ldrh r3, [r3, #0]
|
|
8001f50: b29b uxth r3, r3
|
|
8001f52: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8001f56: b29a uxth r2, r3
|
|
8001f58: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8001f5a: 801a strh r2, [r3, #0]
|
|
8001f5c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8001f60: 2b3e cmp r3, #62 @ 0x3e
|
|
8001f62: d91d bls.n 8001fa0 <HAL_PCD_EP_DB_Transmit+0x32e>
|
|
8001f64: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8001f68: 095b lsrs r3, r3, #5
|
|
8001f6a: 64bb str r3, [r7, #72] @ 0x48
|
|
8001f6c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8001f70: f003 031f and.w r3, r3, #31
|
|
8001f74: 2b00 cmp r3, #0
|
|
8001f76: d102 bne.n 8001f7e <HAL_PCD_EP_DB_Transmit+0x30c>
|
|
8001f78: 6cbb ldr r3, [r7, #72] @ 0x48
|
|
8001f7a: 3b01 subs r3, #1
|
|
8001f7c: 64bb str r3, [r7, #72] @ 0x48
|
|
8001f7e: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8001f80: 881b ldrh r3, [r3, #0]
|
|
8001f82: b29a uxth r2, r3
|
|
8001f84: 6cbb ldr r3, [r7, #72] @ 0x48
|
|
8001f86: b29b uxth r3, r3
|
|
8001f88: 029b lsls r3, r3, #10
|
|
8001f8a: b29b uxth r3, r3
|
|
8001f8c: 4313 orrs r3, r2
|
|
8001f8e: b29b uxth r3, r3
|
|
8001f90: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8001f94: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8001f98: b29a uxth r2, r3
|
|
8001f9a: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8001f9c: 801a strh r2, [r3, #0]
|
|
8001f9e: e044 b.n 800202a <HAL_PCD_EP_DB_Transmit+0x3b8>
|
|
8001fa0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8001fa4: 2b00 cmp r3, #0
|
|
8001fa6: d10a bne.n 8001fbe <HAL_PCD_EP_DB_Transmit+0x34c>
|
|
8001fa8: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8001faa: 881b ldrh r3, [r3, #0]
|
|
8001fac: b29b uxth r3, r3
|
|
8001fae: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8001fb2: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8001fb6: b29a uxth r2, r3
|
|
8001fb8: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8001fba: 801a strh r2, [r3, #0]
|
|
8001fbc: e035 b.n 800202a <HAL_PCD_EP_DB_Transmit+0x3b8>
|
|
8001fbe: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8001fc2: 085b lsrs r3, r3, #1
|
|
8001fc4: 64bb str r3, [r7, #72] @ 0x48
|
|
8001fc6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8001fca: f003 0301 and.w r3, r3, #1
|
|
8001fce: 2b00 cmp r3, #0
|
|
8001fd0: d002 beq.n 8001fd8 <HAL_PCD_EP_DB_Transmit+0x366>
|
|
8001fd2: 6cbb ldr r3, [r7, #72] @ 0x48
|
|
8001fd4: 3301 adds r3, #1
|
|
8001fd6: 64bb str r3, [r7, #72] @ 0x48
|
|
8001fd8: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8001fda: 881b ldrh r3, [r3, #0]
|
|
8001fdc: b29a uxth r2, r3
|
|
8001fde: 6cbb ldr r3, [r7, #72] @ 0x48
|
|
8001fe0: b29b uxth r3, r3
|
|
8001fe2: 029b lsls r3, r3, #10
|
|
8001fe4: b29b uxth r3, r3
|
|
8001fe6: 4313 orrs r3, r2
|
|
8001fe8: b29a uxth r2, r3
|
|
8001fea: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8001fec: 801a strh r2, [r3, #0]
|
|
8001fee: e01c b.n 800202a <HAL_PCD_EP_DB_Transmit+0x3b8>
|
|
8001ff0: 68bb ldr r3, [r7, #8]
|
|
8001ff2: 785b ldrb r3, [r3, #1]
|
|
8001ff4: 2b01 cmp r3, #1
|
|
8001ff6: d118 bne.n 800202a <HAL_PCD_EP_DB_Transmit+0x3b8>
|
|
8001ff8: 68fb ldr r3, [r7, #12]
|
|
8001ffa: 681b ldr r3, [r3, #0]
|
|
8001ffc: 647b str r3, [r7, #68] @ 0x44
|
|
8001ffe: 68fb ldr r3, [r7, #12]
|
|
8002000: 681b ldr r3, [r3, #0]
|
|
8002002: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8002006: b29b uxth r3, r3
|
|
8002008: 461a mov r2, r3
|
|
800200a: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
800200c: 4413 add r3, r2
|
|
800200e: 647b str r3, [r7, #68] @ 0x44
|
|
8002010: 68bb ldr r3, [r7, #8]
|
|
8002012: 781b ldrb r3, [r3, #0]
|
|
8002014: 00da lsls r2, r3, #3
|
|
8002016: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
8002018: 4413 add r3, r2
|
|
800201a: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
800201e: 643b str r3, [r7, #64] @ 0x40
|
|
8002020: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8002024: b29a uxth r2, r3
|
|
8002026: 6c3b ldr r3, [r7, #64] @ 0x40
|
|
8002028: 801a strh r2, [r3, #0]
|
|
|
|
/* Copy user buffer to USB PMA */
|
|
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
|
|
800202a: 68fb ldr r3, [r7, #12]
|
|
800202c: 6818 ldr r0, [r3, #0]
|
|
800202e: 68bb ldr r3, [r7, #8]
|
|
8002030: 6959 ldr r1, [r3, #20]
|
|
8002032: 68bb ldr r3, [r7, #8]
|
|
8002034: 891a ldrh r2, [r3, #8]
|
|
8002036: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
800203a: b29b uxth r3, r3
|
|
800203c: f004 fcd6 bl 80069ec <USB_WritePMA>
|
|
8002040: e1e0 b.n 8002404 <HAL_PCD_EP_DB_Transmit+0x792>
|
|
}
|
|
}
|
|
else /* Data Buffer1 ACK received */
|
|
{
|
|
/* multi-packet on the NON control IN endpoint */
|
|
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
|
|
8002042: 68fb ldr r3, [r7, #12]
|
|
8002044: 681b ldr r3, [r3, #0]
|
|
8002046: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800204a: b29b uxth r3, r3
|
|
800204c: 461a mov r2, r3
|
|
800204e: 68bb ldr r3, [r7, #8]
|
|
8002050: 781b ldrb r3, [r3, #0]
|
|
8002052: 00db lsls r3, r3, #3
|
|
8002054: 4413 add r3, r2
|
|
8002056: 68fa ldr r2, [r7, #12]
|
|
8002058: 6812 ldr r2, [r2, #0]
|
|
800205a: 4413 add r3, r2
|
|
800205c: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8002060: 881b ldrh r3, [r3, #0]
|
|
8002062: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8002066: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
|
|
|
|
if (ep->xfer_len >= TxPctSize)
|
|
800206a: 68bb ldr r3, [r7, #8]
|
|
800206c: 699a ldr r2, [r3, #24]
|
|
800206e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
8002072: 429a cmp r2, r3
|
|
8002074: d307 bcc.n 8002086 <HAL_PCD_EP_DB_Transmit+0x414>
|
|
{
|
|
ep->xfer_len -= TxPctSize;
|
|
8002076: 68bb ldr r3, [r7, #8]
|
|
8002078: 699a ldr r2, [r3, #24]
|
|
800207a: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
800207e: 1ad2 subs r2, r2, r3
|
|
8002080: 68bb ldr r3, [r7, #8]
|
|
8002082: 619a str r2, [r3, #24]
|
|
8002084: e002 b.n 800208c <HAL_PCD_EP_DB_Transmit+0x41a>
|
|
}
|
|
else
|
|
{
|
|
ep->xfer_len = 0U;
|
|
8002086: 68bb ldr r3, [r7, #8]
|
|
8002088: 2200 movs r2, #0
|
|
800208a: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
/* Transfer is completed */
|
|
if (ep->xfer_len == 0U)
|
|
800208c: 68bb ldr r3, [r7, #8]
|
|
800208e: 699b ldr r3, [r3, #24]
|
|
8002090: 2b00 cmp r3, #0
|
|
8002092: f040 80c0 bne.w 8002216 <HAL_PCD_EP_DB_Transmit+0x5a4>
|
|
{
|
|
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
|
|
8002096: 68bb ldr r3, [r7, #8]
|
|
8002098: 785b ldrb r3, [r3, #1]
|
|
800209a: 2b00 cmp r3, #0
|
|
800209c: d126 bne.n 80020ec <HAL_PCD_EP_DB_Transmit+0x47a>
|
|
800209e: 68fb ldr r3, [r7, #12]
|
|
80020a0: 681b ldr r3, [r3, #0]
|
|
80020a2: 67fb str r3, [r7, #124] @ 0x7c
|
|
80020a4: 68fb ldr r3, [r7, #12]
|
|
80020a6: 681b ldr r3, [r3, #0]
|
|
80020a8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80020ac: b29b uxth r3, r3
|
|
80020ae: 461a mov r2, r3
|
|
80020b0: 6ffb ldr r3, [r7, #124] @ 0x7c
|
|
80020b2: 4413 add r3, r2
|
|
80020b4: 67fb str r3, [r7, #124] @ 0x7c
|
|
80020b6: 68bb ldr r3, [r7, #8]
|
|
80020b8: 781b ldrb r3, [r3, #0]
|
|
80020ba: 00da lsls r2, r3, #3
|
|
80020bc: 6ffb ldr r3, [r7, #124] @ 0x7c
|
|
80020be: 4413 add r3, r2
|
|
80020c0: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
80020c4: 67bb str r3, [r7, #120] @ 0x78
|
|
80020c6: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
80020c8: 881b ldrh r3, [r3, #0]
|
|
80020ca: b29b uxth r3, r3
|
|
80020cc: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80020d0: b29a uxth r2, r3
|
|
80020d2: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
80020d4: 801a strh r2, [r3, #0]
|
|
80020d6: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
80020d8: 881b ldrh r3, [r3, #0]
|
|
80020da: b29b uxth r3, r3
|
|
80020dc: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80020e0: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80020e4: b29a uxth r2, r3
|
|
80020e6: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
80020e8: 801a strh r2, [r3, #0]
|
|
80020ea: e01a b.n 8002122 <HAL_PCD_EP_DB_Transmit+0x4b0>
|
|
80020ec: 68bb ldr r3, [r7, #8]
|
|
80020ee: 785b ldrb r3, [r3, #1]
|
|
80020f0: 2b01 cmp r3, #1
|
|
80020f2: d116 bne.n 8002122 <HAL_PCD_EP_DB_Transmit+0x4b0>
|
|
80020f4: 68fb ldr r3, [r7, #12]
|
|
80020f6: 681b ldr r3, [r3, #0]
|
|
80020f8: 667b str r3, [r7, #100] @ 0x64
|
|
80020fa: 68fb ldr r3, [r7, #12]
|
|
80020fc: 681b ldr r3, [r3, #0]
|
|
80020fe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8002102: b29b uxth r3, r3
|
|
8002104: 461a mov r2, r3
|
|
8002106: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002108: 4413 add r3, r2
|
|
800210a: 667b str r3, [r7, #100] @ 0x64
|
|
800210c: 68bb ldr r3, [r7, #8]
|
|
800210e: 781b ldrb r3, [r3, #0]
|
|
8002110: 00da lsls r2, r3, #3
|
|
8002112: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002114: 4413 add r3, r2
|
|
8002116: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
800211a: 663b str r3, [r7, #96] @ 0x60
|
|
800211c: 6e3b ldr r3, [r7, #96] @ 0x60
|
|
800211e: 2200 movs r2, #0
|
|
8002120: 801a strh r2, [r3, #0]
|
|
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
|
|
8002122: 68fb ldr r3, [r7, #12]
|
|
8002124: 681b ldr r3, [r3, #0]
|
|
8002126: 677b str r3, [r7, #116] @ 0x74
|
|
8002128: 68bb ldr r3, [r7, #8]
|
|
800212a: 785b ldrb r3, [r3, #1]
|
|
800212c: 2b00 cmp r3, #0
|
|
800212e: d12b bne.n 8002188 <HAL_PCD_EP_DB_Transmit+0x516>
|
|
8002130: 68fb ldr r3, [r7, #12]
|
|
8002132: 681b ldr r3, [r3, #0]
|
|
8002134: 66fb str r3, [r7, #108] @ 0x6c
|
|
8002136: 68fb ldr r3, [r7, #12]
|
|
8002138: 681b ldr r3, [r3, #0]
|
|
800213a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800213e: b29b uxth r3, r3
|
|
8002140: 461a mov r2, r3
|
|
8002142: 6efb ldr r3, [r7, #108] @ 0x6c
|
|
8002144: 4413 add r3, r2
|
|
8002146: 66fb str r3, [r7, #108] @ 0x6c
|
|
8002148: 68bb ldr r3, [r7, #8]
|
|
800214a: 781b ldrb r3, [r3, #0]
|
|
800214c: 00da lsls r2, r3, #3
|
|
800214e: 6efb ldr r3, [r7, #108] @ 0x6c
|
|
8002150: 4413 add r3, r2
|
|
8002152: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8002156: f8c7 3080 str.w r3, [r7, #128] @ 0x80
|
|
800215a: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
|
|
800215e: 881b ldrh r3, [r3, #0]
|
|
8002160: b29b uxth r3, r3
|
|
8002162: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8002166: b29a uxth r2, r3
|
|
8002168: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
|
|
800216c: 801a strh r2, [r3, #0]
|
|
800216e: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
|
|
8002172: 881b ldrh r3, [r3, #0]
|
|
8002174: b29b uxth r3, r3
|
|
8002176: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800217a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800217e: b29a uxth r2, r3
|
|
8002180: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
|
|
8002184: 801a strh r2, [r3, #0]
|
|
8002186: e017 b.n 80021b8 <HAL_PCD_EP_DB_Transmit+0x546>
|
|
8002188: 68bb ldr r3, [r7, #8]
|
|
800218a: 785b ldrb r3, [r3, #1]
|
|
800218c: 2b01 cmp r3, #1
|
|
800218e: d113 bne.n 80021b8 <HAL_PCD_EP_DB_Transmit+0x546>
|
|
8002190: 68fb ldr r3, [r7, #12]
|
|
8002192: 681b ldr r3, [r3, #0]
|
|
8002194: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8002198: b29b uxth r3, r3
|
|
800219a: 461a mov r2, r3
|
|
800219c: 6f7b ldr r3, [r7, #116] @ 0x74
|
|
800219e: 4413 add r3, r2
|
|
80021a0: 677b str r3, [r7, #116] @ 0x74
|
|
80021a2: 68bb ldr r3, [r7, #8]
|
|
80021a4: 781b ldrb r3, [r3, #0]
|
|
80021a6: 00da lsls r2, r3, #3
|
|
80021a8: 6f7b ldr r3, [r7, #116] @ 0x74
|
|
80021aa: 4413 add r3, r2
|
|
80021ac: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
80021b0: 673b str r3, [r7, #112] @ 0x70
|
|
80021b2: 6f3b ldr r3, [r7, #112] @ 0x70
|
|
80021b4: 2200 movs r2, #0
|
|
80021b6: 801a strh r2, [r3, #0]
|
|
|
|
/* TX COMPLETE */
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
hpcd->DataInStageCallback(hpcd, ep->num);
|
|
#else
|
|
HAL_PCD_DataInStageCallback(hpcd, ep->num);
|
|
80021b8: 68bb ldr r3, [r7, #8]
|
|
80021ba: 781b ldrb r3, [r3, #0]
|
|
80021bc: 4619 mov r1, r3
|
|
80021be: 68f8 ldr r0, [r7, #12]
|
|
80021c0: f006 fa5f bl 8008682 <HAL_PCD_DataInStageCallback>
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
|
|
/* need to Free USB Buff */
|
|
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
|
|
80021c4: 88fb ldrh r3, [r7, #6]
|
|
80021c6: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
80021ca: 2b00 cmp r3, #0
|
|
80021cc: f040 811a bne.w 8002404 <HAL_PCD_EP_DB_Transmit+0x792>
|
|
{
|
|
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
|
|
80021d0: 68fb ldr r3, [r7, #12]
|
|
80021d2: 681b ldr r3, [r3, #0]
|
|
80021d4: 461a mov r2, r3
|
|
80021d6: 68bb ldr r3, [r7, #8]
|
|
80021d8: 781b ldrb r3, [r3, #0]
|
|
80021da: 009b lsls r3, r3, #2
|
|
80021dc: 4413 add r3, r2
|
|
80021de: 881b ldrh r3, [r3, #0]
|
|
80021e0: b29b uxth r3, r3
|
|
80021e2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
80021e6: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
80021ea: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
|
|
80021ee: 68fb ldr r3, [r7, #12]
|
|
80021f0: 681b ldr r3, [r3, #0]
|
|
80021f2: 461a mov r2, r3
|
|
80021f4: 68bb ldr r3, [r7, #8]
|
|
80021f6: 781b ldrb r3, [r3, #0]
|
|
80021f8: 009b lsls r3, r3, #2
|
|
80021fa: 441a add r2, r3
|
|
80021fc: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
|
|
8002200: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8002204: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8002208: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
800220c: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8002210: b29b uxth r3, r3
|
|
8002212: 8013 strh r3, [r2, #0]
|
|
8002214: e0f6 b.n 8002404 <HAL_PCD_EP_DB_Transmit+0x792>
|
|
}
|
|
}
|
|
else /* Transfer is not yet Done */
|
|
{
|
|
/* need to Free USB Buff */
|
|
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
|
|
8002216: 88fb ldrh r3, [r7, #6]
|
|
8002218: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
800221c: 2b00 cmp r3, #0
|
|
800221e: d121 bne.n 8002264 <HAL_PCD_EP_DB_Transmit+0x5f2>
|
|
{
|
|
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
|
|
8002220: 68fb ldr r3, [r7, #12]
|
|
8002222: 681b ldr r3, [r3, #0]
|
|
8002224: 461a mov r2, r3
|
|
8002226: 68bb ldr r3, [r7, #8]
|
|
8002228: 781b ldrb r3, [r3, #0]
|
|
800222a: 009b lsls r3, r3, #2
|
|
800222c: 4413 add r3, r2
|
|
800222e: 881b ldrh r3, [r3, #0]
|
|
8002230: b29b uxth r3, r3
|
|
8002232: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8002236: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
800223a: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
|
|
800223e: 68fb ldr r3, [r7, #12]
|
|
8002240: 681b ldr r3, [r3, #0]
|
|
8002242: 461a mov r2, r3
|
|
8002244: 68bb ldr r3, [r7, #8]
|
|
8002246: 781b ldrb r3, [r3, #0]
|
|
8002248: 009b lsls r3, r3, #2
|
|
800224a: 441a add r2, r3
|
|
800224c: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
|
|
8002250: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8002254: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8002258: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
800225c: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8002260: b29b uxth r3, r3
|
|
8002262: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
/* Still there is data to Fill in the next Buffer */
|
|
if (ep->xfer_fill_db == 1U)
|
|
8002264: 68bb ldr r3, [r7, #8]
|
|
8002266: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
|
|
800226a: 2b01 cmp r3, #1
|
|
800226c: f040 80ca bne.w 8002404 <HAL_PCD_EP_DB_Transmit+0x792>
|
|
{
|
|
ep->xfer_buff += TxPctSize;
|
|
8002270: 68bb ldr r3, [r7, #8]
|
|
8002272: 695a ldr r2, [r3, #20]
|
|
8002274: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
8002278: 441a add r2, r3
|
|
800227a: 68bb ldr r3, [r7, #8]
|
|
800227c: 615a str r2, [r3, #20]
|
|
ep->xfer_count += TxPctSize;
|
|
800227e: 68bb ldr r3, [r7, #8]
|
|
8002280: 69da ldr r2, [r3, #28]
|
|
8002282: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
8002286: 441a add r2, r3
|
|
8002288: 68bb ldr r3, [r7, #8]
|
|
800228a: 61da str r2, [r3, #28]
|
|
|
|
/* Calculate the len of the new buffer to fill */
|
|
if (ep->xfer_len_db >= ep->maxpacket)
|
|
800228c: 68bb ldr r3, [r7, #8]
|
|
800228e: 6a1a ldr r2, [r3, #32]
|
|
8002290: 68bb ldr r3, [r7, #8]
|
|
8002292: 691b ldr r3, [r3, #16]
|
|
8002294: 429a cmp r2, r3
|
|
8002296: d30b bcc.n 80022b0 <HAL_PCD_EP_DB_Transmit+0x63e>
|
|
{
|
|
len = ep->maxpacket;
|
|
8002298: 68bb ldr r3, [r7, #8]
|
|
800229a: 691b ldr r3, [r3, #16]
|
|
800229c: f8c7 308c str.w r3, [r7, #140] @ 0x8c
|
|
ep->xfer_len_db -= len;
|
|
80022a0: 68bb ldr r3, [r7, #8]
|
|
80022a2: 6a1a ldr r2, [r3, #32]
|
|
80022a4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
80022a8: 1ad2 subs r2, r2, r3
|
|
80022aa: 68bb ldr r3, [r7, #8]
|
|
80022ac: 621a str r2, [r3, #32]
|
|
80022ae: e017 b.n 80022e0 <HAL_PCD_EP_DB_Transmit+0x66e>
|
|
}
|
|
else if (ep->xfer_len_db == 0U)
|
|
80022b0: 68bb ldr r3, [r7, #8]
|
|
80022b2: 6a1b ldr r3, [r3, #32]
|
|
80022b4: 2b00 cmp r3, #0
|
|
80022b6: d108 bne.n 80022ca <HAL_PCD_EP_DB_Transmit+0x658>
|
|
{
|
|
len = TxPctSize;
|
|
80022b8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
|
|
80022bc: f8c7 308c str.w r3, [r7, #140] @ 0x8c
|
|
ep->xfer_fill_db = 0U;
|
|
80022c0: 68bb ldr r3, [r7, #8]
|
|
80022c2: 2200 movs r2, #0
|
|
80022c4: f883 2024 strb.w r2, [r3, #36] @ 0x24
|
|
80022c8: e00a b.n 80022e0 <HAL_PCD_EP_DB_Transmit+0x66e>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len_db;
|
|
80022ca: 68bb ldr r3, [r7, #8]
|
|
80022cc: 6a1b ldr r3, [r3, #32]
|
|
80022ce: f8c7 308c str.w r3, [r7, #140] @ 0x8c
|
|
ep->xfer_len_db = 0U;
|
|
80022d2: 68bb ldr r3, [r7, #8]
|
|
80022d4: 2200 movs r2, #0
|
|
80022d6: 621a str r2, [r3, #32]
|
|
ep->xfer_fill_db = 0;
|
|
80022d8: 68bb ldr r3, [r7, #8]
|
|
80022da: 2200 movs r2, #0
|
|
80022dc: f883 2024 strb.w r2, [r3, #36] @ 0x24
|
|
}
|
|
|
|
/* Set the Double buffer counter for pmabuffer1 */
|
|
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
|
|
80022e0: 68fb ldr r3, [r7, #12]
|
|
80022e2: 681b ldr r3, [r3, #0]
|
|
80022e4: 657b str r3, [r7, #84] @ 0x54
|
|
80022e6: 68bb ldr r3, [r7, #8]
|
|
80022e8: 785b ldrb r3, [r3, #1]
|
|
80022ea: 2b00 cmp r3, #0
|
|
80022ec: d165 bne.n 80023ba <HAL_PCD_EP_DB_Transmit+0x748>
|
|
80022ee: 68fb ldr r3, [r7, #12]
|
|
80022f0: 681b ldr r3, [r3, #0]
|
|
80022f2: 65fb str r3, [r7, #92] @ 0x5c
|
|
80022f4: 68fb ldr r3, [r7, #12]
|
|
80022f6: 681b ldr r3, [r3, #0]
|
|
80022f8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80022fc: b29b uxth r3, r3
|
|
80022fe: 461a mov r2, r3
|
|
8002300: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002302: 4413 add r3, r2
|
|
8002304: 65fb str r3, [r7, #92] @ 0x5c
|
|
8002306: 68bb ldr r3, [r7, #8]
|
|
8002308: 781b ldrb r3, [r3, #0]
|
|
800230a: 00da lsls r2, r3, #3
|
|
800230c: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
800230e: 4413 add r3, r2
|
|
8002310: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8002314: 65bb str r3, [r7, #88] @ 0x58
|
|
8002316: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
8002318: 881b ldrh r3, [r3, #0]
|
|
800231a: b29b uxth r3, r3
|
|
800231c: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8002320: b29a uxth r2, r3
|
|
8002322: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
8002324: 801a strh r2, [r3, #0]
|
|
8002326: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
800232a: 2b3e cmp r3, #62 @ 0x3e
|
|
800232c: d91d bls.n 800236a <HAL_PCD_EP_DB_Transmit+0x6f8>
|
|
800232e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8002332: 095b lsrs r3, r3, #5
|
|
8002334: 66bb str r3, [r7, #104] @ 0x68
|
|
8002336: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
800233a: f003 031f and.w r3, r3, #31
|
|
800233e: 2b00 cmp r3, #0
|
|
8002340: d102 bne.n 8002348 <HAL_PCD_EP_DB_Transmit+0x6d6>
|
|
8002342: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
8002344: 3b01 subs r3, #1
|
|
8002346: 66bb str r3, [r7, #104] @ 0x68
|
|
8002348: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
800234a: 881b ldrh r3, [r3, #0]
|
|
800234c: b29a uxth r2, r3
|
|
800234e: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
8002350: b29b uxth r3, r3
|
|
8002352: 029b lsls r3, r3, #10
|
|
8002354: b29b uxth r3, r3
|
|
8002356: 4313 orrs r3, r2
|
|
8002358: b29b uxth r3, r3
|
|
800235a: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800235e: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8002362: b29a uxth r2, r3
|
|
8002364: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
8002366: 801a strh r2, [r3, #0]
|
|
8002368: e041 b.n 80023ee <HAL_PCD_EP_DB_Transmit+0x77c>
|
|
800236a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
800236e: 2b00 cmp r3, #0
|
|
8002370: d10a bne.n 8002388 <HAL_PCD_EP_DB_Transmit+0x716>
|
|
8002372: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
8002374: 881b ldrh r3, [r3, #0]
|
|
8002376: b29b uxth r3, r3
|
|
8002378: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800237c: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8002380: b29a uxth r2, r3
|
|
8002382: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
8002384: 801a strh r2, [r3, #0]
|
|
8002386: e032 b.n 80023ee <HAL_PCD_EP_DB_Transmit+0x77c>
|
|
8002388: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
800238c: 085b lsrs r3, r3, #1
|
|
800238e: 66bb str r3, [r7, #104] @ 0x68
|
|
8002390: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8002394: f003 0301 and.w r3, r3, #1
|
|
8002398: 2b00 cmp r3, #0
|
|
800239a: d002 beq.n 80023a2 <HAL_PCD_EP_DB_Transmit+0x730>
|
|
800239c: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
800239e: 3301 adds r3, #1
|
|
80023a0: 66bb str r3, [r7, #104] @ 0x68
|
|
80023a2: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
80023a4: 881b ldrh r3, [r3, #0]
|
|
80023a6: b29a uxth r2, r3
|
|
80023a8: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
80023aa: b29b uxth r3, r3
|
|
80023ac: 029b lsls r3, r3, #10
|
|
80023ae: b29b uxth r3, r3
|
|
80023b0: 4313 orrs r3, r2
|
|
80023b2: b29a uxth r2, r3
|
|
80023b4: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
80023b6: 801a strh r2, [r3, #0]
|
|
80023b8: e019 b.n 80023ee <HAL_PCD_EP_DB_Transmit+0x77c>
|
|
80023ba: 68bb ldr r3, [r7, #8]
|
|
80023bc: 785b ldrb r3, [r3, #1]
|
|
80023be: 2b01 cmp r3, #1
|
|
80023c0: d115 bne.n 80023ee <HAL_PCD_EP_DB_Transmit+0x77c>
|
|
80023c2: 68fb ldr r3, [r7, #12]
|
|
80023c4: 681b ldr r3, [r3, #0]
|
|
80023c6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80023ca: b29b uxth r3, r3
|
|
80023cc: 461a mov r2, r3
|
|
80023ce: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80023d0: 4413 add r3, r2
|
|
80023d2: 657b str r3, [r7, #84] @ 0x54
|
|
80023d4: 68bb ldr r3, [r7, #8]
|
|
80023d6: 781b ldrb r3, [r3, #0]
|
|
80023d8: 00da lsls r2, r3, #3
|
|
80023da: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80023dc: 4413 add r3, r2
|
|
80023de: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
80023e2: 653b str r3, [r7, #80] @ 0x50
|
|
80023e4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
80023e8: b29a uxth r2, r3
|
|
80023ea: 6d3b ldr r3, [r7, #80] @ 0x50
|
|
80023ec: 801a strh r2, [r3, #0]
|
|
|
|
/* Copy the user buffer to USB PMA */
|
|
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
|
|
80023ee: 68fb ldr r3, [r7, #12]
|
|
80023f0: 6818 ldr r0, [r3, #0]
|
|
80023f2: 68bb ldr r3, [r7, #8]
|
|
80023f4: 6959 ldr r1, [r3, #20]
|
|
80023f6: 68bb ldr r3, [r7, #8]
|
|
80023f8: 895a ldrh r2, [r3, #10]
|
|
80023fa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
80023fe: b29b uxth r3, r3
|
|
8002400: f004 faf4 bl 80069ec <USB_WritePMA>
|
|
}
|
|
}
|
|
}
|
|
|
|
/*enable endpoint IN*/
|
|
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
|
|
8002404: 68fb ldr r3, [r7, #12]
|
|
8002406: 681b ldr r3, [r3, #0]
|
|
8002408: 461a mov r2, r3
|
|
800240a: 68bb ldr r3, [r7, #8]
|
|
800240c: 781b ldrb r3, [r3, #0]
|
|
800240e: 009b lsls r3, r3, #2
|
|
8002410: 4413 add r3, r2
|
|
8002412: 881b ldrh r3, [r3, #0]
|
|
8002414: b29b uxth r3, r3
|
|
8002416: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
800241a: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
800241e: 82bb strh r3, [r7, #20]
|
|
8002420: 8abb ldrh r3, [r7, #20]
|
|
8002422: f083 0310 eor.w r3, r3, #16
|
|
8002426: 82bb strh r3, [r7, #20]
|
|
8002428: 8abb ldrh r3, [r7, #20]
|
|
800242a: f083 0320 eor.w r3, r3, #32
|
|
800242e: 82bb strh r3, [r7, #20]
|
|
8002430: 68fb ldr r3, [r7, #12]
|
|
8002432: 681b ldr r3, [r3, #0]
|
|
8002434: 461a mov r2, r3
|
|
8002436: 68bb ldr r3, [r7, #8]
|
|
8002438: 781b ldrb r3, [r3, #0]
|
|
800243a: 009b lsls r3, r3, #2
|
|
800243c: 441a add r2, r3
|
|
800243e: 8abb ldrh r3, [r7, #20]
|
|
8002440: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8002444: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8002448: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
800244c: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8002450: b29b uxth r3, r3
|
|
8002452: 8013 strh r3, [r2, #0]
|
|
|
|
return HAL_OK;
|
|
8002454: 2300 movs r3, #0
|
|
}
|
|
8002456: 4618 mov r0, r3
|
|
8002458: 3790 adds r7, #144 @ 0x90
|
|
800245a: 46bd mov sp, r7
|
|
800245c: bd80 pop {r7, pc}
|
|
|
|
0800245e <HAL_PCDEx_PMAConfig>:
|
|
* @retval HAL status
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
|
|
uint16_t ep_kind, uint32_t pmaadress)
|
|
{
|
|
800245e: b480 push {r7}
|
|
8002460: b087 sub sp, #28
|
|
8002462: af00 add r7, sp, #0
|
|
8002464: 60f8 str r0, [r7, #12]
|
|
8002466: 607b str r3, [r7, #4]
|
|
8002468: 460b mov r3, r1
|
|
800246a: 817b strh r3, [r7, #10]
|
|
800246c: 4613 mov r3, r2
|
|
800246e: 813b strh r3, [r7, #8]
|
|
PCD_EPTypeDef *ep;
|
|
|
|
/* initialize ep structure*/
|
|
if ((0x80U & ep_addr) == 0x80U)
|
|
8002470: 897b ldrh r3, [r7, #10]
|
|
8002472: f003 0380 and.w r3, r3, #128 @ 0x80
|
|
8002476: b29b uxth r3, r3
|
|
8002478: 2b00 cmp r3, #0
|
|
800247a: d00b beq.n 8002494 <HAL_PCDEx_PMAConfig+0x36>
|
|
{
|
|
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
|
|
800247c: 897b ldrh r3, [r7, #10]
|
|
800247e: f003 0307 and.w r3, r3, #7
|
|
8002482: 1c5a adds r2, r3, #1
|
|
8002484: 4613 mov r3, r2
|
|
8002486: 009b lsls r3, r3, #2
|
|
8002488: 4413 add r3, r2
|
|
800248a: 00db lsls r3, r3, #3
|
|
800248c: 68fa ldr r2, [r7, #12]
|
|
800248e: 4413 add r3, r2
|
|
8002490: 617b str r3, [r7, #20]
|
|
8002492: e009 b.n 80024a8 <HAL_PCDEx_PMAConfig+0x4a>
|
|
}
|
|
else
|
|
{
|
|
ep = &hpcd->OUT_ep[ep_addr];
|
|
8002494: 897a ldrh r2, [r7, #10]
|
|
8002496: 4613 mov r3, r2
|
|
8002498: 009b lsls r3, r3, #2
|
|
800249a: 4413 add r3, r2
|
|
800249c: 00db lsls r3, r3, #3
|
|
800249e: f503 73b4 add.w r3, r3, #360 @ 0x168
|
|
80024a2: 68fa ldr r2, [r7, #12]
|
|
80024a4: 4413 add r3, r2
|
|
80024a6: 617b str r3, [r7, #20]
|
|
}
|
|
|
|
/* Here we check if the endpoint is single or double Buffer*/
|
|
if (ep_kind == PCD_SNG_BUF)
|
|
80024a8: 893b ldrh r3, [r7, #8]
|
|
80024aa: 2b00 cmp r3, #0
|
|
80024ac: d107 bne.n 80024be <HAL_PCDEx_PMAConfig+0x60>
|
|
{
|
|
/* Single Buffer */
|
|
ep->doublebuffer = 0U;
|
|
80024ae: 697b ldr r3, [r7, #20]
|
|
80024b0: 2200 movs r2, #0
|
|
80024b2: 731a strb r2, [r3, #12]
|
|
/* Configure the PMA */
|
|
ep->pmaadress = (uint16_t)pmaadress;
|
|
80024b4: 687b ldr r3, [r7, #4]
|
|
80024b6: b29a uxth r2, r3
|
|
80024b8: 697b ldr r3, [r7, #20]
|
|
80024ba: 80da strh r2, [r3, #6]
|
|
80024bc: e00b b.n 80024d6 <HAL_PCDEx_PMAConfig+0x78>
|
|
}
|
|
#if (USE_USB_DOUBLE_BUFFER == 1U)
|
|
else /* USB_DBL_BUF */
|
|
{
|
|
/* Double Buffer Endpoint */
|
|
ep->doublebuffer = 1U;
|
|
80024be: 697b ldr r3, [r7, #20]
|
|
80024c0: 2201 movs r2, #1
|
|
80024c2: 731a strb r2, [r3, #12]
|
|
/* Configure the PMA */
|
|
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
|
|
80024c4: 687b ldr r3, [r7, #4]
|
|
80024c6: b29a uxth r2, r3
|
|
80024c8: 697b ldr r3, [r7, #20]
|
|
80024ca: 811a strh r2, [r3, #8]
|
|
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
|
|
80024cc: 687b ldr r3, [r7, #4]
|
|
80024ce: 0c1b lsrs r3, r3, #16
|
|
80024d0: b29a uxth r2, r3
|
|
80024d2: 697b ldr r3, [r7, #20]
|
|
80024d4: 815a strh r2, [r3, #10]
|
|
}
|
|
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
|
|
|
|
return HAL_OK;
|
|
80024d6: 2300 movs r3, #0
|
|
}
|
|
80024d8: 4618 mov r0, r3
|
|
80024da: 371c adds r7, #28
|
|
80024dc: 46bd mov sp, r7
|
|
80024de: f85d 7b04 ldr.w r7, [sp], #4
|
|
80024e2: 4770 bx lr
|
|
|
|
080024e4 <HAL_RCC_OscConfig>:
|
|
* supported by this macro. User should request a transition to HSE Off
|
|
* first and then HSE On or HSE Bypass.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|
{
|
|
80024e4: b580 push {r7, lr}
|
|
80024e6: f5ad 7d00 sub.w sp, sp, #512 @ 0x200
|
|
80024ea: af00 add r7, sp, #0
|
|
80024ec: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80024f0: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
80024f4: 6018 str r0, [r3, #0]
|
|
#if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
|
|
uint32_t pll_config2;
|
|
#endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */
|
|
|
|
/* Check Null pointer */
|
|
if(RCC_OscInitStruct == NULL)
|
|
80024f6: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80024fa: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
80024fe: 681b ldr r3, [r3, #0]
|
|
8002500: 2b00 cmp r3, #0
|
|
8002502: d102 bne.n 800250a <HAL_RCC_OscConfig+0x26>
|
|
{
|
|
return HAL_ERROR;
|
|
8002504: 2301 movs r3, #1
|
|
8002506: f001 b823 b.w 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
|
|
|
/*------------------------------- HSE Configuration ------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
|
800250a: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800250e: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002512: 681b ldr r3, [r3, #0]
|
|
8002514: 681b ldr r3, [r3, #0]
|
|
8002516: f003 0301 and.w r3, r3, #1
|
|
800251a: 2b00 cmp r3, #0
|
|
800251c: f000 817d beq.w 800281a <HAL_RCC_OscConfig+0x336>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
|
|
|
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
|
8002520: 4bbc ldr r3, [pc, #752] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002522: 685b ldr r3, [r3, #4]
|
|
8002524: f003 030c and.w r3, r3, #12
|
|
8002528: 2b04 cmp r3, #4
|
|
800252a: d00c beq.n 8002546 <HAL_RCC_OscConfig+0x62>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
|
800252c: 4bb9 ldr r3, [pc, #740] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
800252e: 685b ldr r3, [r3, #4]
|
|
8002530: f003 030c and.w r3, r3, #12
|
|
8002534: 2b08 cmp r3, #8
|
|
8002536: d15c bne.n 80025f2 <HAL_RCC_OscConfig+0x10e>
|
|
8002538: 4bb6 ldr r3, [pc, #728] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
800253a: 685b ldr r3, [r3, #4]
|
|
800253c: f403 3380 and.w r3, r3, #65536 @ 0x10000
|
|
8002540: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
|
|
8002544: d155 bne.n 80025f2 <HAL_RCC_OscConfig+0x10e>
|
|
8002546: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
800254a: f8c7 31f0 str.w r3, [r7, #496] @ 0x1f0
|
|
uint32_t result;
|
|
|
|
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
|
(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
|
(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800254e: f8d7 31f0 ldr.w r3, [r7, #496] @ 0x1f0
|
|
8002552: fa93 f3a3 rbit r3, r3
|
|
8002556: f8c7 31ec str.w r3, [r7, #492] @ 0x1ec
|
|
result |= value & 1U;
|
|
s--;
|
|
}
|
|
result <<= s; /* shift when v's highest bits are zero */
|
|
#endif
|
|
return result;
|
|
800255a: f8d7 31ec ldr.w r3, [r7, #492] @ 0x1ec
|
|
{
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
800255e: fab3 f383 clz r3, r3
|
|
8002562: b2db uxtb r3, r3
|
|
8002564: 095b lsrs r3, r3, #5
|
|
8002566: b2db uxtb r3, r3
|
|
8002568: f043 0301 orr.w r3, r3, #1
|
|
800256c: b2db uxtb r3, r3
|
|
800256e: 2b01 cmp r3, #1
|
|
8002570: d102 bne.n 8002578 <HAL_RCC_OscConfig+0x94>
|
|
8002572: 4ba8 ldr r3, [pc, #672] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002574: 681b ldr r3, [r3, #0]
|
|
8002576: e015 b.n 80025a4 <HAL_RCC_OscConfig+0xc0>
|
|
8002578: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
800257c: f8c7 31e8 str.w r3, [r7, #488] @ 0x1e8
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002580: f8d7 31e8 ldr.w r3, [r7, #488] @ 0x1e8
|
|
8002584: fa93 f3a3 rbit r3, r3
|
|
8002588: f8c7 31e4 str.w r3, [r7, #484] @ 0x1e4
|
|
800258c: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
8002590: f8c7 31e0 str.w r3, [r7, #480] @ 0x1e0
|
|
8002594: f8d7 31e0 ldr.w r3, [r7, #480] @ 0x1e0
|
|
8002598: fa93 f3a3 rbit r3, r3
|
|
800259c: f8c7 31dc str.w r3, [r7, #476] @ 0x1dc
|
|
80025a0: 4b9c ldr r3, [pc, #624] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
80025a2: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80025a4: f44f 3200 mov.w r2, #131072 @ 0x20000
|
|
80025a8: f8c7 21d8 str.w r2, [r7, #472] @ 0x1d8
|
|
80025ac: f8d7 21d8 ldr.w r2, [r7, #472] @ 0x1d8
|
|
80025b0: fa92 f2a2 rbit r2, r2
|
|
80025b4: f8c7 21d4 str.w r2, [r7, #468] @ 0x1d4
|
|
return result;
|
|
80025b8: f8d7 21d4 ldr.w r2, [r7, #468] @ 0x1d4
|
|
80025bc: fab2 f282 clz r2, r2
|
|
80025c0: b2d2 uxtb r2, r2
|
|
80025c2: f042 0220 orr.w r2, r2, #32
|
|
80025c6: b2d2 uxtb r2, r2
|
|
80025c8: f002 021f and.w r2, r2, #31
|
|
80025cc: 2101 movs r1, #1
|
|
80025ce: fa01 f202 lsl.w r2, r1, r2
|
|
80025d2: 4013 ands r3, r2
|
|
80025d4: 2b00 cmp r3, #0
|
|
80025d6: f000 811f beq.w 8002818 <HAL_RCC_OscConfig+0x334>
|
|
80025da: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80025de: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
80025e2: 681b ldr r3, [r3, #0]
|
|
80025e4: 685b ldr r3, [r3, #4]
|
|
80025e6: 2b00 cmp r3, #0
|
|
80025e8: f040 8116 bne.w 8002818 <HAL_RCC_OscConfig+0x334>
|
|
{
|
|
return HAL_ERROR;
|
|
80025ec: 2301 movs r3, #1
|
|
80025ee: f000 bfaf b.w 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the new HSE configuration ---------------------------------------*/
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
80025f2: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80025f6: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
80025fa: 681b ldr r3, [r3, #0]
|
|
80025fc: 685b ldr r3, [r3, #4]
|
|
80025fe: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
|
|
8002602: d106 bne.n 8002612 <HAL_RCC_OscConfig+0x12e>
|
|
8002604: 4b83 ldr r3, [pc, #524] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002606: 681b ldr r3, [r3, #0]
|
|
8002608: 4a82 ldr r2, [pc, #520] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
800260a: f443 3380 orr.w r3, r3, #65536 @ 0x10000
|
|
800260e: 6013 str r3, [r2, #0]
|
|
8002610: e036 b.n 8002680 <HAL_RCC_OscConfig+0x19c>
|
|
8002612: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002616: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
800261a: 681b ldr r3, [r3, #0]
|
|
800261c: 685b ldr r3, [r3, #4]
|
|
800261e: 2b00 cmp r3, #0
|
|
8002620: d10c bne.n 800263c <HAL_RCC_OscConfig+0x158>
|
|
8002622: 4b7c ldr r3, [pc, #496] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002624: 681b ldr r3, [r3, #0]
|
|
8002626: 4a7b ldr r2, [pc, #492] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002628: f423 3380 bic.w r3, r3, #65536 @ 0x10000
|
|
800262c: 6013 str r3, [r2, #0]
|
|
800262e: 4b79 ldr r3, [pc, #484] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002630: 681b ldr r3, [r3, #0]
|
|
8002632: 4a78 ldr r2, [pc, #480] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002634: f423 2380 bic.w r3, r3, #262144 @ 0x40000
|
|
8002638: 6013 str r3, [r2, #0]
|
|
800263a: e021 b.n 8002680 <HAL_RCC_OscConfig+0x19c>
|
|
800263c: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002640: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002644: 681b ldr r3, [r3, #0]
|
|
8002646: 685b ldr r3, [r3, #4]
|
|
8002648: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
|
|
800264c: d10c bne.n 8002668 <HAL_RCC_OscConfig+0x184>
|
|
800264e: 4b71 ldr r3, [pc, #452] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002650: 681b ldr r3, [r3, #0]
|
|
8002652: 4a70 ldr r2, [pc, #448] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002654: f443 2380 orr.w r3, r3, #262144 @ 0x40000
|
|
8002658: 6013 str r3, [r2, #0]
|
|
800265a: 4b6e ldr r3, [pc, #440] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
800265c: 681b ldr r3, [r3, #0]
|
|
800265e: 4a6d ldr r2, [pc, #436] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002660: f443 3380 orr.w r3, r3, #65536 @ 0x10000
|
|
8002664: 6013 str r3, [r2, #0]
|
|
8002666: e00b b.n 8002680 <HAL_RCC_OscConfig+0x19c>
|
|
8002668: 4b6a ldr r3, [pc, #424] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
800266a: 681b ldr r3, [r3, #0]
|
|
800266c: 4a69 ldr r2, [pc, #420] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
800266e: f423 3380 bic.w r3, r3, #65536 @ 0x10000
|
|
8002672: 6013 str r3, [r2, #0]
|
|
8002674: 4b67 ldr r3, [pc, #412] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002676: 681b ldr r3, [r3, #0]
|
|
8002678: 4a66 ldr r2, [pc, #408] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
800267a: f423 2380 bic.w r3, r3, #262144 @ 0x40000
|
|
800267e: 6013 str r3, [r2, #0]
|
|
|
|
#if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
|
|
/* Configure the HSE predivision factor --------------------------------*/
|
|
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
|
|
8002680: 4b64 ldr r3, [pc, #400] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002682: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8002684: f023 020f bic.w r2, r3, #15
|
|
8002688: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800268c: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002690: 681b ldr r3, [r3, #0]
|
|
8002692: 689b ldr r3, [r3, #8]
|
|
8002694: 495f ldr r1, [pc, #380] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002696: 4313 orrs r3, r2
|
|
8002698: 62cb str r3, [r1, #44] @ 0x2c
|
|
#endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
|
|
|
|
/* Check the HSE State */
|
|
if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
|
800269a: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800269e: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
80026a2: 681b ldr r3, [r3, #0]
|
|
80026a4: 685b ldr r3, [r3, #4]
|
|
80026a6: 2b00 cmp r3, #0
|
|
80026a8: d059 beq.n 800275e <HAL_RCC_OscConfig+0x27a>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80026aa: f7fd ffa5 bl 80005f8 <HAL_GetTick>
|
|
80026ae: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till HSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
80026b2: e00a b.n 80026ca <HAL_RCC_OscConfig+0x1e6>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
80026b4: f7fd ffa0 bl 80005f8 <HAL_GetTick>
|
|
80026b8: 4602 mov r2, r0
|
|
80026ba: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
80026be: 1ad3 subs r3, r2, r3
|
|
80026c0: 2b64 cmp r3, #100 @ 0x64
|
|
80026c2: d902 bls.n 80026ca <HAL_RCC_OscConfig+0x1e6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80026c4: 2303 movs r3, #3
|
|
80026c6: f000 bf43 b.w 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
80026ca: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
80026ce: f8c7 31d0 str.w r3, [r7, #464] @ 0x1d0
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80026d2: f8d7 31d0 ldr.w r3, [r7, #464] @ 0x1d0
|
|
80026d6: fa93 f3a3 rbit r3, r3
|
|
80026da: f8c7 31cc str.w r3, [r7, #460] @ 0x1cc
|
|
return result;
|
|
80026de: f8d7 31cc ldr.w r3, [r7, #460] @ 0x1cc
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
80026e2: fab3 f383 clz r3, r3
|
|
80026e6: b2db uxtb r3, r3
|
|
80026e8: 095b lsrs r3, r3, #5
|
|
80026ea: b2db uxtb r3, r3
|
|
80026ec: f043 0301 orr.w r3, r3, #1
|
|
80026f0: b2db uxtb r3, r3
|
|
80026f2: 2b01 cmp r3, #1
|
|
80026f4: d102 bne.n 80026fc <HAL_RCC_OscConfig+0x218>
|
|
80026f6: 4b47 ldr r3, [pc, #284] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
80026f8: 681b ldr r3, [r3, #0]
|
|
80026fa: e015 b.n 8002728 <HAL_RCC_OscConfig+0x244>
|
|
80026fc: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
8002700: f8c7 31c8 str.w r3, [r7, #456] @ 0x1c8
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002704: f8d7 31c8 ldr.w r3, [r7, #456] @ 0x1c8
|
|
8002708: fa93 f3a3 rbit r3, r3
|
|
800270c: f8c7 31c4 str.w r3, [r7, #452] @ 0x1c4
|
|
8002710: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
8002714: f8c7 31c0 str.w r3, [r7, #448] @ 0x1c0
|
|
8002718: f8d7 31c0 ldr.w r3, [r7, #448] @ 0x1c0
|
|
800271c: fa93 f3a3 rbit r3, r3
|
|
8002720: f8c7 31bc str.w r3, [r7, #444] @ 0x1bc
|
|
8002724: 4b3b ldr r3, [pc, #236] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
8002726: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8002728: f44f 3200 mov.w r2, #131072 @ 0x20000
|
|
800272c: f8c7 21b8 str.w r2, [r7, #440] @ 0x1b8
|
|
8002730: f8d7 21b8 ldr.w r2, [r7, #440] @ 0x1b8
|
|
8002734: fa92 f2a2 rbit r2, r2
|
|
8002738: f8c7 21b4 str.w r2, [r7, #436] @ 0x1b4
|
|
return result;
|
|
800273c: f8d7 21b4 ldr.w r2, [r7, #436] @ 0x1b4
|
|
8002740: fab2 f282 clz r2, r2
|
|
8002744: b2d2 uxtb r2, r2
|
|
8002746: f042 0220 orr.w r2, r2, #32
|
|
800274a: b2d2 uxtb r2, r2
|
|
800274c: f002 021f and.w r2, r2, #31
|
|
8002750: 2101 movs r1, #1
|
|
8002752: fa01 f202 lsl.w r2, r1, r2
|
|
8002756: 4013 ands r3, r2
|
|
8002758: 2b00 cmp r3, #0
|
|
800275a: d0ab beq.n 80026b4 <HAL_RCC_OscConfig+0x1d0>
|
|
800275c: e05d b.n 800281a <HAL_RCC_OscConfig+0x336>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800275e: f7fd ff4b bl 80005f8 <HAL_GetTick>
|
|
8002762: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till HSE is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8002766: e00a b.n 800277e <HAL_RCC_OscConfig+0x29a>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
8002768: f7fd ff46 bl 80005f8 <HAL_GetTick>
|
|
800276c: 4602 mov r2, r0
|
|
800276e: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
8002772: 1ad3 subs r3, r2, r3
|
|
8002774: 2b64 cmp r3, #100 @ 0x64
|
|
8002776: d902 bls.n 800277e <HAL_RCC_OscConfig+0x29a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002778: 2303 movs r3, #3
|
|
800277a: f000 bee9 b.w 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
800277e: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
8002782: f8c7 31b0 str.w r3, [r7, #432] @ 0x1b0
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002786: f8d7 31b0 ldr.w r3, [r7, #432] @ 0x1b0
|
|
800278a: fa93 f3a3 rbit r3, r3
|
|
800278e: f8c7 31ac str.w r3, [r7, #428] @ 0x1ac
|
|
return result;
|
|
8002792: f8d7 31ac ldr.w r3, [r7, #428] @ 0x1ac
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8002796: fab3 f383 clz r3, r3
|
|
800279a: b2db uxtb r3, r3
|
|
800279c: 095b lsrs r3, r3, #5
|
|
800279e: b2db uxtb r3, r3
|
|
80027a0: f043 0301 orr.w r3, r3, #1
|
|
80027a4: b2db uxtb r3, r3
|
|
80027a6: 2b01 cmp r3, #1
|
|
80027a8: d102 bne.n 80027b0 <HAL_RCC_OscConfig+0x2cc>
|
|
80027aa: 4b1a ldr r3, [pc, #104] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
80027ac: 681b ldr r3, [r3, #0]
|
|
80027ae: e015 b.n 80027dc <HAL_RCC_OscConfig+0x2f8>
|
|
80027b0: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
80027b4: f8c7 31a8 str.w r3, [r7, #424] @ 0x1a8
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80027b8: f8d7 31a8 ldr.w r3, [r7, #424] @ 0x1a8
|
|
80027bc: fa93 f3a3 rbit r3, r3
|
|
80027c0: f8c7 31a4 str.w r3, [r7, #420] @ 0x1a4
|
|
80027c4: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
80027c8: f8c7 31a0 str.w r3, [r7, #416] @ 0x1a0
|
|
80027cc: f8d7 31a0 ldr.w r3, [r7, #416] @ 0x1a0
|
|
80027d0: fa93 f3a3 rbit r3, r3
|
|
80027d4: f8c7 319c str.w r3, [r7, #412] @ 0x19c
|
|
80027d8: 4b0e ldr r3, [pc, #56] @ (8002814 <HAL_RCC_OscConfig+0x330>)
|
|
80027da: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80027dc: f44f 3200 mov.w r2, #131072 @ 0x20000
|
|
80027e0: f8c7 2198 str.w r2, [r7, #408] @ 0x198
|
|
80027e4: f8d7 2198 ldr.w r2, [r7, #408] @ 0x198
|
|
80027e8: fa92 f2a2 rbit r2, r2
|
|
80027ec: f8c7 2194 str.w r2, [r7, #404] @ 0x194
|
|
return result;
|
|
80027f0: f8d7 2194 ldr.w r2, [r7, #404] @ 0x194
|
|
80027f4: fab2 f282 clz r2, r2
|
|
80027f8: b2d2 uxtb r2, r2
|
|
80027fa: f042 0220 orr.w r2, r2, #32
|
|
80027fe: b2d2 uxtb r2, r2
|
|
8002800: f002 021f and.w r2, r2, #31
|
|
8002804: 2101 movs r1, #1
|
|
8002806: fa01 f202 lsl.w r2, r1, r2
|
|
800280a: 4013 ands r3, r2
|
|
800280c: 2b00 cmp r3, #0
|
|
800280e: d1ab bne.n 8002768 <HAL_RCC_OscConfig+0x284>
|
|
8002810: e003 b.n 800281a <HAL_RCC_OscConfig+0x336>
|
|
8002812: bf00 nop
|
|
8002814: 40021000 .word 0x40021000
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
8002818: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*----------------------------- HSI Configuration --------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
|
800281a: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800281e: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002822: 681b ldr r3, [r3, #0]
|
|
8002824: 681b ldr r3, [r3, #0]
|
|
8002826: f003 0302 and.w r3, r3, #2
|
|
800282a: 2b00 cmp r3, #0
|
|
800282c: f000 817d beq.w 8002b2a <HAL_RCC_OscConfig+0x646>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
|
|
|
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
|
8002830: 4ba6 ldr r3, [pc, #664] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
8002832: 685b ldr r3, [r3, #4]
|
|
8002834: f003 030c and.w r3, r3, #12
|
|
8002838: 2b00 cmp r3, #0
|
|
800283a: d00b beq.n 8002854 <HAL_RCC_OscConfig+0x370>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
|
|
800283c: 4ba3 ldr r3, [pc, #652] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
800283e: 685b ldr r3, [r3, #4]
|
|
8002840: f003 030c and.w r3, r3, #12
|
|
8002844: 2b08 cmp r3, #8
|
|
8002846: d172 bne.n 800292e <HAL_RCC_OscConfig+0x44a>
|
|
8002848: 4ba0 ldr r3, [pc, #640] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
800284a: 685b ldr r3, [r3, #4]
|
|
800284c: f403 3380 and.w r3, r3, #65536 @ 0x10000
|
|
8002850: 2b00 cmp r3, #0
|
|
8002852: d16c bne.n 800292e <HAL_RCC_OscConfig+0x44a>
|
|
8002854: 2302 movs r3, #2
|
|
8002856: f8c7 3190 str.w r3, [r7, #400] @ 0x190
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800285a: f8d7 3190 ldr.w r3, [r7, #400] @ 0x190
|
|
800285e: fa93 f3a3 rbit r3, r3
|
|
8002862: f8c7 318c str.w r3, [r7, #396] @ 0x18c
|
|
return result;
|
|
8002866: f8d7 318c ldr.w r3, [r7, #396] @ 0x18c
|
|
{
|
|
/* When HSI is used as system clock it will not disabled */
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
800286a: fab3 f383 clz r3, r3
|
|
800286e: b2db uxtb r3, r3
|
|
8002870: 095b lsrs r3, r3, #5
|
|
8002872: b2db uxtb r3, r3
|
|
8002874: f043 0301 orr.w r3, r3, #1
|
|
8002878: b2db uxtb r3, r3
|
|
800287a: 2b01 cmp r3, #1
|
|
800287c: d102 bne.n 8002884 <HAL_RCC_OscConfig+0x3a0>
|
|
800287e: 4b93 ldr r3, [pc, #588] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
8002880: 681b ldr r3, [r3, #0]
|
|
8002882: e013 b.n 80028ac <HAL_RCC_OscConfig+0x3c8>
|
|
8002884: 2302 movs r3, #2
|
|
8002886: f8c7 3188 str.w r3, [r7, #392] @ 0x188
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800288a: f8d7 3188 ldr.w r3, [r7, #392] @ 0x188
|
|
800288e: fa93 f3a3 rbit r3, r3
|
|
8002892: f8c7 3184 str.w r3, [r7, #388] @ 0x184
|
|
8002896: 2302 movs r3, #2
|
|
8002898: f8c7 3180 str.w r3, [r7, #384] @ 0x180
|
|
800289c: f8d7 3180 ldr.w r3, [r7, #384] @ 0x180
|
|
80028a0: fa93 f3a3 rbit r3, r3
|
|
80028a4: f8c7 317c str.w r3, [r7, #380] @ 0x17c
|
|
80028a8: 4b88 ldr r3, [pc, #544] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
80028aa: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80028ac: 2202 movs r2, #2
|
|
80028ae: f8c7 2178 str.w r2, [r7, #376] @ 0x178
|
|
80028b2: f8d7 2178 ldr.w r2, [r7, #376] @ 0x178
|
|
80028b6: fa92 f2a2 rbit r2, r2
|
|
80028ba: f8c7 2174 str.w r2, [r7, #372] @ 0x174
|
|
return result;
|
|
80028be: f8d7 2174 ldr.w r2, [r7, #372] @ 0x174
|
|
80028c2: fab2 f282 clz r2, r2
|
|
80028c6: b2d2 uxtb r2, r2
|
|
80028c8: f042 0220 orr.w r2, r2, #32
|
|
80028cc: b2d2 uxtb r2, r2
|
|
80028ce: f002 021f and.w r2, r2, #31
|
|
80028d2: 2101 movs r1, #1
|
|
80028d4: fa01 f202 lsl.w r2, r1, r2
|
|
80028d8: 4013 ands r3, r2
|
|
80028da: 2b00 cmp r3, #0
|
|
80028dc: d00a beq.n 80028f4 <HAL_RCC_OscConfig+0x410>
|
|
80028de: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80028e2: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
80028e6: 681b ldr r3, [r3, #0]
|
|
80028e8: 691b ldr r3, [r3, #16]
|
|
80028ea: 2b01 cmp r3, #1
|
|
80028ec: d002 beq.n 80028f4 <HAL_RCC_OscConfig+0x410>
|
|
{
|
|
return HAL_ERROR;
|
|
80028ee: 2301 movs r3, #1
|
|
80028f0: f000 be2e b.w 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
}
|
|
/* Otherwise, just the calibration is allowed */
|
|
else
|
|
{
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
80028f4: 4b75 ldr r3, [pc, #468] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
80028f6: 681b ldr r3, [r3, #0]
|
|
80028f8: f023 02f8 bic.w r2, r3, #248 @ 0xf8
|
|
80028fc: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002900: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002904: 681b ldr r3, [r3, #0]
|
|
8002906: 695b ldr r3, [r3, #20]
|
|
8002908: 21f8 movs r1, #248 @ 0xf8
|
|
800290a: f8c7 1170 str.w r1, [r7, #368] @ 0x170
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800290e: f8d7 1170 ldr.w r1, [r7, #368] @ 0x170
|
|
8002912: fa91 f1a1 rbit r1, r1
|
|
8002916: f8c7 116c str.w r1, [r7, #364] @ 0x16c
|
|
return result;
|
|
800291a: f8d7 116c ldr.w r1, [r7, #364] @ 0x16c
|
|
800291e: fab1 f181 clz r1, r1
|
|
8002922: b2c9 uxtb r1, r1
|
|
8002924: 408b lsls r3, r1
|
|
8002926: 4969 ldr r1, [pc, #420] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
8002928: 4313 orrs r3, r2
|
|
800292a: 600b str r3, [r1, #0]
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
800292c: e0fd b.n 8002b2a <HAL_RCC_OscConfig+0x646>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check the HSI State */
|
|
if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
|
800292e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002932: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002936: 681b ldr r3, [r3, #0]
|
|
8002938: 691b ldr r3, [r3, #16]
|
|
800293a: 2b00 cmp r3, #0
|
|
800293c: f000 8088 beq.w 8002a50 <HAL_RCC_OscConfig+0x56c>
|
|
8002940: 2301 movs r3, #1
|
|
8002942: f8c7 3168 str.w r3, [r7, #360] @ 0x168
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002946: f8d7 3168 ldr.w r3, [r7, #360] @ 0x168
|
|
800294a: fa93 f3a3 rbit r3, r3
|
|
800294e: f8c7 3164 str.w r3, [r7, #356] @ 0x164
|
|
return result;
|
|
8002952: f8d7 3164 ldr.w r3, [r7, #356] @ 0x164
|
|
{
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_ENABLE();
|
|
8002956: fab3 f383 clz r3, r3
|
|
800295a: b2db uxtb r3, r3
|
|
800295c: f103 5384 add.w r3, r3, #276824064 @ 0x10800000
|
|
8002960: f503 1384 add.w r3, r3, #1081344 @ 0x108000
|
|
8002964: 009b lsls r3, r3, #2
|
|
8002966: 461a mov r2, r3
|
|
8002968: 2301 movs r3, #1
|
|
800296a: 6013 str r3, [r2, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800296c: f7fd fe44 bl 80005f8 <HAL_GetTick>
|
|
8002970: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8002974: e00a b.n 800298c <HAL_RCC_OscConfig+0x4a8>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
8002976: f7fd fe3f bl 80005f8 <HAL_GetTick>
|
|
800297a: 4602 mov r2, r0
|
|
800297c: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
8002980: 1ad3 subs r3, r2, r3
|
|
8002982: 2b02 cmp r3, #2
|
|
8002984: d902 bls.n 800298c <HAL_RCC_OscConfig+0x4a8>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002986: 2303 movs r3, #3
|
|
8002988: f000 bde2 b.w 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
800298c: 2302 movs r3, #2
|
|
800298e: f8c7 3160 str.w r3, [r7, #352] @ 0x160
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002992: f8d7 3160 ldr.w r3, [r7, #352] @ 0x160
|
|
8002996: fa93 f3a3 rbit r3, r3
|
|
800299a: f8c7 315c str.w r3, [r7, #348] @ 0x15c
|
|
return result;
|
|
800299e: f8d7 315c ldr.w r3, [r7, #348] @ 0x15c
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
80029a2: fab3 f383 clz r3, r3
|
|
80029a6: b2db uxtb r3, r3
|
|
80029a8: 095b lsrs r3, r3, #5
|
|
80029aa: b2db uxtb r3, r3
|
|
80029ac: f043 0301 orr.w r3, r3, #1
|
|
80029b0: b2db uxtb r3, r3
|
|
80029b2: 2b01 cmp r3, #1
|
|
80029b4: d102 bne.n 80029bc <HAL_RCC_OscConfig+0x4d8>
|
|
80029b6: 4b45 ldr r3, [pc, #276] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
80029b8: 681b ldr r3, [r3, #0]
|
|
80029ba: e013 b.n 80029e4 <HAL_RCC_OscConfig+0x500>
|
|
80029bc: 2302 movs r3, #2
|
|
80029be: f8c7 3158 str.w r3, [r7, #344] @ 0x158
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80029c2: f8d7 3158 ldr.w r3, [r7, #344] @ 0x158
|
|
80029c6: fa93 f3a3 rbit r3, r3
|
|
80029ca: f8c7 3154 str.w r3, [r7, #340] @ 0x154
|
|
80029ce: 2302 movs r3, #2
|
|
80029d0: f8c7 3150 str.w r3, [r7, #336] @ 0x150
|
|
80029d4: f8d7 3150 ldr.w r3, [r7, #336] @ 0x150
|
|
80029d8: fa93 f3a3 rbit r3, r3
|
|
80029dc: f8c7 314c str.w r3, [r7, #332] @ 0x14c
|
|
80029e0: 4b3a ldr r3, [pc, #232] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
80029e2: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80029e4: 2202 movs r2, #2
|
|
80029e6: f8c7 2148 str.w r2, [r7, #328] @ 0x148
|
|
80029ea: f8d7 2148 ldr.w r2, [r7, #328] @ 0x148
|
|
80029ee: fa92 f2a2 rbit r2, r2
|
|
80029f2: f8c7 2144 str.w r2, [r7, #324] @ 0x144
|
|
return result;
|
|
80029f6: f8d7 2144 ldr.w r2, [r7, #324] @ 0x144
|
|
80029fa: fab2 f282 clz r2, r2
|
|
80029fe: b2d2 uxtb r2, r2
|
|
8002a00: f042 0220 orr.w r2, r2, #32
|
|
8002a04: b2d2 uxtb r2, r2
|
|
8002a06: f002 021f and.w r2, r2, #31
|
|
8002a0a: 2101 movs r1, #1
|
|
8002a0c: fa01 f202 lsl.w r2, r1, r2
|
|
8002a10: 4013 ands r3, r2
|
|
8002a12: 2b00 cmp r3, #0
|
|
8002a14: d0af beq.n 8002976 <HAL_RCC_OscConfig+0x492>
|
|
}
|
|
}
|
|
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
8002a16: 4b2d ldr r3, [pc, #180] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
8002a18: 681b ldr r3, [r3, #0]
|
|
8002a1a: f023 02f8 bic.w r2, r3, #248 @ 0xf8
|
|
8002a1e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002a22: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002a26: 681b ldr r3, [r3, #0]
|
|
8002a28: 695b ldr r3, [r3, #20]
|
|
8002a2a: 21f8 movs r1, #248 @ 0xf8
|
|
8002a2c: f8c7 1140 str.w r1, [r7, #320] @ 0x140
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002a30: f8d7 1140 ldr.w r1, [r7, #320] @ 0x140
|
|
8002a34: fa91 f1a1 rbit r1, r1
|
|
8002a38: f8c7 113c str.w r1, [r7, #316] @ 0x13c
|
|
return result;
|
|
8002a3c: f8d7 113c ldr.w r1, [r7, #316] @ 0x13c
|
|
8002a40: fab1 f181 clz r1, r1
|
|
8002a44: b2c9 uxtb r1, r1
|
|
8002a46: 408b lsls r3, r1
|
|
8002a48: 4920 ldr r1, [pc, #128] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
8002a4a: 4313 orrs r3, r2
|
|
8002a4c: 600b str r3, [r1, #0]
|
|
8002a4e: e06c b.n 8002b2a <HAL_RCC_OscConfig+0x646>
|
|
8002a50: 2301 movs r3, #1
|
|
8002a52: f8c7 3138 str.w r3, [r7, #312] @ 0x138
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002a56: f8d7 3138 ldr.w r3, [r7, #312] @ 0x138
|
|
8002a5a: fa93 f3a3 rbit r3, r3
|
|
8002a5e: f8c7 3134 str.w r3, [r7, #308] @ 0x134
|
|
return result;
|
|
8002a62: f8d7 3134 ldr.w r3, [r7, #308] @ 0x134
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_DISABLE();
|
|
8002a66: fab3 f383 clz r3, r3
|
|
8002a6a: b2db uxtb r3, r3
|
|
8002a6c: f103 5384 add.w r3, r3, #276824064 @ 0x10800000
|
|
8002a70: f503 1384 add.w r3, r3, #1081344 @ 0x108000
|
|
8002a74: 009b lsls r3, r3, #2
|
|
8002a76: 461a mov r2, r3
|
|
8002a78: 2300 movs r3, #0
|
|
8002a7a: 6013 str r3, [r2, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002a7c: f7fd fdbc bl 80005f8 <HAL_GetTick>
|
|
8002a80: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till HSI is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
8002a84: e00a b.n 8002a9c <HAL_RCC_OscConfig+0x5b8>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
8002a86: f7fd fdb7 bl 80005f8 <HAL_GetTick>
|
|
8002a8a: 4602 mov r2, r0
|
|
8002a8c: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
8002a90: 1ad3 subs r3, r2, r3
|
|
8002a92: 2b02 cmp r3, #2
|
|
8002a94: d902 bls.n 8002a9c <HAL_RCC_OscConfig+0x5b8>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002a96: 2303 movs r3, #3
|
|
8002a98: f000 bd5a b.w 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
8002a9c: 2302 movs r3, #2
|
|
8002a9e: f8c7 3130 str.w r3, [r7, #304] @ 0x130
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002aa2: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
|
|
8002aa6: fa93 f3a3 rbit r3, r3
|
|
8002aaa: f8c7 312c str.w r3, [r7, #300] @ 0x12c
|
|
return result;
|
|
8002aae: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
8002ab2: fab3 f383 clz r3, r3
|
|
8002ab6: b2db uxtb r3, r3
|
|
8002ab8: 095b lsrs r3, r3, #5
|
|
8002aba: b2db uxtb r3, r3
|
|
8002abc: f043 0301 orr.w r3, r3, #1
|
|
8002ac0: b2db uxtb r3, r3
|
|
8002ac2: 2b01 cmp r3, #1
|
|
8002ac4: d104 bne.n 8002ad0 <HAL_RCC_OscConfig+0x5ec>
|
|
8002ac6: 4b01 ldr r3, [pc, #4] @ (8002acc <HAL_RCC_OscConfig+0x5e8>)
|
|
8002ac8: 681b ldr r3, [r3, #0]
|
|
8002aca: e015 b.n 8002af8 <HAL_RCC_OscConfig+0x614>
|
|
8002acc: 40021000 .word 0x40021000
|
|
8002ad0: 2302 movs r3, #2
|
|
8002ad2: f8c7 3128 str.w r3, [r7, #296] @ 0x128
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002ad6: f8d7 3128 ldr.w r3, [r7, #296] @ 0x128
|
|
8002ada: fa93 f3a3 rbit r3, r3
|
|
8002ade: f8c7 3124 str.w r3, [r7, #292] @ 0x124
|
|
8002ae2: 2302 movs r3, #2
|
|
8002ae4: f8c7 3120 str.w r3, [r7, #288] @ 0x120
|
|
8002ae8: f8d7 3120 ldr.w r3, [r7, #288] @ 0x120
|
|
8002aec: fa93 f3a3 rbit r3, r3
|
|
8002af0: f8c7 311c str.w r3, [r7, #284] @ 0x11c
|
|
8002af4: 4bc8 ldr r3, [pc, #800] @ (8002e18 <HAL_RCC_OscConfig+0x934>)
|
|
8002af6: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8002af8: 2202 movs r2, #2
|
|
8002afa: f8c7 2118 str.w r2, [r7, #280] @ 0x118
|
|
8002afe: f8d7 2118 ldr.w r2, [r7, #280] @ 0x118
|
|
8002b02: fa92 f2a2 rbit r2, r2
|
|
8002b06: f8c7 2114 str.w r2, [r7, #276] @ 0x114
|
|
return result;
|
|
8002b0a: f8d7 2114 ldr.w r2, [r7, #276] @ 0x114
|
|
8002b0e: fab2 f282 clz r2, r2
|
|
8002b12: b2d2 uxtb r2, r2
|
|
8002b14: f042 0220 orr.w r2, r2, #32
|
|
8002b18: b2d2 uxtb r2, r2
|
|
8002b1a: f002 021f and.w r2, r2, #31
|
|
8002b1e: 2101 movs r1, #1
|
|
8002b20: fa01 f202 lsl.w r2, r1, r2
|
|
8002b24: 4013 ands r3, r2
|
|
8002b26: 2b00 cmp r3, #0
|
|
8002b28: d1ad bne.n 8002a86 <HAL_RCC_OscConfig+0x5a2>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSI Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
|
8002b2a: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002b2e: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002b32: 681b ldr r3, [r3, #0]
|
|
8002b34: 681b ldr r3, [r3, #0]
|
|
8002b36: f003 0308 and.w r3, r3, #8
|
|
8002b3a: 2b00 cmp r3, #0
|
|
8002b3c: f000 8110 beq.w 8002d60 <HAL_RCC_OscConfig+0x87c>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
|
|
|
/* Check the LSI State */
|
|
if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
|
8002b40: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002b44: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002b48: 681b ldr r3, [r3, #0]
|
|
8002b4a: 699b ldr r3, [r3, #24]
|
|
8002b4c: 2b00 cmp r3, #0
|
|
8002b4e: d079 beq.n 8002c44 <HAL_RCC_OscConfig+0x760>
|
|
8002b50: 2301 movs r3, #1
|
|
8002b52: f8c7 3110 str.w r3, [r7, #272] @ 0x110
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002b56: f8d7 3110 ldr.w r3, [r7, #272] @ 0x110
|
|
8002b5a: fa93 f3a3 rbit r3, r3
|
|
8002b5e: f8c7 310c str.w r3, [r7, #268] @ 0x10c
|
|
return result;
|
|
8002b62: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
|
|
{
|
|
/* Enable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_ENABLE();
|
|
8002b66: fab3 f383 clz r3, r3
|
|
8002b6a: b2db uxtb r3, r3
|
|
8002b6c: 461a mov r2, r3
|
|
8002b6e: 4bab ldr r3, [pc, #684] @ (8002e1c <HAL_RCC_OscConfig+0x938>)
|
|
8002b70: 4413 add r3, r2
|
|
8002b72: 009b lsls r3, r3, #2
|
|
8002b74: 461a mov r2, r3
|
|
8002b76: 2301 movs r3, #1
|
|
8002b78: 6013 str r3, [r2, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002b7a: f7fd fd3d bl 80005f8 <HAL_GetTick>
|
|
8002b7e: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till LSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
8002b82: e00a b.n 8002b9a <HAL_RCC_OscConfig+0x6b6>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
8002b84: f7fd fd38 bl 80005f8 <HAL_GetTick>
|
|
8002b88: 4602 mov r2, r0
|
|
8002b8a: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
8002b8e: 1ad3 subs r3, r2, r3
|
|
8002b90: 2b02 cmp r3, #2
|
|
8002b92: d902 bls.n 8002b9a <HAL_RCC_OscConfig+0x6b6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002b94: 2303 movs r3, #3
|
|
8002b96: f000 bcdb b.w 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
8002b9a: 2302 movs r3, #2
|
|
8002b9c: f8c7 3108 str.w r3, [r7, #264] @ 0x108
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002ba0: f8d7 3108 ldr.w r3, [r7, #264] @ 0x108
|
|
8002ba4: fa93 f3a3 rbit r3, r3
|
|
8002ba8: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
8002bac: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002bb0: f5a3 7380 sub.w r3, r3, #256 @ 0x100
|
|
8002bb4: 2202 movs r2, #2
|
|
8002bb6: 601a str r2, [r3, #0]
|
|
8002bb8: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002bbc: f5a3 7380 sub.w r3, r3, #256 @ 0x100
|
|
8002bc0: 681b ldr r3, [r3, #0]
|
|
8002bc2: fa93 f2a3 rbit r2, r3
|
|
8002bc6: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002bca: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8002bce: 601a str r2, [r3, #0]
|
|
8002bd0: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002bd4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8002bd8: 2202 movs r2, #2
|
|
8002bda: 601a str r2, [r3, #0]
|
|
8002bdc: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002be0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8002be4: 681b ldr r3, [r3, #0]
|
|
8002be6: fa93 f2a3 rbit r2, r3
|
|
8002bea: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002bee: f5a3 7386 sub.w r3, r3, #268 @ 0x10c
|
|
8002bf2: 601a str r2, [r3, #0]
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
8002bf4: 4b88 ldr r3, [pc, #544] @ (8002e18 <HAL_RCC_OscConfig+0x934>)
|
|
8002bf6: 6a5a ldr r2, [r3, #36] @ 0x24
|
|
8002bf8: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002bfc: f5a3 7388 sub.w r3, r3, #272 @ 0x110
|
|
8002c00: 2102 movs r1, #2
|
|
8002c02: 6019 str r1, [r3, #0]
|
|
8002c04: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002c08: f5a3 7388 sub.w r3, r3, #272 @ 0x110
|
|
8002c0c: 681b ldr r3, [r3, #0]
|
|
8002c0e: fa93 f1a3 rbit r1, r3
|
|
8002c12: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002c16: f5a3 738a sub.w r3, r3, #276 @ 0x114
|
|
8002c1a: 6019 str r1, [r3, #0]
|
|
return result;
|
|
8002c1c: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002c20: f5a3 738a sub.w r3, r3, #276 @ 0x114
|
|
8002c24: 681b ldr r3, [r3, #0]
|
|
8002c26: fab3 f383 clz r3, r3
|
|
8002c2a: b2db uxtb r3, r3
|
|
8002c2c: f043 0360 orr.w r3, r3, #96 @ 0x60
|
|
8002c30: b2db uxtb r3, r3
|
|
8002c32: f003 031f and.w r3, r3, #31
|
|
8002c36: 2101 movs r1, #1
|
|
8002c38: fa01 f303 lsl.w r3, r1, r3
|
|
8002c3c: 4013 ands r3, r2
|
|
8002c3e: 2b00 cmp r3, #0
|
|
8002c40: d0a0 beq.n 8002b84 <HAL_RCC_OscConfig+0x6a0>
|
|
8002c42: e08d b.n 8002d60 <HAL_RCC_OscConfig+0x87c>
|
|
8002c44: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002c48: f5a3 738c sub.w r3, r3, #280 @ 0x118
|
|
8002c4c: 2201 movs r2, #1
|
|
8002c4e: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002c50: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002c54: f5a3 738c sub.w r3, r3, #280 @ 0x118
|
|
8002c58: 681b ldr r3, [r3, #0]
|
|
8002c5a: fa93 f2a3 rbit r2, r3
|
|
8002c5e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002c62: f5a3 738e sub.w r3, r3, #284 @ 0x11c
|
|
8002c66: 601a str r2, [r3, #0]
|
|
return result;
|
|
8002c68: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002c6c: f5a3 738e sub.w r3, r3, #284 @ 0x11c
|
|
8002c70: 681b ldr r3, [r3, #0]
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_DISABLE();
|
|
8002c72: fab3 f383 clz r3, r3
|
|
8002c76: b2db uxtb r3, r3
|
|
8002c78: 461a mov r2, r3
|
|
8002c7a: 4b68 ldr r3, [pc, #416] @ (8002e1c <HAL_RCC_OscConfig+0x938>)
|
|
8002c7c: 4413 add r3, r2
|
|
8002c7e: 009b lsls r3, r3, #2
|
|
8002c80: 461a mov r2, r3
|
|
8002c82: 2300 movs r3, #0
|
|
8002c84: 6013 str r3, [r2, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002c86: f7fd fcb7 bl 80005f8 <HAL_GetTick>
|
|
8002c8a: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till LSI is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
8002c8e: e00a b.n 8002ca6 <HAL_RCC_OscConfig+0x7c2>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
8002c90: f7fd fcb2 bl 80005f8 <HAL_GetTick>
|
|
8002c94: 4602 mov r2, r0
|
|
8002c96: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
8002c9a: 1ad3 subs r3, r2, r3
|
|
8002c9c: 2b02 cmp r3, #2
|
|
8002c9e: d902 bls.n 8002ca6 <HAL_RCC_OscConfig+0x7c2>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002ca0: 2303 movs r3, #3
|
|
8002ca2: f000 bc55 b.w 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
8002ca6: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002caa: f5a3 7390 sub.w r3, r3, #288 @ 0x120
|
|
8002cae: 2202 movs r2, #2
|
|
8002cb0: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002cb2: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002cb6: f5a3 7390 sub.w r3, r3, #288 @ 0x120
|
|
8002cba: 681b ldr r3, [r3, #0]
|
|
8002cbc: fa93 f2a3 rbit r2, r3
|
|
8002cc0: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002cc4: f5a3 7392 sub.w r3, r3, #292 @ 0x124
|
|
8002cc8: 601a str r2, [r3, #0]
|
|
8002cca: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002cce: f5a3 7394 sub.w r3, r3, #296 @ 0x128
|
|
8002cd2: 2202 movs r2, #2
|
|
8002cd4: 601a str r2, [r3, #0]
|
|
8002cd6: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002cda: f5a3 7394 sub.w r3, r3, #296 @ 0x128
|
|
8002cde: 681b ldr r3, [r3, #0]
|
|
8002ce0: fa93 f2a3 rbit r2, r3
|
|
8002ce4: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002ce8: f5a3 7396 sub.w r3, r3, #300 @ 0x12c
|
|
8002cec: 601a str r2, [r3, #0]
|
|
8002cee: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002cf2: f5a3 7398 sub.w r3, r3, #304 @ 0x130
|
|
8002cf6: 2202 movs r2, #2
|
|
8002cf8: 601a str r2, [r3, #0]
|
|
8002cfa: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002cfe: f5a3 7398 sub.w r3, r3, #304 @ 0x130
|
|
8002d02: 681b ldr r3, [r3, #0]
|
|
8002d04: fa93 f2a3 rbit r2, r3
|
|
8002d08: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002d0c: f5a3 739a sub.w r3, r3, #308 @ 0x134
|
|
8002d10: 601a str r2, [r3, #0]
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
8002d12: 4b41 ldr r3, [pc, #260] @ (8002e18 <HAL_RCC_OscConfig+0x934>)
|
|
8002d14: 6a5a ldr r2, [r3, #36] @ 0x24
|
|
8002d16: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002d1a: f5a3 739c sub.w r3, r3, #312 @ 0x138
|
|
8002d1e: 2102 movs r1, #2
|
|
8002d20: 6019 str r1, [r3, #0]
|
|
8002d22: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002d26: f5a3 739c sub.w r3, r3, #312 @ 0x138
|
|
8002d2a: 681b ldr r3, [r3, #0]
|
|
8002d2c: fa93 f1a3 rbit r1, r3
|
|
8002d30: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002d34: f5a3 739e sub.w r3, r3, #316 @ 0x13c
|
|
8002d38: 6019 str r1, [r3, #0]
|
|
return result;
|
|
8002d3a: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002d3e: f5a3 739e sub.w r3, r3, #316 @ 0x13c
|
|
8002d42: 681b ldr r3, [r3, #0]
|
|
8002d44: fab3 f383 clz r3, r3
|
|
8002d48: b2db uxtb r3, r3
|
|
8002d4a: f043 0360 orr.w r3, r3, #96 @ 0x60
|
|
8002d4e: b2db uxtb r3, r3
|
|
8002d50: f003 031f and.w r3, r3, #31
|
|
8002d54: 2101 movs r1, #1
|
|
8002d56: fa01 f303 lsl.w r3, r1, r3
|
|
8002d5a: 4013 ands r3, r2
|
|
8002d5c: 2b00 cmp r3, #0
|
|
8002d5e: d197 bne.n 8002c90 <HAL_RCC_OscConfig+0x7ac>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSE Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
|
8002d60: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002d64: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002d68: 681b ldr r3, [r3, #0]
|
|
8002d6a: 681b ldr r3, [r3, #0]
|
|
8002d6c: f003 0304 and.w r3, r3, #4
|
|
8002d70: 2b00 cmp r3, #0
|
|
8002d72: f000 81a1 beq.w 80030b8 <HAL_RCC_OscConfig+0xbd4>
|
|
{
|
|
FlagStatus pwrclkchanged = RESET;
|
|
8002d76: 2300 movs r3, #0
|
|
8002d78: f887 31ff strb.w r3, [r7, #511] @ 0x1ff
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
|
|
|
/* Update LSE configuration in Backup Domain control register */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
8002d7c: 4b26 ldr r3, [pc, #152] @ (8002e18 <HAL_RCC_OscConfig+0x934>)
|
|
8002d7e: 69db ldr r3, [r3, #28]
|
|
8002d80: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
|
|
8002d84: 2b00 cmp r3, #0
|
|
8002d86: d116 bne.n 8002db6 <HAL_RCC_OscConfig+0x8d2>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8002d88: 4b23 ldr r3, [pc, #140] @ (8002e18 <HAL_RCC_OscConfig+0x934>)
|
|
8002d8a: 69db ldr r3, [r3, #28]
|
|
8002d8c: 4a22 ldr r2, [pc, #136] @ (8002e18 <HAL_RCC_OscConfig+0x934>)
|
|
8002d8e: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
|
|
8002d92: 61d3 str r3, [r2, #28]
|
|
8002d94: 4b20 ldr r3, [pc, #128] @ (8002e18 <HAL_RCC_OscConfig+0x934>)
|
|
8002d96: 69db ldr r3, [r3, #28]
|
|
8002d98: f003 5280 and.w r2, r3, #268435456 @ 0x10000000
|
|
8002d9c: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002da0: f5a3 73fc sub.w r3, r3, #504 @ 0x1f8
|
|
8002da4: 601a str r2, [r3, #0]
|
|
8002da6: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002daa: f5a3 73fc sub.w r3, r3, #504 @ 0x1f8
|
|
8002dae: 681b ldr r3, [r3, #0]
|
|
pwrclkchanged = SET;
|
|
8002db0: 2301 movs r3, #1
|
|
8002db2: f887 31ff strb.w r3, [r7, #511] @ 0x1ff
|
|
}
|
|
|
|
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8002db6: 4b1a ldr r3, [pc, #104] @ (8002e20 <HAL_RCC_OscConfig+0x93c>)
|
|
8002db8: 681b ldr r3, [r3, #0]
|
|
8002dba: f403 7380 and.w r3, r3, #256 @ 0x100
|
|
8002dbe: 2b00 cmp r3, #0
|
|
8002dc0: d11a bne.n 8002df8 <HAL_RCC_OscConfig+0x914>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
8002dc2: 4b17 ldr r3, [pc, #92] @ (8002e20 <HAL_RCC_OscConfig+0x93c>)
|
|
8002dc4: 681b ldr r3, [r3, #0]
|
|
8002dc6: 4a16 ldr r2, [pc, #88] @ (8002e20 <HAL_RCC_OscConfig+0x93c>)
|
|
8002dc8: f443 7380 orr.w r3, r3, #256 @ 0x100
|
|
8002dcc: 6013 str r3, [r2, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
8002dce: f7fd fc13 bl 80005f8 <HAL_GetTick>
|
|
8002dd2: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8002dd6: e009 b.n 8002dec <HAL_RCC_OscConfig+0x908>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8002dd8: f7fd fc0e bl 80005f8 <HAL_GetTick>
|
|
8002ddc: 4602 mov r2, r0
|
|
8002dde: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
8002de2: 1ad3 subs r3, r2, r3
|
|
8002de4: 2b64 cmp r3, #100 @ 0x64
|
|
8002de6: d901 bls.n 8002dec <HAL_RCC_OscConfig+0x908>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002de8: 2303 movs r3, #3
|
|
8002dea: e3b1 b.n 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8002dec: 4b0c ldr r3, [pc, #48] @ (8002e20 <HAL_RCC_OscConfig+0x93c>)
|
|
8002dee: 681b ldr r3, [r3, #0]
|
|
8002df0: f403 7380 and.w r3, r3, #256 @ 0x100
|
|
8002df4: 2b00 cmp r3, #0
|
|
8002df6: d0ef beq.n 8002dd8 <HAL_RCC_OscConfig+0x8f4>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Set the new LSE configuration -----------------------------------------*/
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
8002df8: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002dfc: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002e00: 681b ldr r3, [r3, #0]
|
|
8002e02: 68db ldr r3, [r3, #12]
|
|
8002e04: 2b01 cmp r3, #1
|
|
8002e06: d10d bne.n 8002e24 <HAL_RCC_OscConfig+0x940>
|
|
8002e08: 4b03 ldr r3, [pc, #12] @ (8002e18 <HAL_RCC_OscConfig+0x934>)
|
|
8002e0a: 6a1b ldr r3, [r3, #32]
|
|
8002e0c: 4a02 ldr r2, [pc, #8] @ (8002e18 <HAL_RCC_OscConfig+0x934>)
|
|
8002e0e: f043 0301 orr.w r3, r3, #1
|
|
8002e12: 6213 str r3, [r2, #32]
|
|
8002e14: e03c b.n 8002e90 <HAL_RCC_OscConfig+0x9ac>
|
|
8002e16: bf00 nop
|
|
8002e18: 40021000 .word 0x40021000
|
|
8002e1c: 10908120 .word 0x10908120
|
|
8002e20: 40007000 .word 0x40007000
|
|
8002e24: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002e28: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002e2c: 681b ldr r3, [r3, #0]
|
|
8002e2e: 68db ldr r3, [r3, #12]
|
|
8002e30: 2b00 cmp r3, #0
|
|
8002e32: d10c bne.n 8002e4e <HAL_RCC_OscConfig+0x96a>
|
|
8002e34: 4bc1 ldr r3, [pc, #772] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e36: 6a1b ldr r3, [r3, #32]
|
|
8002e38: 4ac0 ldr r2, [pc, #768] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e3a: f023 0301 bic.w r3, r3, #1
|
|
8002e3e: 6213 str r3, [r2, #32]
|
|
8002e40: 4bbe ldr r3, [pc, #760] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e42: 6a1b ldr r3, [r3, #32]
|
|
8002e44: 4abd ldr r2, [pc, #756] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e46: f023 0304 bic.w r3, r3, #4
|
|
8002e4a: 6213 str r3, [r2, #32]
|
|
8002e4c: e020 b.n 8002e90 <HAL_RCC_OscConfig+0x9ac>
|
|
8002e4e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002e52: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002e56: 681b ldr r3, [r3, #0]
|
|
8002e58: 68db ldr r3, [r3, #12]
|
|
8002e5a: 2b05 cmp r3, #5
|
|
8002e5c: d10c bne.n 8002e78 <HAL_RCC_OscConfig+0x994>
|
|
8002e5e: 4bb7 ldr r3, [pc, #732] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e60: 6a1b ldr r3, [r3, #32]
|
|
8002e62: 4ab6 ldr r2, [pc, #728] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e64: f043 0304 orr.w r3, r3, #4
|
|
8002e68: 6213 str r3, [r2, #32]
|
|
8002e6a: 4bb4 ldr r3, [pc, #720] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e6c: 6a1b ldr r3, [r3, #32]
|
|
8002e6e: 4ab3 ldr r2, [pc, #716] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e70: f043 0301 orr.w r3, r3, #1
|
|
8002e74: 6213 str r3, [r2, #32]
|
|
8002e76: e00b b.n 8002e90 <HAL_RCC_OscConfig+0x9ac>
|
|
8002e78: 4bb0 ldr r3, [pc, #704] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e7a: 6a1b ldr r3, [r3, #32]
|
|
8002e7c: 4aaf ldr r2, [pc, #700] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e7e: f023 0301 bic.w r3, r3, #1
|
|
8002e82: 6213 str r3, [r2, #32]
|
|
8002e84: 4bad ldr r3, [pc, #692] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e86: 6a1b ldr r3, [r3, #32]
|
|
8002e88: 4aac ldr r2, [pc, #688] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002e8a: f023 0304 bic.w r3, r3, #4
|
|
8002e8e: 6213 str r3, [r2, #32]
|
|
/* Check the LSE State */
|
|
if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
|
8002e90: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002e94: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8002e98: 681b ldr r3, [r3, #0]
|
|
8002e9a: 68db ldr r3, [r3, #12]
|
|
8002e9c: 2b00 cmp r3, #0
|
|
8002e9e: f000 8081 beq.w 8002fa4 <HAL_RCC_OscConfig+0xac0>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002ea2: f7fd fba9 bl 80005f8 <HAL_GetTick>
|
|
8002ea6: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8002eaa: e00b b.n 8002ec4 <HAL_RCC_OscConfig+0x9e0>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
8002eac: f7fd fba4 bl 80005f8 <HAL_GetTick>
|
|
8002eb0: 4602 mov r2, r0
|
|
8002eb2: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
8002eb6: 1ad3 subs r3, r2, r3
|
|
8002eb8: f241 3288 movw r2, #5000 @ 0x1388
|
|
8002ebc: 4293 cmp r3, r2
|
|
8002ebe: d901 bls.n 8002ec4 <HAL_RCC_OscConfig+0x9e0>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002ec0: 2303 movs r3, #3
|
|
8002ec2: e345 b.n 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
8002ec4: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002ec8: f5a3 73a0 sub.w r3, r3, #320 @ 0x140
|
|
8002ecc: 2202 movs r2, #2
|
|
8002ece: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002ed0: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002ed4: f5a3 73a0 sub.w r3, r3, #320 @ 0x140
|
|
8002ed8: 681b ldr r3, [r3, #0]
|
|
8002eda: fa93 f2a3 rbit r2, r3
|
|
8002ede: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002ee2: f5a3 73a2 sub.w r3, r3, #324 @ 0x144
|
|
8002ee6: 601a str r2, [r3, #0]
|
|
8002ee8: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002eec: f5a3 73a4 sub.w r3, r3, #328 @ 0x148
|
|
8002ef0: 2202 movs r2, #2
|
|
8002ef2: 601a str r2, [r3, #0]
|
|
8002ef4: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002ef8: f5a3 73a4 sub.w r3, r3, #328 @ 0x148
|
|
8002efc: 681b ldr r3, [r3, #0]
|
|
8002efe: fa93 f2a3 rbit r2, r3
|
|
8002f02: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002f06: f5a3 73a6 sub.w r3, r3, #332 @ 0x14c
|
|
8002f0a: 601a str r2, [r3, #0]
|
|
return result;
|
|
8002f0c: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002f10: f5a3 73a6 sub.w r3, r3, #332 @ 0x14c
|
|
8002f14: 681b ldr r3, [r3, #0]
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8002f16: fab3 f383 clz r3, r3
|
|
8002f1a: b2db uxtb r3, r3
|
|
8002f1c: 095b lsrs r3, r3, #5
|
|
8002f1e: b2db uxtb r3, r3
|
|
8002f20: f043 0302 orr.w r3, r3, #2
|
|
8002f24: b2db uxtb r3, r3
|
|
8002f26: 2b02 cmp r3, #2
|
|
8002f28: d102 bne.n 8002f30 <HAL_RCC_OscConfig+0xa4c>
|
|
8002f2a: 4b84 ldr r3, [pc, #528] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002f2c: 6a1b ldr r3, [r3, #32]
|
|
8002f2e: e013 b.n 8002f58 <HAL_RCC_OscConfig+0xa74>
|
|
8002f30: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002f34: f5a3 73a8 sub.w r3, r3, #336 @ 0x150
|
|
8002f38: 2202 movs r2, #2
|
|
8002f3a: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002f3c: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002f40: f5a3 73a8 sub.w r3, r3, #336 @ 0x150
|
|
8002f44: 681b ldr r3, [r3, #0]
|
|
8002f46: fa93 f2a3 rbit r2, r3
|
|
8002f4a: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002f4e: f5a3 73aa sub.w r3, r3, #340 @ 0x154
|
|
8002f52: 601a str r2, [r3, #0]
|
|
8002f54: 4b79 ldr r3, [pc, #484] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8002f56: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8002f58: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8002f5c: f5a2 72ac sub.w r2, r2, #344 @ 0x158
|
|
8002f60: 2102 movs r1, #2
|
|
8002f62: 6011 str r1, [r2, #0]
|
|
8002f64: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8002f68: f5a2 72ac sub.w r2, r2, #344 @ 0x158
|
|
8002f6c: 6812 ldr r2, [r2, #0]
|
|
8002f6e: fa92 f1a2 rbit r1, r2
|
|
8002f72: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8002f76: f5a2 72ae sub.w r2, r2, #348 @ 0x15c
|
|
8002f7a: 6011 str r1, [r2, #0]
|
|
return result;
|
|
8002f7c: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8002f80: f5a2 72ae sub.w r2, r2, #348 @ 0x15c
|
|
8002f84: 6812 ldr r2, [r2, #0]
|
|
8002f86: fab2 f282 clz r2, r2
|
|
8002f8a: b2d2 uxtb r2, r2
|
|
8002f8c: f042 0240 orr.w r2, r2, #64 @ 0x40
|
|
8002f90: b2d2 uxtb r2, r2
|
|
8002f92: f002 021f and.w r2, r2, #31
|
|
8002f96: 2101 movs r1, #1
|
|
8002f98: fa01 f202 lsl.w r2, r1, r2
|
|
8002f9c: 4013 ands r3, r2
|
|
8002f9e: 2b00 cmp r3, #0
|
|
8002fa0: d084 beq.n 8002eac <HAL_RCC_OscConfig+0x9c8>
|
|
8002fa2: e07f b.n 80030a4 <HAL_RCC_OscConfig+0xbc0>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8002fa4: f7fd fb28 bl 80005f8 <HAL_GetTick>
|
|
8002fa8: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till LSE is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8002fac: e00b b.n 8002fc6 <HAL_RCC_OscConfig+0xae2>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
8002fae: f7fd fb23 bl 80005f8 <HAL_GetTick>
|
|
8002fb2: 4602 mov r2, r0
|
|
8002fb4: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
8002fb8: 1ad3 subs r3, r2, r3
|
|
8002fba: f241 3288 movw r2, #5000 @ 0x1388
|
|
8002fbe: 4293 cmp r3, r2
|
|
8002fc0: d901 bls.n 8002fc6 <HAL_RCC_OscConfig+0xae2>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8002fc2: 2303 movs r3, #3
|
|
8002fc4: e2c4 b.n 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
8002fc6: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002fca: f5a3 73b0 sub.w r3, r3, #352 @ 0x160
|
|
8002fce: 2202 movs r2, #2
|
|
8002fd0: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8002fd2: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002fd6: f5a3 73b0 sub.w r3, r3, #352 @ 0x160
|
|
8002fda: 681b ldr r3, [r3, #0]
|
|
8002fdc: fa93 f2a3 rbit r2, r3
|
|
8002fe0: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002fe4: f5a3 73b2 sub.w r3, r3, #356 @ 0x164
|
|
8002fe8: 601a str r2, [r3, #0]
|
|
8002fea: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002fee: f5a3 73b4 sub.w r3, r3, #360 @ 0x168
|
|
8002ff2: 2202 movs r2, #2
|
|
8002ff4: 601a str r2, [r3, #0]
|
|
8002ff6: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8002ffa: f5a3 73b4 sub.w r3, r3, #360 @ 0x168
|
|
8002ffe: 681b ldr r3, [r3, #0]
|
|
8003000: fa93 f2a3 rbit r2, r3
|
|
8003004: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003008: f5a3 73b6 sub.w r3, r3, #364 @ 0x16c
|
|
800300c: 601a str r2, [r3, #0]
|
|
return result;
|
|
800300e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003012: f5a3 73b6 sub.w r3, r3, #364 @ 0x16c
|
|
8003016: 681b ldr r3, [r3, #0]
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8003018: fab3 f383 clz r3, r3
|
|
800301c: b2db uxtb r3, r3
|
|
800301e: 095b lsrs r3, r3, #5
|
|
8003020: b2db uxtb r3, r3
|
|
8003022: f043 0302 orr.w r3, r3, #2
|
|
8003026: b2db uxtb r3, r3
|
|
8003028: 2b02 cmp r3, #2
|
|
800302a: d102 bne.n 8003032 <HAL_RCC_OscConfig+0xb4e>
|
|
800302c: 4b43 ldr r3, [pc, #268] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
800302e: 6a1b ldr r3, [r3, #32]
|
|
8003030: e013 b.n 800305a <HAL_RCC_OscConfig+0xb76>
|
|
8003032: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003036: f5a3 73b8 sub.w r3, r3, #368 @ 0x170
|
|
800303a: 2202 movs r2, #2
|
|
800303c: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800303e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003042: f5a3 73b8 sub.w r3, r3, #368 @ 0x170
|
|
8003046: 681b ldr r3, [r3, #0]
|
|
8003048: fa93 f2a3 rbit r2, r3
|
|
800304c: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003050: f5a3 73ba sub.w r3, r3, #372 @ 0x174
|
|
8003054: 601a str r2, [r3, #0]
|
|
8003056: 4b39 ldr r3, [pc, #228] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
8003058: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
800305a: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
800305e: f5a2 72bc sub.w r2, r2, #376 @ 0x178
|
|
8003062: 2102 movs r1, #2
|
|
8003064: 6011 str r1, [r2, #0]
|
|
8003066: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
800306a: f5a2 72bc sub.w r2, r2, #376 @ 0x178
|
|
800306e: 6812 ldr r2, [r2, #0]
|
|
8003070: fa92 f1a2 rbit r1, r2
|
|
8003074: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8003078: f5a2 72be sub.w r2, r2, #380 @ 0x17c
|
|
800307c: 6011 str r1, [r2, #0]
|
|
return result;
|
|
800307e: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8003082: f5a2 72be sub.w r2, r2, #380 @ 0x17c
|
|
8003086: 6812 ldr r2, [r2, #0]
|
|
8003088: fab2 f282 clz r2, r2
|
|
800308c: b2d2 uxtb r2, r2
|
|
800308e: f042 0240 orr.w r2, r2, #64 @ 0x40
|
|
8003092: b2d2 uxtb r2, r2
|
|
8003094: f002 021f and.w r2, r2, #31
|
|
8003098: 2101 movs r1, #1
|
|
800309a: fa01 f202 lsl.w r2, r1, r2
|
|
800309e: 4013 ands r3, r2
|
|
80030a0: 2b00 cmp r3, #0
|
|
80030a2: d184 bne.n 8002fae <HAL_RCC_OscConfig+0xaca>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Require to disable power clock if necessary */
|
|
if(pwrclkchanged == SET)
|
|
80030a4: f897 31ff ldrb.w r3, [r7, #511] @ 0x1ff
|
|
80030a8: 2b01 cmp r3, #1
|
|
80030aa: d105 bne.n 80030b8 <HAL_RCC_OscConfig+0xbd4>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
80030ac: 4b23 ldr r3, [pc, #140] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
80030ae: 69db ldr r3, [r3, #28]
|
|
80030b0: 4a22 ldr r2, [pc, #136] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
80030b2: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
|
|
80030b6: 61d3 str r3, [r2, #28]
|
|
}
|
|
|
|
/*-------------------------------- PLL Configuration -----------------------*/
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
|
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
|
80030b8: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80030bc: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
80030c0: 681b ldr r3, [r3, #0]
|
|
80030c2: 69db ldr r3, [r3, #28]
|
|
80030c4: 2b00 cmp r3, #0
|
|
80030c6: f000 8242 beq.w 800354e <HAL_RCC_OscConfig+0x106a>
|
|
{
|
|
/* Check if the PLL is used as system clock or not */
|
|
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
|
80030ca: 4b1c ldr r3, [pc, #112] @ (800313c <HAL_RCC_OscConfig+0xc58>)
|
|
80030cc: 685b ldr r3, [r3, #4]
|
|
80030ce: f003 030c and.w r3, r3, #12
|
|
80030d2: 2b08 cmp r3, #8
|
|
80030d4: f000 8213 beq.w 80034fe <HAL_RCC_OscConfig+0x101a>
|
|
{
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
|
80030d8: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80030dc: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
80030e0: 681b ldr r3, [r3, #0]
|
|
80030e2: 69db ldr r3, [r3, #28]
|
|
80030e4: 2b02 cmp r3, #2
|
|
80030e6: f040 8162 bne.w 80033ae <HAL_RCC_OscConfig+0xeca>
|
|
80030ea: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80030ee: f5a3 73c0 sub.w r3, r3, #384 @ 0x180
|
|
80030f2: f04f 7280 mov.w r2, #16777216 @ 0x1000000
|
|
80030f6: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80030f8: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80030fc: f5a3 73c0 sub.w r3, r3, #384 @ 0x180
|
|
8003100: 681b ldr r3, [r3, #0]
|
|
8003102: fa93 f2a3 rbit r2, r3
|
|
8003106: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800310a: f5a3 73c2 sub.w r3, r3, #388 @ 0x184
|
|
800310e: 601a str r2, [r3, #0]
|
|
return result;
|
|
8003110: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003114: f5a3 73c2 sub.w r3, r3, #388 @ 0x184
|
|
8003118: 681b ldr r3, [r3, #0]
|
|
#if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
|
|
assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
|
|
#endif
|
|
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
800311a: fab3 f383 clz r3, r3
|
|
800311e: b2db uxtb r3, r3
|
|
8003120: f103 5384 add.w r3, r3, #276824064 @ 0x10800000
|
|
8003124: f503 1384 add.w r3, r3, #1081344 @ 0x108000
|
|
8003128: 009b lsls r3, r3, #2
|
|
800312a: 461a mov r2, r3
|
|
800312c: 2300 movs r3, #0
|
|
800312e: 6013 str r3, [r2, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8003130: f7fd fa62 bl 80005f8 <HAL_GetTick>
|
|
8003134: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till PLL is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8003138: e00c b.n 8003154 <HAL_RCC_OscConfig+0xc70>
|
|
800313a: bf00 nop
|
|
800313c: 40021000 .word 0x40021000
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
8003140: f7fd fa5a bl 80005f8 <HAL_GetTick>
|
|
8003144: 4602 mov r2, r0
|
|
8003146: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
800314a: 1ad3 subs r3, r2, r3
|
|
800314c: 2b02 cmp r3, #2
|
|
800314e: d901 bls.n 8003154 <HAL_RCC_OscConfig+0xc70>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003150: 2303 movs r3, #3
|
|
8003152: e1fd b.n 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
8003154: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003158: f5a3 73c4 sub.w r3, r3, #392 @ 0x188
|
|
800315c: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
8003160: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003162: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003166: f5a3 73c4 sub.w r3, r3, #392 @ 0x188
|
|
800316a: 681b ldr r3, [r3, #0]
|
|
800316c: fa93 f2a3 rbit r2, r3
|
|
8003170: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003174: f5a3 73c6 sub.w r3, r3, #396 @ 0x18c
|
|
8003178: 601a str r2, [r3, #0]
|
|
return result;
|
|
800317a: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800317e: f5a3 73c6 sub.w r3, r3, #396 @ 0x18c
|
|
8003182: 681b ldr r3, [r3, #0]
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8003184: fab3 f383 clz r3, r3
|
|
8003188: b2db uxtb r3, r3
|
|
800318a: 095b lsrs r3, r3, #5
|
|
800318c: b2db uxtb r3, r3
|
|
800318e: f043 0301 orr.w r3, r3, #1
|
|
8003192: b2db uxtb r3, r3
|
|
8003194: 2b01 cmp r3, #1
|
|
8003196: d102 bne.n 800319e <HAL_RCC_OscConfig+0xcba>
|
|
8003198: 4bb0 ldr r3, [pc, #704] @ (800345c <HAL_RCC_OscConfig+0xf78>)
|
|
800319a: 681b ldr r3, [r3, #0]
|
|
800319c: e027 b.n 80031ee <HAL_RCC_OscConfig+0xd0a>
|
|
800319e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80031a2: f5a3 73c8 sub.w r3, r3, #400 @ 0x190
|
|
80031a6: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
80031aa: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80031ac: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80031b0: f5a3 73c8 sub.w r3, r3, #400 @ 0x190
|
|
80031b4: 681b ldr r3, [r3, #0]
|
|
80031b6: fa93 f2a3 rbit r2, r3
|
|
80031ba: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80031be: f5a3 73ca sub.w r3, r3, #404 @ 0x194
|
|
80031c2: 601a str r2, [r3, #0]
|
|
80031c4: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80031c8: f5a3 73cc sub.w r3, r3, #408 @ 0x198
|
|
80031cc: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
80031d0: 601a str r2, [r3, #0]
|
|
80031d2: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80031d6: f5a3 73cc sub.w r3, r3, #408 @ 0x198
|
|
80031da: 681b ldr r3, [r3, #0]
|
|
80031dc: fa93 f2a3 rbit r2, r3
|
|
80031e0: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80031e4: f5a3 73ce sub.w r3, r3, #412 @ 0x19c
|
|
80031e8: 601a str r2, [r3, #0]
|
|
80031ea: 4b9c ldr r3, [pc, #624] @ (800345c <HAL_RCC_OscConfig+0xf78>)
|
|
80031ec: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80031ee: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
80031f2: f5a2 72d0 sub.w r2, r2, #416 @ 0x1a0
|
|
80031f6: f04f 7100 mov.w r1, #33554432 @ 0x2000000
|
|
80031fa: 6011 str r1, [r2, #0]
|
|
80031fc: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8003200: f5a2 72d0 sub.w r2, r2, #416 @ 0x1a0
|
|
8003204: 6812 ldr r2, [r2, #0]
|
|
8003206: fa92 f1a2 rbit r1, r2
|
|
800320a: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
800320e: f5a2 72d2 sub.w r2, r2, #420 @ 0x1a4
|
|
8003212: 6011 str r1, [r2, #0]
|
|
return result;
|
|
8003214: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8003218: f5a2 72d2 sub.w r2, r2, #420 @ 0x1a4
|
|
800321c: 6812 ldr r2, [r2, #0]
|
|
800321e: fab2 f282 clz r2, r2
|
|
8003222: b2d2 uxtb r2, r2
|
|
8003224: f042 0220 orr.w r2, r2, #32
|
|
8003228: b2d2 uxtb r2, r2
|
|
800322a: f002 021f and.w r2, r2, #31
|
|
800322e: 2101 movs r1, #1
|
|
8003230: fa01 f202 lsl.w r2, r1, r2
|
|
8003234: 4013 ands r3, r2
|
|
8003236: 2b00 cmp r3, #0
|
|
8003238: d182 bne.n 8003140 <HAL_RCC_OscConfig+0xc5c>
|
|
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
|
RCC_OscInitStruct->PLL.PREDIV,
|
|
RCC_OscInitStruct->PLL.PLLMUL);
|
|
#else
|
|
/* Configure the main PLL clock source and multiplication factor. */
|
|
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
|
800323a: 4b88 ldr r3, [pc, #544] @ (800345c <HAL_RCC_OscConfig+0xf78>)
|
|
800323c: 685b ldr r3, [r3, #4]
|
|
800323e: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
|
|
8003242: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003246: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
800324a: 681b ldr r3, [r3, #0]
|
|
800324c: 6a59 ldr r1, [r3, #36] @ 0x24
|
|
800324e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003252: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8003256: 681b ldr r3, [r3, #0]
|
|
8003258: 6a1b ldr r3, [r3, #32]
|
|
800325a: 430b orrs r3, r1
|
|
800325c: 497f ldr r1, [pc, #508] @ (800345c <HAL_RCC_OscConfig+0xf78>)
|
|
800325e: 4313 orrs r3, r2
|
|
8003260: 604b str r3, [r1, #4]
|
|
8003262: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003266: f5a3 73d4 sub.w r3, r3, #424 @ 0x1a8
|
|
800326a: f04f 7280 mov.w r2, #16777216 @ 0x1000000
|
|
800326e: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003270: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003274: f5a3 73d4 sub.w r3, r3, #424 @ 0x1a8
|
|
8003278: 681b ldr r3, [r3, #0]
|
|
800327a: fa93 f2a3 rbit r2, r3
|
|
800327e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003282: f5a3 73d6 sub.w r3, r3, #428 @ 0x1ac
|
|
8003286: 601a str r2, [r3, #0]
|
|
return result;
|
|
8003288: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800328c: f5a3 73d6 sub.w r3, r3, #428 @ 0x1ac
|
|
8003290: 681b ldr r3, [r3, #0]
|
|
RCC_OscInitStruct->PLL.PLLMUL);
|
|
#endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */
|
|
/* Enable the main PLL. */
|
|
__HAL_RCC_PLL_ENABLE();
|
|
8003292: fab3 f383 clz r3, r3
|
|
8003296: b2db uxtb r3, r3
|
|
8003298: f103 5384 add.w r3, r3, #276824064 @ 0x10800000
|
|
800329c: f503 1384 add.w r3, r3, #1081344 @ 0x108000
|
|
80032a0: 009b lsls r3, r3, #2
|
|
80032a2: 461a mov r2, r3
|
|
80032a4: 2301 movs r3, #1
|
|
80032a6: 6013 str r3, [r2, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80032a8: f7fd f9a6 bl 80005f8 <HAL_GetTick>
|
|
80032ac: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till PLL is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
80032b0: e009 b.n 80032c6 <HAL_RCC_OscConfig+0xde2>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
80032b2: f7fd f9a1 bl 80005f8 <HAL_GetTick>
|
|
80032b6: 4602 mov r2, r0
|
|
80032b8: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
80032bc: 1ad3 subs r3, r2, r3
|
|
80032be: 2b02 cmp r3, #2
|
|
80032c0: d901 bls.n 80032c6 <HAL_RCC_OscConfig+0xde2>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80032c2: 2303 movs r3, #3
|
|
80032c4: e144 b.n 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
80032c6: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80032ca: f5a3 73d8 sub.w r3, r3, #432 @ 0x1b0
|
|
80032ce: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
80032d2: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80032d4: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80032d8: f5a3 73d8 sub.w r3, r3, #432 @ 0x1b0
|
|
80032dc: 681b ldr r3, [r3, #0]
|
|
80032de: fa93 f2a3 rbit r2, r3
|
|
80032e2: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80032e6: f5a3 73da sub.w r3, r3, #436 @ 0x1b4
|
|
80032ea: 601a str r2, [r3, #0]
|
|
return result;
|
|
80032ec: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80032f0: f5a3 73da sub.w r3, r3, #436 @ 0x1b4
|
|
80032f4: 681b ldr r3, [r3, #0]
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
80032f6: fab3 f383 clz r3, r3
|
|
80032fa: b2db uxtb r3, r3
|
|
80032fc: 095b lsrs r3, r3, #5
|
|
80032fe: b2db uxtb r3, r3
|
|
8003300: f043 0301 orr.w r3, r3, #1
|
|
8003304: b2db uxtb r3, r3
|
|
8003306: 2b01 cmp r3, #1
|
|
8003308: d102 bne.n 8003310 <HAL_RCC_OscConfig+0xe2c>
|
|
800330a: 4b54 ldr r3, [pc, #336] @ (800345c <HAL_RCC_OscConfig+0xf78>)
|
|
800330c: 681b ldr r3, [r3, #0]
|
|
800330e: e027 b.n 8003360 <HAL_RCC_OscConfig+0xe7c>
|
|
8003310: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003314: f5a3 73dc sub.w r3, r3, #440 @ 0x1b8
|
|
8003318: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
800331c: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800331e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003322: f5a3 73dc sub.w r3, r3, #440 @ 0x1b8
|
|
8003326: 681b ldr r3, [r3, #0]
|
|
8003328: fa93 f2a3 rbit r2, r3
|
|
800332c: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003330: f5a3 73de sub.w r3, r3, #444 @ 0x1bc
|
|
8003334: 601a str r2, [r3, #0]
|
|
8003336: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800333a: f5a3 73e0 sub.w r3, r3, #448 @ 0x1c0
|
|
800333e: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
8003342: 601a str r2, [r3, #0]
|
|
8003344: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003348: f5a3 73e0 sub.w r3, r3, #448 @ 0x1c0
|
|
800334c: 681b ldr r3, [r3, #0]
|
|
800334e: fa93 f2a3 rbit r2, r3
|
|
8003352: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003356: f5a3 73e2 sub.w r3, r3, #452 @ 0x1c4
|
|
800335a: 601a str r2, [r3, #0]
|
|
800335c: 4b3f ldr r3, [pc, #252] @ (800345c <HAL_RCC_OscConfig+0xf78>)
|
|
800335e: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8003360: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8003364: f5a2 72e4 sub.w r2, r2, #456 @ 0x1c8
|
|
8003368: f04f 7100 mov.w r1, #33554432 @ 0x2000000
|
|
800336c: 6011 str r1, [r2, #0]
|
|
800336e: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8003372: f5a2 72e4 sub.w r2, r2, #456 @ 0x1c8
|
|
8003376: 6812 ldr r2, [r2, #0]
|
|
8003378: fa92 f1a2 rbit r1, r2
|
|
800337c: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
8003380: f5a2 72e6 sub.w r2, r2, #460 @ 0x1cc
|
|
8003384: 6011 str r1, [r2, #0]
|
|
return result;
|
|
8003386: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
800338a: f5a2 72e6 sub.w r2, r2, #460 @ 0x1cc
|
|
800338e: 6812 ldr r2, [r2, #0]
|
|
8003390: fab2 f282 clz r2, r2
|
|
8003394: b2d2 uxtb r2, r2
|
|
8003396: f042 0220 orr.w r2, r2, #32
|
|
800339a: b2d2 uxtb r2, r2
|
|
800339c: f002 021f and.w r2, r2, #31
|
|
80033a0: 2101 movs r1, #1
|
|
80033a2: fa01 f202 lsl.w r2, r1, r2
|
|
80033a6: 4013 ands r3, r2
|
|
80033a8: 2b00 cmp r3, #0
|
|
80033aa: d082 beq.n 80032b2 <HAL_RCC_OscConfig+0xdce>
|
|
80033ac: e0cf b.n 800354e <HAL_RCC_OscConfig+0x106a>
|
|
80033ae: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80033b2: f5a3 73e8 sub.w r3, r3, #464 @ 0x1d0
|
|
80033b6: f04f 7280 mov.w r2, #16777216 @ 0x1000000
|
|
80033ba: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80033bc: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80033c0: f5a3 73e8 sub.w r3, r3, #464 @ 0x1d0
|
|
80033c4: 681b ldr r3, [r3, #0]
|
|
80033c6: fa93 f2a3 rbit r2, r3
|
|
80033ca: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80033ce: f5a3 73ea sub.w r3, r3, #468 @ 0x1d4
|
|
80033d2: 601a str r2, [r3, #0]
|
|
return result;
|
|
80033d4: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80033d8: f5a3 73ea sub.w r3, r3, #468 @ 0x1d4
|
|
80033dc: 681b ldr r3, [r3, #0]
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
80033de: fab3 f383 clz r3, r3
|
|
80033e2: b2db uxtb r3, r3
|
|
80033e4: f103 5384 add.w r3, r3, #276824064 @ 0x10800000
|
|
80033e8: f503 1384 add.w r3, r3, #1081344 @ 0x108000
|
|
80033ec: 009b lsls r3, r3, #2
|
|
80033ee: 461a mov r2, r3
|
|
80033f0: 2300 movs r3, #0
|
|
80033f2: 6013 str r3, [r2, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80033f4: f7fd f900 bl 80005f8 <HAL_GetTick>
|
|
80033f8: f8c7 01f8 str.w r0, [r7, #504] @ 0x1f8
|
|
|
|
/* Wait till PLL is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
80033fc: e009 b.n 8003412 <HAL_RCC_OscConfig+0xf2e>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
80033fe: f7fd f8fb bl 80005f8 <HAL_GetTick>
|
|
8003402: 4602 mov r2, r0
|
|
8003404: f8d7 31f8 ldr.w r3, [r7, #504] @ 0x1f8
|
|
8003408: 1ad3 subs r3, r2, r3
|
|
800340a: 2b02 cmp r3, #2
|
|
800340c: d901 bls.n 8003412 <HAL_RCC_OscConfig+0xf2e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800340e: 2303 movs r3, #3
|
|
8003410: e09e b.n 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
8003412: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003416: f5a3 73ec sub.w r3, r3, #472 @ 0x1d8
|
|
800341a: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
800341e: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003420: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003424: f5a3 73ec sub.w r3, r3, #472 @ 0x1d8
|
|
8003428: 681b ldr r3, [r3, #0]
|
|
800342a: fa93 f2a3 rbit r2, r3
|
|
800342e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003432: f5a3 73ee sub.w r3, r3, #476 @ 0x1dc
|
|
8003436: 601a str r2, [r3, #0]
|
|
return result;
|
|
8003438: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800343c: f5a3 73ee sub.w r3, r3, #476 @ 0x1dc
|
|
8003440: 681b ldr r3, [r3, #0]
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8003442: fab3 f383 clz r3, r3
|
|
8003446: b2db uxtb r3, r3
|
|
8003448: 095b lsrs r3, r3, #5
|
|
800344a: b2db uxtb r3, r3
|
|
800344c: f043 0301 orr.w r3, r3, #1
|
|
8003450: b2db uxtb r3, r3
|
|
8003452: 2b01 cmp r3, #1
|
|
8003454: d104 bne.n 8003460 <HAL_RCC_OscConfig+0xf7c>
|
|
8003456: 4b01 ldr r3, [pc, #4] @ (800345c <HAL_RCC_OscConfig+0xf78>)
|
|
8003458: 681b ldr r3, [r3, #0]
|
|
800345a: e029 b.n 80034b0 <HAL_RCC_OscConfig+0xfcc>
|
|
800345c: 40021000 .word 0x40021000
|
|
8003460: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003464: f5a3 73f0 sub.w r3, r3, #480 @ 0x1e0
|
|
8003468: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
800346c: 601a str r2, [r3, #0]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800346e: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003472: f5a3 73f0 sub.w r3, r3, #480 @ 0x1e0
|
|
8003476: 681b ldr r3, [r3, #0]
|
|
8003478: fa93 f2a3 rbit r2, r3
|
|
800347c: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003480: f5a3 73f2 sub.w r3, r3, #484 @ 0x1e4
|
|
8003484: 601a str r2, [r3, #0]
|
|
8003486: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800348a: f5a3 73f4 sub.w r3, r3, #488 @ 0x1e8
|
|
800348e: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
8003492: 601a str r2, [r3, #0]
|
|
8003494: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003498: f5a3 73f4 sub.w r3, r3, #488 @ 0x1e8
|
|
800349c: 681b ldr r3, [r3, #0]
|
|
800349e: fa93 f2a3 rbit r2, r3
|
|
80034a2: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
80034a6: f5a3 73f6 sub.w r3, r3, #492 @ 0x1ec
|
|
80034aa: 601a str r2, [r3, #0]
|
|
80034ac: 4b2b ldr r3, [pc, #172] @ (800355c <HAL_RCC_OscConfig+0x1078>)
|
|
80034ae: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80034b0: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
80034b4: f5a2 72f8 sub.w r2, r2, #496 @ 0x1f0
|
|
80034b8: f04f 7100 mov.w r1, #33554432 @ 0x2000000
|
|
80034bc: 6011 str r1, [r2, #0]
|
|
80034be: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
80034c2: f5a2 72f8 sub.w r2, r2, #496 @ 0x1f0
|
|
80034c6: 6812 ldr r2, [r2, #0]
|
|
80034c8: fa92 f1a2 rbit r1, r2
|
|
80034cc: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
80034d0: f5a2 72fa sub.w r2, r2, #500 @ 0x1f4
|
|
80034d4: 6011 str r1, [r2, #0]
|
|
return result;
|
|
80034d6: f507 7200 add.w r2, r7, #512 @ 0x200
|
|
80034da: f5a2 72fa sub.w r2, r2, #500 @ 0x1f4
|
|
80034de: 6812 ldr r2, [r2, #0]
|
|
80034e0: fab2 f282 clz r2, r2
|
|
80034e4: b2d2 uxtb r2, r2
|
|
80034e6: f042 0220 orr.w r2, r2, #32
|
|
80034ea: b2d2 uxtb r2, r2
|
|
80034ec: f002 021f and.w r2, r2, #31
|
|
80034f0: 2101 movs r1, #1
|
|
80034f2: fa01 f202 lsl.w r2, r1, r2
|
|
80034f6: 4013 ands r3, r2
|
|
80034f8: 2b00 cmp r3, #0
|
|
80034fa: d180 bne.n 80033fe <HAL_RCC_OscConfig+0xf1a>
|
|
80034fc: e027 b.n 800354e <HAL_RCC_OscConfig+0x106a>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check if there is a request to disable the PLL used as System clock source */
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
|
80034fe: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003502: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8003506: 681b ldr r3, [r3, #0]
|
|
8003508: 69db ldr r3, [r3, #28]
|
|
800350a: 2b01 cmp r3, #1
|
|
800350c: d101 bne.n 8003512 <HAL_RCC_OscConfig+0x102e>
|
|
{
|
|
return HAL_ERROR;
|
|
800350e: 2301 movs r3, #1
|
|
8003510: e01e b.n 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
}
|
|
else
|
|
{
|
|
/* Do not return HAL_ERROR if request repeats the current configuration */
|
|
pll_config = RCC->CFGR;
|
|
8003512: 4b12 ldr r3, [pc, #72] @ (800355c <HAL_RCC_OscConfig+0x1078>)
|
|
8003514: 685b ldr r3, [r3, #4]
|
|
8003516: f8c7 31f4 str.w r3, [r7, #500] @ 0x1f4
|
|
pll_config2 = RCC->CFGR2;
|
|
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
(READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
|
|
(READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV))
|
|
#else
|
|
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
800351a: f8d7 31f4 ldr.w r3, [r7, #500] @ 0x1f4
|
|
800351e: f403 3280 and.w r2, r3, #65536 @ 0x10000
|
|
8003522: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
8003526: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
800352a: 681b ldr r3, [r3, #0]
|
|
800352c: 6a1b ldr r3, [r3, #32]
|
|
800352e: 429a cmp r2, r3
|
|
8003530: d10b bne.n 800354a <HAL_RCC_OscConfig+0x1066>
|
|
(READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
|
|
8003532: f8d7 31f4 ldr.w r3, [r7, #500] @ 0x1f4
|
|
8003536: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
|
|
800353a: f507 7300 add.w r3, r7, #512 @ 0x200
|
|
800353e: f5a3 73fe sub.w r3, r3, #508 @ 0x1fc
|
|
8003542: 681b ldr r3, [r3, #0]
|
|
8003544: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8003546: 429a cmp r2, r3
|
|
8003548: d001 beq.n 800354e <HAL_RCC_OscConfig+0x106a>
|
|
#endif
|
|
{
|
|
return HAL_ERROR;
|
|
800354a: 2301 movs r3, #1
|
|
800354c: e000 b.n 8003550 <HAL_RCC_OscConfig+0x106c>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
800354e: 2300 movs r3, #0
|
|
}
|
|
8003550: 4618 mov r0, r3
|
|
8003552: f507 7700 add.w r7, r7, #512 @ 0x200
|
|
8003556: 46bd mov sp, r7
|
|
8003558: bd80 pop {r7, pc}
|
|
800355a: bf00 nop
|
|
800355c: 40021000 .word 0x40021000
|
|
|
|
08003560 <HAL_RCC_ClockConfig>:
|
|
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
|
* currently used as system clock source.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
|
{
|
|
8003560: b580 push {r7, lr}
|
|
8003562: b09e sub sp, #120 @ 0x78
|
|
8003564: af00 add r7, sp, #0
|
|
8003566: 6078 str r0, [r7, #4]
|
|
8003568: 6039 str r1, [r7, #0]
|
|
uint32_t tickstart = 0U;
|
|
800356a: 2300 movs r3, #0
|
|
800356c: 677b str r3, [r7, #116] @ 0x74
|
|
|
|
/* Check Null pointer */
|
|
if(RCC_ClkInitStruct == NULL)
|
|
800356e: 687b ldr r3, [r7, #4]
|
|
8003570: 2b00 cmp r3, #0
|
|
8003572: d101 bne.n 8003578 <HAL_RCC_ClockConfig+0x18>
|
|
{
|
|
return HAL_ERROR;
|
|
8003574: 2301 movs r3, #1
|
|
8003576: e162 b.n 800383e <HAL_RCC_ClockConfig+0x2de>
|
|
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
|
|
must be correctly programmed according to the frequency of the CPU clock
|
|
(HCLK) of the device. */
|
|
|
|
/* Increasing the number of wait states because of higher CPU frequency */
|
|
if(FLatency > __HAL_FLASH_GET_LATENCY())
|
|
8003578: 4b90 ldr r3, [pc, #576] @ (80037bc <HAL_RCC_ClockConfig+0x25c>)
|
|
800357a: 681b ldr r3, [r3, #0]
|
|
800357c: f003 0307 and.w r3, r3, #7
|
|
8003580: 683a ldr r2, [r7, #0]
|
|
8003582: 429a cmp r2, r3
|
|
8003584: d910 bls.n 80035a8 <HAL_RCC_ClockConfig+0x48>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8003586: 4b8d ldr r3, [pc, #564] @ (80037bc <HAL_RCC_ClockConfig+0x25c>)
|
|
8003588: 681b ldr r3, [r3, #0]
|
|
800358a: f023 0207 bic.w r2, r3, #7
|
|
800358e: 498b ldr r1, [pc, #556] @ (80037bc <HAL_RCC_ClockConfig+0x25c>)
|
|
8003590: 683b ldr r3, [r7, #0]
|
|
8003592: 4313 orrs r3, r2
|
|
8003594: 600b str r3, [r1, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
8003596: 4b89 ldr r3, [pc, #548] @ (80037bc <HAL_RCC_ClockConfig+0x25c>)
|
|
8003598: 681b ldr r3, [r3, #0]
|
|
800359a: f003 0307 and.w r3, r3, #7
|
|
800359e: 683a ldr r2, [r7, #0]
|
|
80035a0: 429a cmp r2, r3
|
|
80035a2: d001 beq.n 80035a8 <HAL_RCC_ClockConfig+0x48>
|
|
{
|
|
return HAL_ERROR;
|
|
80035a4: 2301 movs r3, #1
|
|
80035a6: e14a b.n 800383e <HAL_RCC_ClockConfig+0x2de>
|
|
}
|
|
}
|
|
|
|
/*-------------------------- HCLK Configuration --------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
|
80035a8: 687b ldr r3, [r7, #4]
|
|
80035aa: 681b ldr r3, [r3, #0]
|
|
80035ac: f003 0302 and.w r3, r3, #2
|
|
80035b0: 2b00 cmp r3, #0
|
|
80035b2: d008 beq.n 80035c6 <HAL_RCC_ClockConfig+0x66>
|
|
{
|
|
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
|
80035b4: 4b82 ldr r3, [pc, #520] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
80035b6: 685b ldr r3, [r3, #4]
|
|
80035b8: f023 02f0 bic.w r2, r3, #240 @ 0xf0
|
|
80035bc: 687b ldr r3, [r7, #4]
|
|
80035be: 689b ldr r3, [r3, #8]
|
|
80035c0: 497f ldr r1, [pc, #508] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
80035c2: 4313 orrs r3, r2
|
|
80035c4: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/*------------------------- SYSCLK Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
|
80035c6: 687b ldr r3, [r7, #4]
|
|
80035c8: 681b ldr r3, [r3, #0]
|
|
80035ca: f003 0301 and.w r3, r3, #1
|
|
80035ce: 2b00 cmp r3, #0
|
|
80035d0: f000 80dc beq.w 800378c <HAL_RCC_ClockConfig+0x22c>
|
|
{
|
|
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
|
|
|
/* HSE is selected as System Clock Source */
|
|
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
|
80035d4: 687b ldr r3, [r7, #4]
|
|
80035d6: 685b ldr r3, [r3, #4]
|
|
80035d8: 2b01 cmp r3, #1
|
|
80035da: d13c bne.n 8003656 <HAL_RCC_ClockConfig+0xf6>
|
|
80035dc: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
80035e0: 673b str r3, [r7, #112] @ 0x70
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80035e2: 6f3b ldr r3, [r7, #112] @ 0x70
|
|
80035e4: fa93 f3a3 rbit r3, r3
|
|
80035e8: 66fb str r3, [r7, #108] @ 0x6c
|
|
return result;
|
|
80035ea: 6efb ldr r3, [r7, #108] @ 0x6c
|
|
{
|
|
/* Check the HSE ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
80035ec: fab3 f383 clz r3, r3
|
|
80035f0: b2db uxtb r3, r3
|
|
80035f2: 095b lsrs r3, r3, #5
|
|
80035f4: b2db uxtb r3, r3
|
|
80035f6: f043 0301 orr.w r3, r3, #1
|
|
80035fa: b2db uxtb r3, r3
|
|
80035fc: 2b01 cmp r3, #1
|
|
80035fe: d102 bne.n 8003606 <HAL_RCC_ClockConfig+0xa6>
|
|
8003600: 4b6f ldr r3, [pc, #444] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
8003602: 681b ldr r3, [r3, #0]
|
|
8003604: e00f b.n 8003626 <HAL_RCC_ClockConfig+0xc6>
|
|
8003606: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
800360a: 66bb str r3, [r7, #104] @ 0x68
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800360c: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
800360e: fa93 f3a3 rbit r3, r3
|
|
8003612: 667b str r3, [r7, #100] @ 0x64
|
|
8003614: f44f 3300 mov.w r3, #131072 @ 0x20000
|
|
8003618: 663b str r3, [r7, #96] @ 0x60
|
|
800361a: 6e3b ldr r3, [r7, #96] @ 0x60
|
|
800361c: fa93 f3a3 rbit r3, r3
|
|
8003620: 65fb str r3, [r7, #92] @ 0x5c
|
|
8003622: 4b67 ldr r3, [pc, #412] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
8003624: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8003626: f44f 3200 mov.w r2, #131072 @ 0x20000
|
|
800362a: 65ba str r2, [r7, #88] @ 0x58
|
|
800362c: 6dba ldr r2, [r7, #88] @ 0x58
|
|
800362e: fa92 f2a2 rbit r2, r2
|
|
8003632: 657a str r2, [r7, #84] @ 0x54
|
|
return result;
|
|
8003634: 6d7a ldr r2, [r7, #84] @ 0x54
|
|
8003636: fab2 f282 clz r2, r2
|
|
800363a: b2d2 uxtb r2, r2
|
|
800363c: f042 0220 orr.w r2, r2, #32
|
|
8003640: b2d2 uxtb r2, r2
|
|
8003642: f002 021f and.w r2, r2, #31
|
|
8003646: 2101 movs r1, #1
|
|
8003648: fa01 f202 lsl.w r2, r1, r2
|
|
800364c: 4013 ands r3, r2
|
|
800364e: 2b00 cmp r3, #0
|
|
8003650: d17b bne.n 800374a <HAL_RCC_ClockConfig+0x1ea>
|
|
{
|
|
return HAL_ERROR;
|
|
8003652: 2301 movs r3, #1
|
|
8003654: e0f3 b.n 800383e <HAL_RCC_ClockConfig+0x2de>
|
|
}
|
|
}
|
|
/* PLL is selected as System Clock Source */
|
|
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
|
8003656: 687b ldr r3, [r7, #4]
|
|
8003658: 685b ldr r3, [r3, #4]
|
|
800365a: 2b02 cmp r3, #2
|
|
800365c: d13c bne.n 80036d8 <HAL_RCC_ClockConfig+0x178>
|
|
800365e: f04f 7300 mov.w r3, #33554432 @ 0x2000000
|
|
8003662: 653b str r3, [r7, #80] @ 0x50
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003664: 6d3b ldr r3, [r7, #80] @ 0x50
|
|
8003666: fa93 f3a3 rbit r3, r3
|
|
800366a: 64fb str r3, [r7, #76] @ 0x4c
|
|
return result;
|
|
800366c: 6cfb ldr r3, [r7, #76] @ 0x4c
|
|
{
|
|
/* Check the PLL ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
800366e: fab3 f383 clz r3, r3
|
|
8003672: b2db uxtb r3, r3
|
|
8003674: 095b lsrs r3, r3, #5
|
|
8003676: b2db uxtb r3, r3
|
|
8003678: f043 0301 orr.w r3, r3, #1
|
|
800367c: b2db uxtb r3, r3
|
|
800367e: 2b01 cmp r3, #1
|
|
8003680: d102 bne.n 8003688 <HAL_RCC_ClockConfig+0x128>
|
|
8003682: 4b4f ldr r3, [pc, #316] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
8003684: 681b ldr r3, [r3, #0]
|
|
8003686: e00f b.n 80036a8 <HAL_RCC_ClockConfig+0x148>
|
|
8003688: f04f 7300 mov.w r3, #33554432 @ 0x2000000
|
|
800368c: 64bb str r3, [r7, #72] @ 0x48
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800368e: 6cbb ldr r3, [r7, #72] @ 0x48
|
|
8003690: fa93 f3a3 rbit r3, r3
|
|
8003694: 647b str r3, [r7, #68] @ 0x44
|
|
8003696: f04f 7300 mov.w r3, #33554432 @ 0x2000000
|
|
800369a: 643b str r3, [r7, #64] @ 0x40
|
|
800369c: 6c3b ldr r3, [r7, #64] @ 0x40
|
|
800369e: fa93 f3a3 rbit r3, r3
|
|
80036a2: 63fb str r3, [r7, #60] @ 0x3c
|
|
80036a4: 4b46 ldr r3, [pc, #280] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
80036a6: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80036a8: f04f 7200 mov.w r2, #33554432 @ 0x2000000
|
|
80036ac: 63ba str r2, [r7, #56] @ 0x38
|
|
80036ae: 6bba ldr r2, [r7, #56] @ 0x38
|
|
80036b0: fa92 f2a2 rbit r2, r2
|
|
80036b4: 637a str r2, [r7, #52] @ 0x34
|
|
return result;
|
|
80036b6: 6b7a ldr r2, [r7, #52] @ 0x34
|
|
80036b8: fab2 f282 clz r2, r2
|
|
80036bc: b2d2 uxtb r2, r2
|
|
80036be: f042 0220 orr.w r2, r2, #32
|
|
80036c2: b2d2 uxtb r2, r2
|
|
80036c4: f002 021f and.w r2, r2, #31
|
|
80036c8: 2101 movs r1, #1
|
|
80036ca: fa01 f202 lsl.w r2, r1, r2
|
|
80036ce: 4013 ands r3, r2
|
|
80036d0: 2b00 cmp r3, #0
|
|
80036d2: d13a bne.n 800374a <HAL_RCC_ClockConfig+0x1ea>
|
|
{
|
|
return HAL_ERROR;
|
|
80036d4: 2301 movs r3, #1
|
|
80036d6: e0b2 b.n 800383e <HAL_RCC_ClockConfig+0x2de>
|
|
80036d8: 2302 movs r3, #2
|
|
80036da: 633b str r3, [r7, #48] @ 0x30
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80036dc: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
80036de: fa93 f3a3 rbit r3, r3
|
|
80036e2: 62fb str r3, [r7, #44] @ 0x2c
|
|
return result;
|
|
80036e4: 6afb ldr r3, [r7, #44] @ 0x2c
|
|
}
|
|
/* HSI is selected as System Clock Source */
|
|
else
|
|
{
|
|
/* Check the HSI ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
80036e6: fab3 f383 clz r3, r3
|
|
80036ea: b2db uxtb r3, r3
|
|
80036ec: 095b lsrs r3, r3, #5
|
|
80036ee: b2db uxtb r3, r3
|
|
80036f0: f043 0301 orr.w r3, r3, #1
|
|
80036f4: b2db uxtb r3, r3
|
|
80036f6: 2b01 cmp r3, #1
|
|
80036f8: d102 bne.n 8003700 <HAL_RCC_ClockConfig+0x1a0>
|
|
80036fa: 4b31 ldr r3, [pc, #196] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
80036fc: 681b ldr r3, [r3, #0]
|
|
80036fe: e00d b.n 800371c <HAL_RCC_ClockConfig+0x1bc>
|
|
8003700: 2302 movs r3, #2
|
|
8003702: 62bb str r3, [r7, #40] @ 0x28
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003704: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8003706: fa93 f3a3 rbit r3, r3
|
|
800370a: 627b str r3, [r7, #36] @ 0x24
|
|
800370c: 2302 movs r3, #2
|
|
800370e: 623b str r3, [r7, #32]
|
|
8003710: 6a3b ldr r3, [r7, #32]
|
|
8003712: fa93 f3a3 rbit r3, r3
|
|
8003716: 61fb str r3, [r7, #28]
|
|
8003718: 4b29 ldr r3, [pc, #164] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
800371a: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
800371c: 2202 movs r2, #2
|
|
800371e: 61ba str r2, [r7, #24]
|
|
8003720: 69ba ldr r2, [r7, #24]
|
|
8003722: fa92 f2a2 rbit r2, r2
|
|
8003726: 617a str r2, [r7, #20]
|
|
return result;
|
|
8003728: 697a ldr r2, [r7, #20]
|
|
800372a: fab2 f282 clz r2, r2
|
|
800372e: b2d2 uxtb r2, r2
|
|
8003730: f042 0220 orr.w r2, r2, #32
|
|
8003734: b2d2 uxtb r2, r2
|
|
8003736: f002 021f and.w r2, r2, #31
|
|
800373a: 2101 movs r1, #1
|
|
800373c: fa01 f202 lsl.w r2, r1, r2
|
|
8003740: 4013 ands r3, r2
|
|
8003742: 2b00 cmp r3, #0
|
|
8003744: d101 bne.n 800374a <HAL_RCC_ClockConfig+0x1ea>
|
|
{
|
|
return HAL_ERROR;
|
|
8003746: 2301 movs r3, #1
|
|
8003748: e079 b.n 800383e <HAL_RCC_ClockConfig+0x2de>
|
|
}
|
|
}
|
|
|
|
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
|
800374a: 4b1d ldr r3, [pc, #116] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
800374c: 685b ldr r3, [r3, #4]
|
|
800374e: f023 0203 bic.w r2, r3, #3
|
|
8003752: 687b ldr r3, [r7, #4]
|
|
8003754: 685b ldr r3, [r3, #4]
|
|
8003756: 491a ldr r1, [pc, #104] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
8003758: 4313 orrs r3, r2
|
|
800375a: 604b str r3, [r1, #4]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800375c: f7fc ff4c bl 80005f8 <HAL_GetTick>
|
|
8003760: 6778 str r0, [r7, #116] @ 0x74
|
|
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
8003762: e00a b.n 800377a <HAL_RCC_ClockConfig+0x21a>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
|
8003764: f7fc ff48 bl 80005f8 <HAL_GetTick>
|
|
8003768: 4602 mov r2, r0
|
|
800376a: 6f7b ldr r3, [r7, #116] @ 0x74
|
|
800376c: 1ad3 subs r3, r2, r3
|
|
800376e: f241 3288 movw r2, #5000 @ 0x1388
|
|
8003772: 4293 cmp r3, r2
|
|
8003774: d901 bls.n 800377a <HAL_RCC_ClockConfig+0x21a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003776: 2303 movs r3, #3
|
|
8003778: e061 b.n 800383e <HAL_RCC_ClockConfig+0x2de>
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
800377a: 4b11 ldr r3, [pc, #68] @ (80037c0 <HAL_RCC_ClockConfig+0x260>)
|
|
800377c: 685b ldr r3, [r3, #4]
|
|
800377e: f003 020c and.w r2, r3, #12
|
|
8003782: 687b ldr r3, [r7, #4]
|
|
8003784: 685b ldr r3, [r3, #4]
|
|
8003786: 009b lsls r3, r3, #2
|
|
8003788: 429a cmp r2, r3
|
|
800378a: d1eb bne.n 8003764 <HAL_RCC_ClockConfig+0x204>
|
|
}
|
|
}
|
|
}
|
|
/* Decreasing the number of wait states because of lower CPU frequency */
|
|
if(FLatency < __HAL_FLASH_GET_LATENCY())
|
|
800378c: 4b0b ldr r3, [pc, #44] @ (80037bc <HAL_RCC_ClockConfig+0x25c>)
|
|
800378e: 681b ldr r3, [r3, #0]
|
|
8003790: f003 0307 and.w r3, r3, #7
|
|
8003794: 683a ldr r2, [r7, #0]
|
|
8003796: 429a cmp r2, r3
|
|
8003798: d214 bcs.n 80037c4 <HAL_RCC_ClockConfig+0x264>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
800379a: 4b08 ldr r3, [pc, #32] @ (80037bc <HAL_RCC_ClockConfig+0x25c>)
|
|
800379c: 681b ldr r3, [r3, #0]
|
|
800379e: f023 0207 bic.w r2, r3, #7
|
|
80037a2: 4906 ldr r1, [pc, #24] @ (80037bc <HAL_RCC_ClockConfig+0x25c>)
|
|
80037a4: 683b ldr r3, [r7, #0]
|
|
80037a6: 4313 orrs r3, r2
|
|
80037a8: 600b str r3, [r1, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
80037aa: 4b04 ldr r3, [pc, #16] @ (80037bc <HAL_RCC_ClockConfig+0x25c>)
|
|
80037ac: 681b ldr r3, [r3, #0]
|
|
80037ae: f003 0307 and.w r3, r3, #7
|
|
80037b2: 683a ldr r2, [r7, #0]
|
|
80037b4: 429a cmp r2, r3
|
|
80037b6: d005 beq.n 80037c4 <HAL_RCC_ClockConfig+0x264>
|
|
{
|
|
return HAL_ERROR;
|
|
80037b8: 2301 movs r3, #1
|
|
80037ba: e040 b.n 800383e <HAL_RCC_ClockConfig+0x2de>
|
|
80037bc: 40022000 .word 0x40022000
|
|
80037c0: 40021000 .word 0x40021000
|
|
}
|
|
}
|
|
|
|
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
80037c4: 687b ldr r3, [r7, #4]
|
|
80037c6: 681b ldr r3, [r3, #0]
|
|
80037c8: f003 0304 and.w r3, r3, #4
|
|
80037cc: 2b00 cmp r3, #0
|
|
80037ce: d008 beq.n 80037e2 <HAL_RCC_ClockConfig+0x282>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
|
80037d0: 4b1d ldr r3, [pc, #116] @ (8003848 <HAL_RCC_ClockConfig+0x2e8>)
|
|
80037d2: 685b ldr r3, [r3, #4]
|
|
80037d4: f423 62e0 bic.w r2, r3, #1792 @ 0x700
|
|
80037d8: 687b ldr r3, [r7, #4]
|
|
80037da: 68db ldr r3, [r3, #12]
|
|
80037dc: 491a ldr r1, [pc, #104] @ (8003848 <HAL_RCC_ClockConfig+0x2e8>)
|
|
80037de: 4313 orrs r3, r2
|
|
80037e0: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
80037e2: 687b ldr r3, [r7, #4]
|
|
80037e4: 681b ldr r3, [r3, #0]
|
|
80037e6: f003 0308 and.w r3, r3, #8
|
|
80037ea: 2b00 cmp r3, #0
|
|
80037ec: d009 beq.n 8003802 <HAL_RCC_ClockConfig+0x2a2>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
|
|
80037ee: 4b16 ldr r3, [pc, #88] @ (8003848 <HAL_RCC_ClockConfig+0x2e8>)
|
|
80037f0: 685b ldr r3, [r3, #4]
|
|
80037f2: f423 5260 bic.w r2, r3, #14336 @ 0x3800
|
|
80037f6: 687b ldr r3, [r7, #4]
|
|
80037f8: 691b ldr r3, [r3, #16]
|
|
80037fa: 00db lsls r3, r3, #3
|
|
80037fc: 4912 ldr r1, [pc, #72] @ (8003848 <HAL_RCC_ClockConfig+0x2e8>)
|
|
80037fe: 4313 orrs r3, r2
|
|
8003800: 604b str r3, [r1, #4]
|
|
}
|
|
|
|
/* Update the SystemCoreClock global variable */
|
|
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
|
|
8003802: f000 f829 bl 8003858 <HAL_RCC_GetSysClockFreq>
|
|
8003806: 4601 mov r1, r0
|
|
8003808: 4b0f ldr r3, [pc, #60] @ (8003848 <HAL_RCC_ClockConfig+0x2e8>)
|
|
800380a: 685b ldr r3, [r3, #4]
|
|
800380c: f003 03f0 and.w r3, r3, #240 @ 0xf0
|
|
8003810: 22f0 movs r2, #240 @ 0xf0
|
|
8003812: 613a str r2, [r7, #16]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003814: 693a ldr r2, [r7, #16]
|
|
8003816: fa92 f2a2 rbit r2, r2
|
|
800381a: 60fa str r2, [r7, #12]
|
|
return result;
|
|
800381c: 68fa ldr r2, [r7, #12]
|
|
800381e: fab2 f282 clz r2, r2
|
|
8003822: b2d2 uxtb r2, r2
|
|
8003824: 40d3 lsrs r3, r2
|
|
8003826: 4a09 ldr r2, [pc, #36] @ (800384c <HAL_RCC_ClockConfig+0x2ec>)
|
|
8003828: 5cd3 ldrb r3, [r2, r3]
|
|
800382a: fa21 f303 lsr.w r3, r1, r3
|
|
800382e: 4a08 ldr r2, [pc, #32] @ (8003850 <HAL_RCC_ClockConfig+0x2f0>)
|
|
8003830: 6013 str r3, [r2, #0]
|
|
|
|
/* Configure the source of time base considering new system clocks settings*/
|
|
HAL_InitTick (uwTickPrio);
|
|
8003832: 4b08 ldr r3, [pc, #32] @ (8003854 <HAL_RCC_ClockConfig+0x2f4>)
|
|
8003834: 681b ldr r3, [r3, #0]
|
|
8003836: 4618 mov r0, r3
|
|
8003838: f7fc fe9a bl 8000570 <HAL_InitTick>
|
|
|
|
return HAL_OK;
|
|
800383c: 2300 movs r3, #0
|
|
}
|
|
800383e: 4618 mov r0, r3
|
|
8003840: 3778 adds r7, #120 @ 0x78
|
|
8003842: 46bd mov sp, r7
|
|
8003844: bd80 pop {r7, pc}
|
|
8003846: bf00 nop
|
|
8003848: 40021000 .word 0x40021000
|
|
800384c: 08008c00 .word 0x08008c00
|
|
8003850: 20000000 .word 0x20000000
|
|
8003854: 20000004 .word 0x20000004
|
|
|
|
08003858 <HAL_RCC_GetSysClockFreq>:
|
|
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
|
*
|
|
* @retval SYSCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetSysClockFreq(void)
|
|
{
|
|
8003858: b480 push {r7}
|
|
800385a: b08b sub sp, #44 @ 0x2c
|
|
800385c: af00 add r7, sp, #0
|
|
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
|
800385e: 2300 movs r3, #0
|
|
8003860: 61fb str r3, [r7, #28]
|
|
8003862: 2300 movs r3, #0
|
|
8003864: 61bb str r3, [r7, #24]
|
|
8003866: 2300 movs r3, #0
|
|
8003868: 627b str r3, [r7, #36] @ 0x24
|
|
800386a: 2300 movs r3, #0
|
|
800386c: 617b str r3, [r7, #20]
|
|
uint32_t sysclockfreq = 0U;
|
|
800386e: 2300 movs r3, #0
|
|
8003870: 623b str r3, [r7, #32]
|
|
|
|
tmpreg = RCC->CFGR;
|
|
8003872: 4b29 ldr r3, [pc, #164] @ (8003918 <HAL_RCC_GetSysClockFreq+0xc0>)
|
|
8003874: 685b ldr r3, [r3, #4]
|
|
8003876: 61fb str r3, [r7, #28]
|
|
|
|
/* Get SYSCLK source -------------------------------------------------------*/
|
|
switch (tmpreg & RCC_CFGR_SWS)
|
|
8003878: 69fb ldr r3, [r7, #28]
|
|
800387a: f003 030c and.w r3, r3, #12
|
|
800387e: 2b04 cmp r3, #4
|
|
8003880: d002 beq.n 8003888 <HAL_RCC_GetSysClockFreq+0x30>
|
|
8003882: 2b08 cmp r3, #8
|
|
8003884: d003 beq.n 800388e <HAL_RCC_GetSysClockFreq+0x36>
|
|
8003886: e03c b.n 8003902 <HAL_RCC_GetSysClockFreq+0xaa>
|
|
{
|
|
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
|
{
|
|
sysclockfreq = HSE_VALUE;
|
|
8003888: 4b24 ldr r3, [pc, #144] @ (800391c <HAL_RCC_GetSysClockFreq+0xc4>)
|
|
800388a: 623b str r3, [r7, #32]
|
|
break;
|
|
800388c: e03c b.n 8003908 <HAL_RCC_GetSysClockFreq+0xb0>
|
|
}
|
|
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
|
{
|
|
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> POSITION_VAL(RCC_CFGR_PLLMUL)];
|
|
800388e: 69fb ldr r3, [r7, #28]
|
|
8003890: f403 1370 and.w r3, r3, #3932160 @ 0x3c0000
|
|
8003894: f44f 1270 mov.w r2, #3932160 @ 0x3c0000
|
|
8003898: 60ba str r2, [r7, #8]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
800389a: 68ba ldr r2, [r7, #8]
|
|
800389c: fa92 f2a2 rbit r2, r2
|
|
80038a0: 607a str r2, [r7, #4]
|
|
return result;
|
|
80038a2: 687a ldr r2, [r7, #4]
|
|
80038a4: fab2 f282 clz r2, r2
|
|
80038a8: b2d2 uxtb r2, r2
|
|
80038aa: 40d3 lsrs r3, r2
|
|
80038ac: 4a1c ldr r2, [pc, #112] @ (8003920 <HAL_RCC_GetSysClockFreq+0xc8>)
|
|
80038ae: 5cd3 ldrb r3, [r2, r3]
|
|
80038b0: 617b str r3, [r7, #20]
|
|
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFGR2_PREDIV)];
|
|
80038b2: 4b19 ldr r3, [pc, #100] @ (8003918 <HAL_RCC_GetSysClockFreq+0xc0>)
|
|
80038b4: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
80038b6: f003 030f and.w r3, r3, #15
|
|
80038ba: 220f movs r2, #15
|
|
80038bc: 613a str r2, [r7, #16]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80038be: 693a ldr r2, [r7, #16]
|
|
80038c0: fa92 f2a2 rbit r2, r2
|
|
80038c4: 60fa str r2, [r7, #12]
|
|
return result;
|
|
80038c6: 68fa ldr r2, [r7, #12]
|
|
80038c8: fab2 f282 clz r2, r2
|
|
80038cc: b2d2 uxtb r2, r2
|
|
80038ce: 40d3 lsrs r3, r2
|
|
80038d0: 4a14 ldr r2, [pc, #80] @ (8003924 <HAL_RCC_GetSysClockFreq+0xcc>)
|
|
80038d2: 5cd3 ldrb r3, [r2, r3]
|
|
80038d4: 61bb str r3, [r7, #24]
|
|
#if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
|
|
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI)
|
|
80038d6: 69fb ldr r3, [r7, #28]
|
|
80038d8: f403 3380 and.w r3, r3, #65536 @ 0x10000
|
|
80038dc: 2b00 cmp r3, #0
|
|
80038de: d008 beq.n 80038f2 <HAL_RCC_GetSysClockFreq+0x9a>
|
|
{
|
|
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
|
|
80038e0: 4a0e ldr r2, [pc, #56] @ (800391c <HAL_RCC_GetSysClockFreq+0xc4>)
|
|
80038e2: 69bb ldr r3, [r7, #24]
|
|
80038e4: fbb2 f2f3 udiv r2, r2, r3
|
|
80038e8: 697b ldr r3, [r7, #20]
|
|
80038ea: fb02 f303 mul.w r3, r2, r3
|
|
80038ee: 627b str r3, [r7, #36] @ 0x24
|
|
80038f0: e004 b.n 80038fc <HAL_RCC_GetSysClockFreq+0xa4>
|
|
}
|
|
else
|
|
{
|
|
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
|
|
80038f2: 697b ldr r3, [r7, #20]
|
|
80038f4: 4a0c ldr r2, [pc, #48] @ (8003928 <HAL_RCC_GetSysClockFreq+0xd0>)
|
|
80038f6: fb02 f303 mul.w r3, r2, r3
|
|
80038fa: 627b str r3, [r7, #36] @ 0x24
|
|
{
|
|
/* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
|
|
}
|
|
#endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
|
|
sysclockfreq = pllclk;
|
|
80038fc: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80038fe: 623b str r3, [r7, #32]
|
|
break;
|
|
8003900: e002 b.n 8003908 <HAL_RCC_GetSysClockFreq+0xb0>
|
|
}
|
|
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
|
default: /* HSI used as system clock */
|
|
{
|
|
sysclockfreq = HSI_VALUE;
|
|
8003902: 4b0a ldr r3, [pc, #40] @ (800392c <HAL_RCC_GetSysClockFreq+0xd4>)
|
|
8003904: 623b str r3, [r7, #32]
|
|
break;
|
|
8003906: bf00 nop
|
|
}
|
|
}
|
|
return sysclockfreq;
|
|
8003908: 6a3b ldr r3, [r7, #32]
|
|
}
|
|
800390a: 4618 mov r0, r3
|
|
800390c: 372c adds r7, #44 @ 0x2c
|
|
800390e: 46bd mov sp, r7
|
|
8003910: f85d 7b04 ldr.w r7, [sp], #4
|
|
8003914: 4770 bx lr
|
|
8003916: bf00 nop
|
|
8003918: 40021000 .word 0x40021000
|
|
800391c: 00f42400 .word 0x00f42400
|
|
8003920: 08008c18 .word 0x08008c18
|
|
8003924: 08008c28 .word 0x08008c28
|
|
8003928: 003d0900 .word 0x003d0900
|
|
800392c: 007a1200 .word 0x007a1200
|
|
|
|
08003930 <HAL_RCC_GetHCLKFreq>:
|
|
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
|
|
* and updated within this function
|
|
* @retval HCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetHCLKFreq(void)
|
|
{
|
|
8003930: b480 push {r7}
|
|
8003932: af00 add r7, sp, #0
|
|
return SystemCoreClock;
|
|
8003934: 4b03 ldr r3, [pc, #12] @ (8003944 <HAL_RCC_GetHCLKFreq+0x14>)
|
|
8003936: 681b ldr r3, [r3, #0]
|
|
}
|
|
8003938: 4618 mov r0, r3
|
|
800393a: 46bd mov sp, r7
|
|
800393c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8003940: 4770 bx lr
|
|
8003942: bf00 nop
|
|
8003944: 20000000 .word 0x20000000
|
|
|
|
08003948 <HAL_RCC_GetPCLK1Freq>:
|
|
* @note Each time PCLK1 changes, this function must be called to update the
|
|
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK1 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK1Freq(void)
|
|
{
|
|
8003948: b580 push {r7, lr}
|
|
800394a: b082 sub sp, #8
|
|
800394c: af00 add r7, sp, #0
|
|
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BITNUMBER]);
|
|
800394e: f7ff ffef bl 8003930 <HAL_RCC_GetHCLKFreq>
|
|
8003952: 4601 mov r1, r0
|
|
8003954: 4b0b ldr r3, [pc, #44] @ (8003984 <HAL_RCC_GetPCLK1Freq+0x3c>)
|
|
8003956: 685b ldr r3, [r3, #4]
|
|
8003958: f403 63e0 and.w r3, r3, #1792 @ 0x700
|
|
800395c: f44f 62e0 mov.w r2, #1792 @ 0x700
|
|
8003960: 607a str r2, [r7, #4]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003962: 687a ldr r2, [r7, #4]
|
|
8003964: fa92 f2a2 rbit r2, r2
|
|
8003968: 603a str r2, [r7, #0]
|
|
return result;
|
|
800396a: 683a ldr r2, [r7, #0]
|
|
800396c: fab2 f282 clz r2, r2
|
|
8003970: b2d2 uxtb r2, r2
|
|
8003972: 40d3 lsrs r3, r2
|
|
8003974: 4a04 ldr r2, [pc, #16] @ (8003988 <HAL_RCC_GetPCLK1Freq+0x40>)
|
|
8003976: 5cd3 ldrb r3, [r2, r3]
|
|
8003978: fa21 f303 lsr.w r3, r1, r3
|
|
}
|
|
800397c: 4618 mov r0, r3
|
|
800397e: 3708 adds r7, #8
|
|
8003980: 46bd mov sp, r7
|
|
8003982: bd80 pop {r7, pc}
|
|
8003984: 40021000 .word 0x40021000
|
|
8003988: 08008c10 .word 0x08008c10
|
|
|
|
0800398c <HAL_RCC_GetPCLK2Freq>:
|
|
* @note Each time PCLK2 changes, this function must be called to update the
|
|
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK2 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK2Freq(void)
|
|
{
|
|
800398c: b580 push {r7, lr}
|
|
800398e: b082 sub sp, #8
|
|
8003990: af00 add r7, sp, #0
|
|
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITNUMBER]);
|
|
8003992: f7ff ffcd bl 8003930 <HAL_RCC_GetHCLKFreq>
|
|
8003996: 4601 mov r1, r0
|
|
8003998: 4b0b ldr r3, [pc, #44] @ (80039c8 <HAL_RCC_GetPCLK2Freq+0x3c>)
|
|
800399a: 685b ldr r3, [r3, #4]
|
|
800399c: f403 5360 and.w r3, r3, #14336 @ 0x3800
|
|
80039a0: f44f 5260 mov.w r2, #14336 @ 0x3800
|
|
80039a4: 607a str r2, [r7, #4]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
80039a6: 687a ldr r2, [r7, #4]
|
|
80039a8: fa92 f2a2 rbit r2, r2
|
|
80039ac: 603a str r2, [r7, #0]
|
|
return result;
|
|
80039ae: 683a ldr r2, [r7, #0]
|
|
80039b0: fab2 f282 clz r2, r2
|
|
80039b4: b2d2 uxtb r2, r2
|
|
80039b6: 40d3 lsrs r3, r2
|
|
80039b8: 4a04 ldr r2, [pc, #16] @ (80039cc <HAL_RCC_GetPCLK2Freq+0x40>)
|
|
80039ba: 5cd3 ldrb r3, [r2, r3]
|
|
80039bc: fa21 f303 lsr.w r3, r1, r3
|
|
}
|
|
80039c0: 4618 mov r0, r3
|
|
80039c2: 3708 adds r7, #8
|
|
80039c4: 46bd mov sp, r7
|
|
80039c6: bd80 pop {r7, pc}
|
|
80039c8: 40021000 .word 0x40021000
|
|
80039cc: 08008c10 .word 0x08008c10
|
|
|
|
080039d0 <HAL_RCCEx_PeriphCLKConfig>:
|
|
* When the TIMx clock source is PLL clock, so the TIMx clock is PLL clock x 2.
|
|
*
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
|
|
{
|
|
80039d0: b580 push {r7, lr}
|
|
80039d2: b092 sub sp, #72 @ 0x48
|
|
80039d4: af00 add r7, sp, #0
|
|
80039d6: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = 0U;
|
|
80039d8: 2300 movs r3, #0
|
|
80039da: 643b str r3, [r7, #64] @ 0x40
|
|
uint32_t temp_reg = 0U;
|
|
80039dc: 2300 movs r3, #0
|
|
80039de: 63fb str r3, [r7, #60] @ 0x3c
|
|
FlagStatus pwrclkchanged = RESET;
|
|
80039e0: 2300 movs r3, #0
|
|
80039e2: f887 3047 strb.w r3, [r7, #71] @ 0x47
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
|
|
|
|
/*---------------------------- RTC configuration -------------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
|
|
80039e6: 687b ldr r3, [r7, #4]
|
|
80039e8: 681b ldr r3, [r3, #0]
|
|
80039ea: f403 3380 and.w r3, r3, #65536 @ 0x10000
|
|
80039ee: 2b00 cmp r3, #0
|
|
80039f0: f000 80d4 beq.w 8003b9c <HAL_RCCEx_PeriphCLKConfig+0x1cc>
|
|
|
|
|
|
/* As soon as function is called to change RTC clock source, activation of the
|
|
power domain is done. */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
80039f4: 4b4e ldr r3, [pc, #312] @ (8003b30 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
80039f6: 69db ldr r3, [r3, #28]
|
|
80039f8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
|
|
80039fc: 2b00 cmp r3, #0
|
|
80039fe: d10e bne.n 8003a1e <HAL_RCCEx_PeriphCLKConfig+0x4e>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8003a00: 4b4b ldr r3, [pc, #300] @ (8003b30 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003a02: 69db ldr r3, [r3, #28]
|
|
8003a04: 4a4a ldr r2, [pc, #296] @ (8003b30 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003a06: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
|
|
8003a0a: 61d3 str r3, [r2, #28]
|
|
8003a0c: 4b48 ldr r3, [pc, #288] @ (8003b30 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003a0e: 69db ldr r3, [r3, #28]
|
|
8003a10: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
|
|
8003a14: 60bb str r3, [r7, #8]
|
|
8003a16: 68bb ldr r3, [r7, #8]
|
|
pwrclkchanged = SET;
|
|
8003a18: 2301 movs r3, #1
|
|
8003a1a: f887 3047 strb.w r3, [r7, #71] @ 0x47
|
|
}
|
|
|
|
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8003a1e: 4b45 ldr r3, [pc, #276] @ (8003b34 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
8003a20: 681b ldr r3, [r3, #0]
|
|
8003a22: f403 7380 and.w r3, r3, #256 @ 0x100
|
|
8003a26: 2b00 cmp r3, #0
|
|
8003a28: d118 bne.n 8003a5c <HAL_RCCEx_PeriphCLKConfig+0x8c>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
8003a2a: 4b42 ldr r3, [pc, #264] @ (8003b34 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
8003a2c: 681b ldr r3, [r3, #0]
|
|
8003a2e: 4a41 ldr r2, [pc, #260] @ (8003b34 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
8003a30: f443 7380 orr.w r3, r3, #256 @ 0x100
|
|
8003a34: 6013 str r3, [r2, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
8003a36: f7fc fddf bl 80005f8 <HAL_GetTick>
|
|
8003a3a: 6438 str r0, [r7, #64] @ 0x40
|
|
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8003a3c: e008 b.n 8003a50 <HAL_RCCEx_PeriphCLKConfig+0x80>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8003a3e: f7fc fddb bl 80005f8 <HAL_GetTick>
|
|
8003a42: 4602 mov r2, r0
|
|
8003a44: 6c3b ldr r3, [r7, #64] @ 0x40
|
|
8003a46: 1ad3 subs r3, r2, r3
|
|
8003a48: 2b64 cmp r3, #100 @ 0x64
|
|
8003a4a: d901 bls.n 8003a50 <HAL_RCCEx_PeriphCLKConfig+0x80>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003a4c: 2303 movs r3, #3
|
|
8003a4e: e14b b.n 8003ce8 <HAL_RCCEx_PeriphCLKConfig+0x318>
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8003a50: 4b38 ldr r3, [pc, #224] @ (8003b34 <HAL_RCCEx_PeriphCLKConfig+0x164>)
|
|
8003a52: 681b ldr r3, [r3, #0]
|
|
8003a54: f403 7380 and.w r3, r3, #256 @ 0x100
|
|
8003a58: 2b00 cmp r3, #0
|
|
8003a5a: d0f0 beq.n 8003a3e <HAL_RCCEx_PeriphCLKConfig+0x6e>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
|
|
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
|
|
8003a5c: 4b34 ldr r3, [pc, #208] @ (8003b30 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003a5e: 6a1b ldr r3, [r3, #32]
|
|
8003a60: f403 7340 and.w r3, r3, #768 @ 0x300
|
|
8003a64: 63fb str r3, [r7, #60] @ 0x3c
|
|
if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
|
|
8003a66: 6bfb ldr r3, [r7, #60] @ 0x3c
|
|
8003a68: 2b00 cmp r3, #0
|
|
8003a6a: f000 8084 beq.w 8003b76 <HAL_RCCEx_PeriphCLKConfig+0x1a6>
|
|
8003a6e: 687b ldr r3, [r7, #4]
|
|
8003a70: 685b ldr r3, [r3, #4]
|
|
8003a72: f403 7340 and.w r3, r3, #768 @ 0x300
|
|
8003a76: 6bfa ldr r2, [r7, #60] @ 0x3c
|
|
8003a78: 429a cmp r2, r3
|
|
8003a7a: d07c beq.n 8003b76 <HAL_RCCEx_PeriphCLKConfig+0x1a6>
|
|
{
|
|
/* Store the content of BDCR register before the reset of Backup Domain */
|
|
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
|
|
8003a7c: 4b2c ldr r3, [pc, #176] @ (8003b30 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003a7e: 6a1b ldr r3, [r3, #32]
|
|
8003a80: f423 7340 bic.w r3, r3, #768 @ 0x300
|
|
8003a84: 63fb str r3, [r7, #60] @ 0x3c
|
|
8003a86: f44f 3380 mov.w r3, #65536 @ 0x10000
|
|
8003a8a: 633b str r3, [r7, #48] @ 0x30
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003a8c: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
8003a8e: fa93 f3a3 rbit r3, r3
|
|
8003a92: 62fb str r3, [r7, #44] @ 0x2c
|
|
return result;
|
|
8003a94: 6afb ldr r3, [r7, #44] @ 0x2c
|
|
/* RTC Clock selection can be changed only if the Backup Domain is reset */
|
|
__HAL_RCC_BACKUPRESET_FORCE();
|
|
8003a96: fab3 f383 clz r3, r3
|
|
8003a9a: b2db uxtb r3, r3
|
|
8003a9c: 461a mov r2, r3
|
|
8003a9e: 4b26 ldr r3, [pc, #152] @ (8003b38 <HAL_RCCEx_PeriphCLKConfig+0x168>)
|
|
8003aa0: 4413 add r3, r2
|
|
8003aa2: 009b lsls r3, r3, #2
|
|
8003aa4: 461a mov r2, r3
|
|
8003aa6: 2301 movs r3, #1
|
|
8003aa8: 6013 str r3, [r2, #0]
|
|
8003aaa: f44f 3380 mov.w r3, #65536 @ 0x10000
|
|
8003aae: 63bb str r3, [r7, #56] @ 0x38
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003ab0: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8003ab2: fa93 f3a3 rbit r3, r3
|
|
8003ab6: 637b str r3, [r7, #52] @ 0x34
|
|
return result;
|
|
8003ab8: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
__HAL_RCC_BACKUPRESET_RELEASE();
|
|
8003aba: fab3 f383 clz r3, r3
|
|
8003abe: b2db uxtb r3, r3
|
|
8003ac0: 461a mov r2, r3
|
|
8003ac2: 4b1d ldr r3, [pc, #116] @ (8003b38 <HAL_RCCEx_PeriphCLKConfig+0x168>)
|
|
8003ac4: 4413 add r3, r2
|
|
8003ac6: 009b lsls r3, r3, #2
|
|
8003ac8: 461a mov r2, r3
|
|
8003aca: 2300 movs r3, #0
|
|
8003acc: 6013 str r3, [r2, #0]
|
|
/* Restore the Content of BDCR register */
|
|
RCC->BDCR = temp_reg;
|
|
8003ace: 4a18 ldr r2, [pc, #96] @ (8003b30 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003ad0: 6bfb ldr r3, [r7, #60] @ 0x3c
|
|
8003ad2: 6213 str r3, [r2, #32]
|
|
|
|
/* Wait for LSERDY if LSE was enabled */
|
|
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
|
|
8003ad4: 6bfb ldr r3, [r7, #60] @ 0x3c
|
|
8003ad6: f003 0301 and.w r3, r3, #1
|
|
8003ada: 2b00 cmp r3, #0
|
|
8003adc: d04b beq.n 8003b76 <HAL_RCCEx_PeriphCLKConfig+0x1a6>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8003ade: f7fc fd8b bl 80005f8 <HAL_GetTick>
|
|
8003ae2: 6438 str r0, [r7, #64] @ 0x40
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8003ae4: e00a b.n 8003afc <HAL_RCCEx_PeriphCLKConfig+0x12c>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
8003ae6: f7fc fd87 bl 80005f8 <HAL_GetTick>
|
|
8003aea: 4602 mov r2, r0
|
|
8003aec: 6c3b ldr r3, [r7, #64] @ 0x40
|
|
8003aee: 1ad3 subs r3, r2, r3
|
|
8003af0: f241 3288 movw r2, #5000 @ 0x1388
|
|
8003af4: 4293 cmp r3, r2
|
|
8003af6: d901 bls.n 8003afc <HAL_RCCEx_PeriphCLKConfig+0x12c>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8003af8: 2303 movs r3, #3
|
|
8003afa: e0f5 b.n 8003ce8 <HAL_RCCEx_PeriphCLKConfig+0x318>
|
|
8003afc: 2302 movs r3, #2
|
|
8003afe: 62bb str r3, [r7, #40] @ 0x28
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003b00: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8003b02: fa93 f3a3 rbit r3, r3
|
|
8003b06: 627b str r3, [r7, #36] @ 0x24
|
|
8003b08: 2302 movs r3, #2
|
|
8003b0a: 623b str r3, [r7, #32]
|
|
8003b0c: 6a3b ldr r3, [r7, #32]
|
|
8003b0e: fa93 f3a3 rbit r3, r3
|
|
8003b12: 61fb str r3, [r7, #28]
|
|
return result;
|
|
8003b14: 69fb ldr r3, [r7, #28]
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8003b16: fab3 f383 clz r3, r3
|
|
8003b1a: b2db uxtb r3, r3
|
|
8003b1c: 095b lsrs r3, r3, #5
|
|
8003b1e: b2db uxtb r3, r3
|
|
8003b20: f043 0302 orr.w r3, r3, #2
|
|
8003b24: b2db uxtb r3, r3
|
|
8003b26: 2b02 cmp r3, #2
|
|
8003b28: d108 bne.n 8003b3c <HAL_RCCEx_PeriphCLKConfig+0x16c>
|
|
8003b2a: 4b01 ldr r3, [pc, #4] @ (8003b30 <HAL_RCCEx_PeriphCLKConfig+0x160>)
|
|
8003b2c: 6a1b ldr r3, [r3, #32]
|
|
8003b2e: e00d b.n 8003b4c <HAL_RCCEx_PeriphCLKConfig+0x17c>
|
|
8003b30: 40021000 .word 0x40021000
|
|
8003b34: 40007000 .word 0x40007000
|
|
8003b38: 10908100 .word 0x10908100
|
|
8003b3c: 2302 movs r3, #2
|
|
8003b3e: 61bb str r3, [r7, #24]
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|
8003b40: 69bb ldr r3, [r7, #24]
|
|
8003b42: fa93 f3a3 rbit r3, r3
|
|
8003b46: 617b str r3, [r7, #20]
|
|
8003b48: 4b69 ldr r3, [pc, #420] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003b4a: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8003b4c: 2202 movs r2, #2
|
|
8003b4e: 613a str r2, [r7, #16]
|
|
8003b50: 693a ldr r2, [r7, #16]
|
|
8003b52: fa92 f2a2 rbit r2, r2
|
|
8003b56: 60fa str r2, [r7, #12]
|
|
return result;
|
|
8003b58: 68fa ldr r2, [r7, #12]
|
|
8003b5a: fab2 f282 clz r2, r2
|
|
8003b5e: b2d2 uxtb r2, r2
|
|
8003b60: f042 0240 orr.w r2, r2, #64 @ 0x40
|
|
8003b64: b2d2 uxtb r2, r2
|
|
8003b66: f002 021f and.w r2, r2, #31
|
|
8003b6a: 2101 movs r1, #1
|
|
8003b6c: fa01 f202 lsl.w r2, r1, r2
|
|
8003b70: 4013 ands r3, r2
|
|
8003b72: 2b00 cmp r3, #0
|
|
8003b74: d0b7 beq.n 8003ae6 <HAL_RCCEx_PeriphCLKConfig+0x116>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
|
|
8003b76: 4b5e ldr r3, [pc, #376] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003b78: 6a1b ldr r3, [r3, #32]
|
|
8003b7a: f423 7240 bic.w r2, r3, #768 @ 0x300
|
|
8003b7e: 687b ldr r3, [r7, #4]
|
|
8003b80: 685b ldr r3, [r3, #4]
|
|
8003b82: 495b ldr r1, [pc, #364] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003b84: 4313 orrs r3, r2
|
|
8003b86: 620b str r3, [r1, #32]
|
|
|
|
/* Require to disable power clock if necessary */
|
|
if(pwrclkchanged == SET)
|
|
8003b88: f897 3047 ldrb.w r3, [r7, #71] @ 0x47
|
|
8003b8c: 2b01 cmp r3, #1
|
|
8003b8e: d105 bne.n 8003b9c <HAL_RCCEx_PeriphCLKConfig+0x1cc>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
8003b90: 4b57 ldr r3, [pc, #348] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003b92: 69db ldr r3, [r3, #28]
|
|
8003b94: 4a56 ldr r2, [pc, #344] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003b96: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
|
|
8003b9a: 61d3 str r3, [r2, #28]
|
|
}
|
|
}
|
|
|
|
/*------------------------------- USART1 Configuration ------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
|
|
8003b9c: 687b ldr r3, [r7, #4]
|
|
8003b9e: 681b ldr r3, [r3, #0]
|
|
8003ba0: f003 0301 and.w r3, r3, #1
|
|
8003ba4: 2b00 cmp r3, #0
|
|
8003ba6: d008 beq.n 8003bba <HAL_RCCEx_PeriphCLKConfig+0x1ea>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
|
|
|
|
/* Configure the USART1 clock source */
|
|
__HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
|
|
8003ba8: 4b51 ldr r3, [pc, #324] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003baa: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003bac: f023 0203 bic.w r2, r3, #3
|
|
8003bb0: 687b ldr r3, [r7, #4]
|
|
8003bb2: 689b ldr r3, [r3, #8]
|
|
8003bb4: 494e ldr r1, [pc, #312] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003bb6: 4313 orrs r3, r2
|
|
8003bb8: 630b str r3, [r1, #48] @ 0x30
|
|
__HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
|
|
}
|
|
#endif /* RCC_CFGR3_USART3SW */
|
|
|
|
/*------------------------------ I2C1 Configuration ------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
|
|
8003bba: 687b ldr r3, [r7, #4]
|
|
8003bbc: 681b ldr r3, [r3, #0]
|
|
8003bbe: f003 0320 and.w r3, r3, #32
|
|
8003bc2: 2b00 cmp r3, #0
|
|
8003bc4: d008 beq.n 8003bd8 <HAL_RCCEx_PeriphCLKConfig+0x208>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
|
|
|
|
/* Configure the I2C1 clock source */
|
|
__HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
|
|
8003bc6: 4b4a ldr r3, [pc, #296] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003bc8: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003bca: f023 0210 bic.w r2, r3, #16
|
|
8003bce: 687b ldr r3, [r7, #4]
|
|
8003bd0: 68db ldr r3, [r3, #12]
|
|
8003bd2: 4947 ldr r1, [pc, #284] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003bd4: 4313 orrs r3, r2
|
|
8003bd6: 630b str r3, [r1, #48] @ 0x30
|
|
#if defined(STM32F302xE) || defined(STM32F303xE)\
|
|
|| defined(STM32F302xC) || defined(STM32F303xC)\
|
|
|| defined(STM32F302x8) \
|
|
|| defined(STM32F373xC)
|
|
/*------------------------------ USB Configuration ------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
|
|
8003bd8: 687b ldr r3, [r7, #4]
|
|
8003bda: 681b ldr r3, [r3, #0]
|
|
8003bdc: f403 3300 and.w r3, r3, #131072 @ 0x20000
|
|
8003be0: 2b00 cmp r3, #0
|
|
8003be2: d008 beq.n 8003bf6 <HAL_RCCEx_PeriphCLKConfig+0x226>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->USBClockSelection));
|
|
|
|
/* Configure the USB clock source */
|
|
__HAL_RCC_USB_CONFIG(PeriphClkInit->USBClockSelection);
|
|
8003be4: 4b42 ldr r3, [pc, #264] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003be6: 685b ldr r3, [r3, #4]
|
|
8003be8: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
|
|
8003bec: 687b ldr r3, [r7, #4]
|
|
8003bee: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003bf0: 493f ldr r1, [pc, #252] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003bf2: 4313 orrs r3, r2
|
|
8003bf4: 604b str r3, [r1, #4]
|
|
|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
|
|
|| defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\
|
|
|| defined(STM32F373xC) || defined(STM32F378xx)
|
|
|
|
/*------------------------------ I2C2 Configuration ------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
|
|
8003bf6: 687b ldr r3, [r7, #4]
|
|
8003bf8: 681b ldr r3, [r3, #0]
|
|
8003bfa: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8003bfe: 2b00 cmp r3, #0
|
|
8003c00: d008 beq.n 8003c14 <HAL_RCCEx_PeriphCLKConfig+0x244>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
|
|
|
|
/* Configure the I2C2 clock source */
|
|
__HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
|
|
8003c02: 4b3b ldr r3, [pc, #236] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c04: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003c06: f023 0220 bic.w r2, r3, #32
|
|
8003c0a: 687b ldr r3, [r7, #4]
|
|
8003c0c: 691b ldr r3, [r3, #16]
|
|
8003c0e: 4938 ldr r1, [pc, #224] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c10: 4313 orrs r3, r2
|
|
8003c12: 630b str r3, [r1, #48] @ 0x30
|
|
|
|
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
|
|
|| defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
|
|
|
/*------------------------------ I2C3 Configuration ------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
|
|
8003c14: 687b ldr r3, [r7, #4]
|
|
8003c16: 681b ldr r3, [r3, #0]
|
|
8003c18: f403 4300 and.w r3, r3, #32768 @ 0x8000
|
|
8003c1c: 2b00 cmp r3, #0
|
|
8003c1e: d008 beq.n 8003c32 <HAL_RCCEx_PeriphCLKConfig+0x262>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
|
|
|
|
/* Configure the I2C3 clock source */
|
|
__HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
|
|
8003c20: 4b33 ldr r3, [pc, #204] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c22: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003c24: f023 0240 bic.w r2, r3, #64 @ 0x40
|
|
8003c28: 687b ldr r3, [r7, #4]
|
|
8003c2a: 695b ldr r3, [r3, #20]
|
|
8003c2c: 4930 ldr r1, [pc, #192] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c2e: 4313 orrs r3, r2
|
|
8003c30: 630b str r3, [r1, #48] @ 0x30
|
|
|
|
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\
|
|
|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
|
|
|| defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
|
/*------------------------------ I2S Configuration ------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S)
|
|
8003c32: 687b ldr r3, [r7, #4]
|
|
8003c34: 681b ldr r3, [r3, #0]
|
|
8003c36: f403 7300 and.w r3, r3, #512 @ 0x200
|
|
8003c3a: 2b00 cmp r3, #0
|
|
8003c3c: d008 beq.n 8003c50 <HAL_RCCEx_PeriphCLKConfig+0x280>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection));
|
|
|
|
/* Configure the I2S clock source */
|
|
__HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection);
|
|
8003c3e: 4b2c ldr r3, [pc, #176] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c40: 685b ldr r3, [r3, #4]
|
|
8003c42: f423 0200 bic.w r2, r3, #8388608 @ 0x800000
|
|
8003c46: 687b ldr r3, [r7, #4]
|
|
8003c48: 69db ldr r3, [r3, #28]
|
|
8003c4a: 4929 ldr r1, [pc, #164] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c4c: 4313 orrs r3, r2
|
|
8003c4e: 604b str r3, [r1, #4]
|
|
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
|
|
|
#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
|
|
|
/*------------------------------ ADC1 clock Configuration ------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC1) == RCC_PERIPHCLK_ADC1)
|
|
8003c50: 687b ldr r3, [r7, #4]
|
|
8003c52: 681b ldr r3, [r3, #0]
|
|
8003c54: f003 0380 and.w r3, r3, #128 @ 0x80
|
|
8003c58: 2b00 cmp r3, #0
|
|
8003c5a: d008 beq.n 8003c6e <HAL_RCCEx_PeriphCLKConfig+0x29e>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_ADC1PLLCLK_DIV(PeriphClkInit->Adc1ClockSelection));
|
|
|
|
/* Configure the ADC1 clock source */
|
|
__HAL_RCC_ADC1_CONFIG(PeriphClkInit->Adc1ClockSelection);
|
|
8003c5c: 4b24 ldr r3, [pc, #144] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c5e: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8003c60: f423 72f8 bic.w r2, r3, #496 @ 0x1f0
|
|
8003c64: 687b ldr r3, [r7, #4]
|
|
8003c66: 699b ldr r3, [r3, #24]
|
|
8003c68: 4921 ldr r1, [pc, #132] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c6a: 4313 orrs r3, r2
|
|
8003c6c: 62cb str r3, [r1, #44] @ 0x2c
|
|
|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\
|
|
|| defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)\
|
|
|| defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
|
|
|
/*------------------------------ TIM1 clock Configuration ----------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM1) == RCC_PERIPHCLK_TIM1)
|
|
8003c6e: 687b ldr r3, [r7, #4]
|
|
8003c70: 681b ldr r3, [r3, #0]
|
|
8003c72: f403 5380 and.w r3, r3, #4096 @ 0x1000
|
|
8003c76: 2b00 cmp r3, #0
|
|
8003c78: d008 beq.n 8003c8c <HAL_RCCEx_PeriphCLKConfig+0x2bc>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_TIM1CLKSOURCE(PeriphClkInit->Tim1ClockSelection));
|
|
|
|
/* Configure the TIM1 clock source */
|
|
__HAL_RCC_TIM1_CONFIG(PeriphClkInit->Tim1ClockSelection);
|
|
8003c7a: 4b1d ldr r3, [pc, #116] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c7c: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003c7e: f423 7280 bic.w r2, r3, #256 @ 0x100
|
|
8003c82: 687b ldr r3, [r7, #4]
|
|
8003c84: 6a1b ldr r3, [r3, #32]
|
|
8003c86: 491a ldr r1, [pc, #104] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c88: 4313 orrs r3, r2
|
|
8003c8a: 630b str r3, [r1, #48] @ 0x30
|
|
/* STM32F303xC || STM32F358xx */
|
|
|
|
#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
|
|
|
/*------------------------------ TIM15 clock Configuration ----------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM15) == RCC_PERIPHCLK_TIM15)
|
|
8003c8c: 687b ldr r3, [r7, #4]
|
|
8003c8e: 681b ldr r3, [r3, #0]
|
|
8003c90: f403 2380 and.w r3, r3, #262144 @ 0x40000
|
|
8003c94: 2b00 cmp r3, #0
|
|
8003c96: d008 beq.n 8003caa <HAL_RCCEx_PeriphCLKConfig+0x2da>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_TIM15CLKSOURCE(PeriphClkInit->Tim15ClockSelection));
|
|
|
|
/* Configure the TIM15 clock source */
|
|
__HAL_RCC_TIM15_CONFIG(PeriphClkInit->Tim15ClockSelection);
|
|
8003c98: 4b15 ldr r3, [pc, #84] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003c9a: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003c9c: f423 6280 bic.w r2, r3, #1024 @ 0x400
|
|
8003ca0: 687b ldr r3, [r7, #4]
|
|
8003ca2: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8003ca4: 4912 ldr r1, [pc, #72] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003ca6: 4313 orrs r3, r2
|
|
8003ca8: 630b str r3, [r1, #48] @ 0x30
|
|
}
|
|
|
|
/*------------------------------ TIM16 clock Configuration ----------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM16) == RCC_PERIPHCLK_TIM16)
|
|
8003caa: 687b ldr r3, [r7, #4]
|
|
8003cac: 681b ldr r3, [r3, #0]
|
|
8003cae: f403 2300 and.w r3, r3, #524288 @ 0x80000
|
|
8003cb2: 2b00 cmp r3, #0
|
|
8003cb4: d008 beq.n 8003cc8 <HAL_RCCEx_PeriphCLKConfig+0x2f8>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_TIM16CLKSOURCE(PeriphClkInit->Tim16ClockSelection));
|
|
|
|
/* Configure the TIM16 clock source */
|
|
__HAL_RCC_TIM16_CONFIG(PeriphClkInit->Tim16ClockSelection);
|
|
8003cb6: 4b0e ldr r3, [pc, #56] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003cb8: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003cba: f423 6200 bic.w r2, r3, #2048 @ 0x800
|
|
8003cbe: 687b ldr r3, [r7, #4]
|
|
8003cc0: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
8003cc2: 490b ldr r1, [pc, #44] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003cc4: 4313 orrs r3, r2
|
|
8003cc6: 630b str r3, [r1, #48] @ 0x30
|
|
}
|
|
|
|
/*------------------------------ TIM17 clock Configuration ----------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM17) == RCC_PERIPHCLK_TIM17)
|
|
8003cc8: 687b ldr r3, [r7, #4]
|
|
8003cca: 681b ldr r3, [r3, #0]
|
|
8003ccc: f403 1380 and.w r3, r3, #1048576 @ 0x100000
|
|
8003cd0: 2b00 cmp r3, #0
|
|
8003cd2: d008 beq.n 8003ce6 <HAL_RCCEx_PeriphCLKConfig+0x316>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_TIM17CLKSOURCE(PeriphClkInit->Tim17ClockSelection));
|
|
|
|
/* Configure the TIM17 clock source */
|
|
__HAL_RCC_TIM17_CONFIG(PeriphClkInit->Tim17ClockSelection);
|
|
8003cd4: 4b06 ldr r3, [pc, #24] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003cd6: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003cd8: f423 5200 bic.w r2, r3, #8192 @ 0x2000
|
|
8003cdc: 687b ldr r3, [r7, #4]
|
|
8003cde: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8003ce0: 4903 ldr r1, [pc, #12] @ (8003cf0 <HAL_RCCEx_PeriphCLKConfig+0x320>)
|
|
8003ce2: 4313 orrs r3, r2
|
|
8003ce4: 630b str r3, [r1, #48] @ 0x30
|
|
__HAL_RCC_TIM20_CONFIG(PeriphClkInit->Tim20ClockSelection);
|
|
}
|
|
#endif /* STM32F303xE || STM32F398xx */
|
|
|
|
|
|
return HAL_OK;
|
|
8003ce6: 2300 movs r3, #0
|
|
}
|
|
8003ce8: 4618 mov r0, r3
|
|
8003cea: 3748 adds r7, #72 @ 0x48
|
|
8003cec: 46bd mov sp, r7
|
|
8003cee: bd80 pop {r7, pc}
|
|
8003cf0: 40021000 .word 0x40021000
|
|
|
|
08003cf4 <HAL_UART_Init>:
|
|
* parameters in the UART_InitTypeDef and initialize the associated handle.
|
|
* @param huart UART handle.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
|
|
{
|
|
8003cf4: b580 push {r7, lr}
|
|
8003cf6: b082 sub sp, #8
|
|
8003cf8: af00 add r7, sp, #0
|
|
8003cfa: 6078 str r0, [r7, #4]
|
|
/* Check the UART handle allocation */
|
|
if (huart == NULL)
|
|
8003cfc: 687b ldr r3, [r7, #4]
|
|
8003cfe: 2b00 cmp r3, #0
|
|
8003d00: d101 bne.n 8003d06 <HAL_UART_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8003d02: 2301 movs r3, #1
|
|
8003d04: e040 b.n 8003d88 <HAL_UART_Init+0x94>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_UART_INSTANCE(huart->Instance));
|
|
}
|
|
|
|
if (huart->gState == HAL_UART_STATE_RESET)
|
|
8003d06: 687b ldr r3, [r7, #4]
|
|
8003d08: 6fdb ldr r3, [r3, #124] @ 0x7c
|
|
8003d0a: 2b00 cmp r3, #0
|
|
8003d0c: d106 bne.n 8003d1c <HAL_UART_Init+0x28>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
huart->Lock = HAL_UNLOCKED;
|
|
8003d0e: 687b ldr r3, [r7, #4]
|
|
8003d10: 2200 movs r2, #0
|
|
8003d12: f883 2078 strb.w r2, [r3, #120] @ 0x78
|
|
|
|
/* Init the low level hardware */
|
|
huart->MspInitCallback(huart);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK */
|
|
HAL_UART_MspInit(huart);
|
|
8003d16: 6878 ldr r0, [r7, #4]
|
|
8003d18: f7fc fb5a bl 80003d0 <HAL_UART_MspInit>
|
|
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
|
}
|
|
|
|
huart->gState = HAL_UART_STATE_BUSY;
|
|
8003d1c: 687b ldr r3, [r7, #4]
|
|
8003d1e: 2224 movs r2, #36 @ 0x24
|
|
8003d20: 67da str r2, [r3, #124] @ 0x7c
|
|
|
|
__HAL_UART_DISABLE(huart);
|
|
8003d22: 687b ldr r3, [r7, #4]
|
|
8003d24: 681b ldr r3, [r3, #0]
|
|
8003d26: 681a ldr r2, [r3, #0]
|
|
8003d28: 687b ldr r3, [r7, #4]
|
|
8003d2a: 681b ldr r3, [r3, #0]
|
|
8003d2c: f022 0201 bic.w r2, r2, #1
|
|
8003d30: 601a str r2, [r3, #0]
|
|
|
|
/* Set the UART Communication parameters */
|
|
if (UART_SetConfig(huart) == HAL_ERROR)
|
|
8003d32: 6878 ldr r0, [r7, #4]
|
|
8003d34: f000 f82c bl 8003d90 <UART_SetConfig>
|
|
8003d38: 4603 mov r3, r0
|
|
8003d3a: 2b01 cmp r3, #1
|
|
8003d3c: d101 bne.n 8003d42 <HAL_UART_Init+0x4e>
|
|
{
|
|
return HAL_ERROR;
|
|
8003d3e: 2301 movs r3, #1
|
|
8003d40: e022 b.n 8003d88 <HAL_UART_Init+0x94>
|
|
}
|
|
|
|
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
|
|
8003d42: 687b ldr r3, [r7, #4]
|
|
8003d44: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8003d46: 2b00 cmp r3, #0
|
|
8003d48: d002 beq.n 8003d50 <HAL_UART_Init+0x5c>
|
|
{
|
|
UART_AdvFeatureConfig(huart);
|
|
8003d4a: 6878 ldr r0, [r7, #4]
|
|
8003d4c: f000 f956 bl 8003ffc <UART_AdvFeatureConfig>
|
|
}
|
|
|
|
/* In asynchronous mode, the following bits must be kept cleared:
|
|
- LINEN and CLKEN bits in the USART_CR2 register,
|
|
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
|
|
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
|
8003d50: 687b ldr r3, [r7, #4]
|
|
8003d52: 681b ldr r3, [r3, #0]
|
|
8003d54: 685a ldr r2, [r3, #4]
|
|
8003d56: 687b ldr r3, [r7, #4]
|
|
8003d58: 681b ldr r3, [r3, #0]
|
|
8003d5a: f422 4290 bic.w r2, r2, #18432 @ 0x4800
|
|
8003d5e: 605a str r2, [r3, #4]
|
|
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
|
|
8003d60: 687b ldr r3, [r7, #4]
|
|
8003d62: 681b ldr r3, [r3, #0]
|
|
8003d64: 689a ldr r2, [r3, #8]
|
|
8003d66: 687b ldr r3, [r7, #4]
|
|
8003d68: 681b ldr r3, [r3, #0]
|
|
8003d6a: f022 022a bic.w r2, r2, #42 @ 0x2a
|
|
8003d6e: 609a str r2, [r3, #8]
|
|
|
|
__HAL_UART_ENABLE(huart);
|
|
8003d70: 687b ldr r3, [r7, #4]
|
|
8003d72: 681b ldr r3, [r3, #0]
|
|
8003d74: 681a ldr r2, [r3, #0]
|
|
8003d76: 687b ldr r3, [r7, #4]
|
|
8003d78: 681b ldr r3, [r3, #0]
|
|
8003d7a: f042 0201 orr.w r2, r2, #1
|
|
8003d7e: 601a str r2, [r3, #0]
|
|
|
|
/* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
|
|
return (UART_CheckIdleState(huart));
|
|
8003d80: 6878 ldr r0, [r7, #4]
|
|
8003d82: f000 f9dd bl 8004140 <UART_CheckIdleState>
|
|
8003d86: 4603 mov r3, r0
|
|
}
|
|
8003d88: 4618 mov r0, r3
|
|
8003d8a: 3708 adds r7, #8
|
|
8003d8c: 46bd mov sp, r7
|
|
8003d8e: bd80 pop {r7, pc}
|
|
|
|
08003d90 <UART_SetConfig>:
|
|
* @brief Configure the UART peripheral.
|
|
* @param huart UART handle.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
|
|
{
|
|
8003d90: b580 push {r7, lr}
|
|
8003d92: b088 sub sp, #32
|
|
8003d94: af00 add r7, sp, #0
|
|
8003d96: 6078 str r0, [r7, #4]
|
|
uint32_t tmpreg;
|
|
uint16_t brrtemp;
|
|
UART_ClockSourceTypeDef clocksource;
|
|
uint32_t usartdiv;
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
8003d98: 2300 movs r3, #0
|
|
8003d9a: 77bb strb r3, [r7, #30]
|
|
* the UART Word Length, Parity, Mode and oversampling:
|
|
* set the M bits according to huart->Init.WordLength value
|
|
* set PCE and PS bits according to huart->Init.Parity value
|
|
* set TE and RE bits according to huart->Init.Mode value
|
|
* set OVER8 bit according to huart->Init.OverSampling value */
|
|
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
|
|
8003d9c: 687b ldr r3, [r7, #4]
|
|
8003d9e: 689a ldr r2, [r3, #8]
|
|
8003da0: 687b ldr r3, [r7, #4]
|
|
8003da2: 691b ldr r3, [r3, #16]
|
|
8003da4: 431a orrs r2, r3
|
|
8003da6: 687b ldr r3, [r7, #4]
|
|
8003da8: 695b ldr r3, [r3, #20]
|
|
8003daa: 431a orrs r2, r3
|
|
8003dac: 687b ldr r3, [r7, #4]
|
|
8003dae: 69db ldr r3, [r3, #28]
|
|
8003db0: 4313 orrs r3, r2
|
|
8003db2: 617b str r3, [r7, #20]
|
|
MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
|
|
8003db4: 687b ldr r3, [r7, #4]
|
|
8003db6: 681b ldr r3, [r3, #0]
|
|
8003db8: 681a ldr r2, [r3, #0]
|
|
8003dba: 4b8a ldr r3, [pc, #552] @ (8003fe4 <UART_SetConfig+0x254>)
|
|
8003dbc: 4013 ands r3, r2
|
|
8003dbe: 687a ldr r2, [r7, #4]
|
|
8003dc0: 6812 ldr r2, [r2, #0]
|
|
8003dc2: 6979 ldr r1, [r7, #20]
|
|
8003dc4: 430b orrs r3, r1
|
|
8003dc6: 6013 str r3, [r2, #0]
|
|
|
|
/*-------------------------- USART CR2 Configuration -----------------------*/
|
|
/* Configure the UART Stop Bits: Set STOP[13:12] bits according
|
|
* to huart->Init.StopBits value */
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
|
|
8003dc8: 687b ldr r3, [r7, #4]
|
|
8003dca: 681b ldr r3, [r3, #0]
|
|
8003dcc: 685b ldr r3, [r3, #4]
|
|
8003dce: f423 5140 bic.w r1, r3, #12288 @ 0x3000
|
|
8003dd2: 687b ldr r3, [r7, #4]
|
|
8003dd4: 68da ldr r2, [r3, #12]
|
|
8003dd6: 687b ldr r3, [r7, #4]
|
|
8003dd8: 681b ldr r3, [r3, #0]
|
|
8003dda: 430a orrs r2, r1
|
|
8003ddc: 605a str r2, [r3, #4]
|
|
/* Configure
|
|
* - UART HardWare Flow Control: set CTSE and RTSE bits according
|
|
* to huart->Init.HwFlowCtl value
|
|
* - one-bit sampling method versus three samples' majority rule according
|
|
* to huart->Init.OneBitSampling (not applicable to LPUART) */
|
|
tmpreg = (uint32_t)huart->Init.HwFlowCtl;
|
|
8003dde: 687b ldr r3, [r7, #4]
|
|
8003de0: 699b ldr r3, [r3, #24]
|
|
8003de2: 617b str r3, [r7, #20]
|
|
|
|
tmpreg |= huart->Init.OneBitSampling;
|
|
8003de4: 687b ldr r3, [r7, #4]
|
|
8003de6: 6a1b ldr r3, [r3, #32]
|
|
8003de8: 697a ldr r2, [r7, #20]
|
|
8003dea: 4313 orrs r3, r2
|
|
8003dec: 617b str r3, [r7, #20]
|
|
MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
|
|
8003dee: 687b ldr r3, [r7, #4]
|
|
8003df0: 681b ldr r3, [r3, #0]
|
|
8003df2: 689b ldr r3, [r3, #8]
|
|
8003df4: f423 6130 bic.w r1, r3, #2816 @ 0xb00
|
|
8003df8: 687b ldr r3, [r7, #4]
|
|
8003dfa: 681b ldr r3, [r3, #0]
|
|
8003dfc: 697a ldr r2, [r7, #20]
|
|
8003dfe: 430a orrs r2, r1
|
|
8003e00: 609a str r2, [r3, #8]
|
|
|
|
|
|
/*-------------------------- USART BRR Configuration -----------------------*/
|
|
UART_GETCLOCKSOURCE(huart, clocksource);
|
|
8003e02: 687b ldr r3, [r7, #4]
|
|
8003e04: 681b ldr r3, [r3, #0]
|
|
8003e06: 4a78 ldr r2, [pc, #480] @ (8003fe8 <UART_SetConfig+0x258>)
|
|
8003e08: 4293 cmp r3, r2
|
|
8003e0a: d120 bne.n 8003e4e <UART_SetConfig+0xbe>
|
|
8003e0c: 4b77 ldr r3, [pc, #476] @ (8003fec <UART_SetConfig+0x25c>)
|
|
8003e0e: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003e10: f003 0303 and.w r3, r3, #3
|
|
8003e14: 2b03 cmp r3, #3
|
|
8003e16: d817 bhi.n 8003e48 <UART_SetConfig+0xb8>
|
|
8003e18: a201 add r2, pc, #4 @ (adr r2, 8003e20 <UART_SetConfig+0x90>)
|
|
8003e1a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8003e1e: bf00 nop
|
|
8003e20: 08003e31 .word 0x08003e31
|
|
8003e24: 08003e3d .word 0x08003e3d
|
|
8003e28: 08003e43 .word 0x08003e43
|
|
8003e2c: 08003e37 .word 0x08003e37
|
|
8003e30: 2300 movs r3, #0
|
|
8003e32: 77fb strb r3, [r7, #31]
|
|
8003e34: e01d b.n 8003e72 <UART_SetConfig+0xe2>
|
|
8003e36: 2302 movs r3, #2
|
|
8003e38: 77fb strb r3, [r7, #31]
|
|
8003e3a: e01a b.n 8003e72 <UART_SetConfig+0xe2>
|
|
8003e3c: 2304 movs r3, #4
|
|
8003e3e: 77fb strb r3, [r7, #31]
|
|
8003e40: e017 b.n 8003e72 <UART_SetConfig+0xe2>
|
|
8003e42: 2308 movs r3, #8
|
|
8003e44: 77fb strb r3, [r7, #31]
|
|
8003e46: e014 b.n 8003e72 <UART_SetConfig+0xe2>
|
|
8003e48: 2310 movs r3, #16
|
|
8003e4a: 77fb strb r3, [r7, #31]
|
|
8003e4c: e011 b.n 8003e72 <UART_SetConfig+0xe2>
|
|
8003e4e: 687b ldr r3, [r7, #4]
|
|
8003e50: 681b ldr r3, [r3, #0]
|
|
8003e52: 4a67 ldr r2, [pc, #412] @ (8003ff0 <UART_SetConfig+0x260>)
|
|
8003e54: 4293 cmp r3, r2
|
|
8003e56: d102 bne.n 8003e5e <UART_SetConfig+0xce>
|
|
8003e58: 2300 movs r3, #0
|
|
8003e5a: 77fb strb r3, [r7, #31]
|
|
8003e5c: e009 b.n 8003e72 <UART_SetConfig+0xe2>
|
|
8003e5e: 687b ldr r3, [r7, #4]
|
|
8003e60: 681b ldr r3, [r3, #0]
|
|
8003e62: 4a64 ldr r2, [pc, #400] @ (8003ff4 <UART_SetConfig+0x264>)
|
|
8003e64: 4293 cmp r3, r2
|
|
8003e66: d102 bne.n 8003e6e <UART_SetConfig+0xde>
|
|
8003e68: 2300 movs r3, #0
|
|
8003e6a: 77fb strb r3, [r7, #31]
|
|
8003e6c: e001 b.n 8003e72 <UART_SetConfig+0xe2>
|
|
8003e6e: 2310 movs r3, #16
|
|
8003e70: 77fb strb r3, [r7, #31]
|
|
|
|
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
|
|
8003e72: 687b ldr r3, [r7, #4]
|
|
8003e74: 69db ldr r3, [r3, #28]
|
|
8003e76: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
|
|
8003e7a: d15a bne.n 8003f32 <UART_SetConfig+0x1a2>
|
|
{
|
|
switch (clocksource)
|
|
8003e7c: 7ffb ldrb r3, [r7, #31]
|
|
8003e7e: 2b08 cmp r3, #8
|
|
8003e80: d827 bhi.n 8003ed2 <UART_SetConfig+0x142>
|
|
8003e82: a201 add r2, pc, #4 @ (adr r2, 8003e88 <UART_SetConfig+0xf8>)
|
|
8003e84: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8003e88: 08003ead .word 0x08003ead
|
|
8003e8c: 08003eb5 .word 0x08003eb5
|
|
8003e90: 08003ebd .word 0x08003ebd
|
|
8003e94: 08003ed3 .word 0x08003ed3
|
|
8003e98: 08003ec3 .word 0x08003ec3
|
|
8003e9c: 08003ed3 .word 0x08003ed3
|
|
8003ea0: 08003ed3 .word 0x08003ed3
|
|
8003ea4: 08003ed3 .word 0x08003ed3
|
|
8003ea8: 08003ecb .word 0x08003ecb
|
|
{
|
|
case UART_CLOCKSOURCE_PCLK1:
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
8003eac: f7ff fd4c bl 8003948 <HAL_RCC_GetPCLK1Freq>
|
|
8003eb0: 61b8 str r0, [r7, #24]
|
|
break;
|
|
8003eb2: e013 b.n 8003edc <UART_SetConfig+0x14c>
|
|
case UART_CLOCKSOURCE_PCLK2:
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
8003eb4: f7ff fd6a bl 800398c <HAL_RCC_GetPCLK2Freq>
|
|
8003eb8: 61b8 str r0, [r7, #24]
|
|
break;
|
|
8003eba: e00f b.n 8003edc <UART_SetConfig+0x14c>
|
|
case UART_CLOCKSOURCE_HSI:
|
|
pclk = (uint32_t) HSI_VALUE;
|
|
8003ebc: 4b4e ldr r3, [pc, #312] @ (8003ff8 <UART_SetConfig+0x268>)
|
|
8003ebe: 61bb str r3, [r7, #24]
|
|
break;
|
|
8003ec0: e00c b.n 8003edc <UART_SetConfig+0x14c>
|
|
case UART_CLOCKSOURCE_SYSCLK:
|
|
pclk = HAL_RCC_GetSysClockFreq();
|
|
8003ec2: f7ff fcc9 bl 8003858 <HAL_RCC_GetSysClockFreq>
|
|
8003ec6: 61b8 str r0, [r7, #24]
|
|
break;
|
|
8003ec8: e008 b.n 8003edc <UART_SetConfig+0x14c>
|
|
case UART_CLOCKSOURCE_LSE:
|
|
pclk = (uint32_t) LSE_VALUE;
|
|
8003eca: f44f 4300 mov.w r3, #32768 @ 0x8000
|
|
8003ece: 61bb str r3, [r7, #24]
|
|
break;
|
|
8003ed0: e004 b.n 8003edc <UART_SetConfig+0x14c>
|
|
default:
|
|
pclk = 0U;
|
|
8003ed2: 2300 movs r3, #0
|
|
8003ed4: 61bb str r3, [r7, #24]
|
|
ret = HAL_ERROR;
|
|
8003ed6: 2301 movs r3, #1
|
|
8003ed8: 77bb strb r3, [r7, #30]
|
|
break;
|
|
8003eda: bf00 nop
|
|
}
|
|
|
|
/* USARTDIV must be greater than or equal to 0d16 */
|
|
if (pclk != 0U)
|
|
8003edc: 69bb ldr r3, [r7, #24]
|
|
8003ede: 2b00 cmp r3, #0
|
|
8003ee0: d074 beq.n 8003fcc <UART_SetConfig+0x23c>
|
|
{
|
|
usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
|
|
8003ee2: 69bb ldr r3, [r7, #24]
|
|
8003ee4: 005a lsls r2, r3, #1
|
|
8003ee6: 687b ldr r3, [r7, #4]
|
|
8003ee8: 685b ldr r3, [r3, #4]
|
|
8003eea: 085b lsrs r3, r3, #1
|
|
8003eec: 441a add r2, r3
|
|
8003eee: 687b ldr r3, [r7, #4]
|
|
8003ef0: 685b ldr r3, [r3, #4]
|
|
8003ef2: fbb2 f3f3 udiv r3, r2, r3
|
|
8003ef6: 613b str r3, [r7, #16]
|
|
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
|
|
8003ef8: 693b ldr r3, [r7, #16]
|
|
8003efa: 2b0f cmp r3, #15
|
|
8003efc: d916 bls.n 8003f2c <UART_SetConfig+0x19c>
|
|
8003efe: 693b ldr r3, [r7, #16]
|
|
8003f00: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
|
|
8003f04: d212 bcs.n 8003f2c <UART_SetConfig+0x19c>
|
|
{
|
|
brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
|
|
8003f06: 693b ldr r3, [r7, #16]
|
|
8003f08: b29b uxth r3, r3
|
|
8003f0a: f023 030f bic.w r3, r3, #15
|
|
8003f0e: 81fb strh r3, [r7, #14]
|
|
brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
|
|
8003f10: 693b ldr r3, [r7, #16]
|
|
8003f12: 085b lsrs r3, r3, #1
|
|
8003f14: b29b uxth r3, r3
|
|
8003f16: f003 0307 and.w r3, r3, #7
|
|
8003f1a: b29a uxth r2, r3
|
|
8003f1c: 89fb ldrh r3, [r7, #14]
|
|
8003f1e: 4313 orrs r3, r2
|
|
8003f20: 81fb strh r3, [r7, #14]
|
|
huart->Instance->BRR = brrtemp;
|
|
8003f22: 687b ldr r3, [r7, #4]
|
|
8003f24: 681b ldr r3, [r3, #0]
|
|
8003f26: 89fa ldrh r2, [r7, #14]
|
|
8003f28: 60da str r2, [r3, #12]
|
|
8003f2a: e04f b.n 8003fcc <UART_SetConfig+0x23c>
|
|
}
|
|
else
|
|
{
|
|
ret = HAL_ERROR;
|
|
8003f2c: 2301 movs r3, #1
|
|
8003f2e: 77bb strb r3, [r7, #30]
|
|
8003f30: e04c b.n 8003fcc <UART_SetConfig+0x23c>
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
switch (clocksource)
|
|
8003f32: 7ffb ldrb r3, [r7, #31]
|
|
8003f34: 2b08 cmp r3, #8
|
|
8003f36: d828 bhi.n 8003f8a <UART_SetConfig+0x1fa>
|
|
8003f38: a201 add r2, pc, #4 @ (adr r2, 8003f40 <UART_SetConfig+0x1b0>)
|
|
8003f3a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8003f3e: bf00 nop
|
|
8003f40: 08003f65 .word 0x08003f65
|
|
8003f44: 08003f6d .word 0x08003f6d
|
|
8003f48: 08003f75 .word 0x08003f75
|
|
8003f4c: 08003f8b .word 0x08003f8b
|
|
8003f50: 08003f7b .word 0x08003f7b
|
|
8003f54: 08003f8b .word 0x08003f8b
|
|
8003f58: 08003f8b .word 0x08003f8b
|
|
8003f5c: 08003f8b .word 0x08003f8b
|
|
8003f60: 08003f83 .word 0x08003f83
|
|
{
|
|
case UART_CLOCKSOURCE_PCLK1:
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
8003f64: f7ff fcf0 bl 8003948 <HAL_RCC_GetPCLK1Freq>
|
|
8003f68: 61b8 str r0, [r7, #24]
|
|
break;
|
|
8003f6a: e013 b.n 8003f94 <UART_SetConfig+0x204>
|
|
case UART_CLOCKSOURCE_PCLK2:
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
8003f6c: f7ff fd0e bl 800398c <HAL_RCC_GetPCLK2Freq>
|
|
8003f70: 61b8 str r0, [r7, #24]
|
|
break;
|
|
8003f72: e00f b.n 8003f94 <UART_SetConfig+0x204>
|
|
case UART_CLOCKSOURCE_HSI:
|
|
pclk = (uint32_t) HSI_VALUE;
|
|
8003f74: 4b20 ldr r3, [pc, #128] @ (8003ff8 <UART_SetConfig+0x268>)
|
|
8003f76: 61bb str r3, [r7, #24]
|
|
break;
|
|
8003f78: e00c b.n 8003f94 <UART_SetConfig+0x204>
|
|
case UART_CLOCKSOURCE_SYSCLK:
|
|
pclk = HAL_RCC_GetSysClockFreq();
|
|
8003f7a: f7ff fc6d bl 8003858 <HAL_RCC_GetSysClockFreq>
|
|
8003f7e: 61b8 str r0, [r7, #24]
|
|
break;
|
|
8003f80: e008 b.n 8003f94 <UART_SetConfig+0x204>
|
|
case UART_CLOCKSOURCE_LSE:
|
|
pclk = (uint32_t) LSE_VALUE;
|
|
8003f82: f44f 4300 mov.w r3, #32768 @ 0x8000
|
|
8003f86: 61bb str r3, [r7, #24]
|
|
break;
|
|
8003f88: e004 b.n 8003f94 <UART_SetConfig+0x204>
|
|
default:
|
|
pclk = 0U;
|
|
8003f8a: 2300 movs r3, #0
|
|
8003f8c: 61bb str r3, [r7, #24]
|
|
ret = HAL_ERROR;
|
|
8003f8e: 2301 movs r3, #1
|
|
8003f90: 77bb strb r3, [r7, #30]
|
|
break;
|
|
8003f92: bf00 nop
|
|
}
|
|
|
|
if (pclk != 0U)
|
|
8003f94: 69bb ldr r3, [r7, #24]
|
|
8003f96: 2b00 cmp r3, #0
|
|
8003f98: d018 beq.n 8003fcc <UART_SetConfig+0x23c>
|
|
{
|
|
/* USARTDIV must be greater than or equal to 0d16 */
|
|
usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
|
|
8003f9a: 687b ldr r3, [r7, #4]
|
|
8003f9c: 685b ldr r3, [r3, #4]
|
|
8003f9e: 085a lsrs r2, r3, #1
|
|
8003fa0: 69bb ldr r3, [r7, #24]
|
|
8003fa2: 441a add r2, r3
|
|
8003fa4: 687b ldr r3, [r7, #4]
|
|
8003fa6: 685b ldr r3, [r3, #4]
|
|
8003fa8: fbb2 f3f3 udiv r3, r2, r3
|
|
8003fac: 613b str r3, [r7, #16]
|
|
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
|
|
8003fae: 693b ldr r3, [r7, #16]
|
|
8003fb0: 2b0f cmp r3, #15
|
|
8003fb2: d909 bls.n 8003fc8 <UART_SetConfig+0x238>
|
|
8003fb4: 693b ldr r3, [r7, #16]
|
|
8003fb6: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
|
|
8003fba: d205 bcs.n 8003fc8 <UART_SetConfig+0x238>
|
|
{
|
|
huart->Instance->BRR = (uint16_t)usartdiv;
|
|
8003fbc: 693b ldr r3, [r7, #16]
|
|
8003fbe: b29a uxth r2, r3
|
|
8003fc0: 687b ldr r3, [r7, #4]
|
|
8003fc2: 681b ldr r3, [r3, #0]
|
|
8003fc4: 60da str r2, [r3, #12]
|
|
8003fc6: e001 b.n 8003fcc <UART_SetConfig+0x23c>
|
|
}
|
|
else
|
|
{
|
|
ret = HAL_ERROR;
|
|
8003fc8: 2301 movs r3, #1
|
|
8003fca: 77bb strb r3, [r7, #30]
|
|
}
|
|
}
|
|
|
|
|
|
/* Clear ISR function pointers */
|
|
huart->RxISR = NULL;
|
|
8003fcc: 687b ldr r3, [r7, #4]
|
|
8003fce: 2200 movs r2, #0
|
|
8003fd0: 669a str r2, [r3, #104] @ 0x68
|
|
huart->TxISR = NULL;
|
|
8003fd2: 687b ldr r3, [r7, #4]
|
|
8003fd4: 2200 movs r2, #0
|
|
8003fd6: 66da str r2, [r3, #108] @ 0x6c
|
|
|
|
return ret;
|
|
8003fd8: 7fbb ldrb r3, [r7, #30]
|
|
}
|
|
8003fda: 4618 mov r0, r3
|
|
8003fdc: 3720 adds r7, #32
|
|
8003fde: 46bd mov sp, r7
|
|
8003fe0: bd80 pop {r7, pc}
|
|
8003fe2: bf00 nop
|
|
8003fe4: efff69f3 .word 0xefff69f3
|
|
8003fe8: 40013800 .word 0x40013800
|
|
8003fec: 40021000 .word 0x40021000
|
|
8003ff0: 40004400 .word 0x40004400
|
|
8003ff4: 40004800 .word 0x40004800
|
|
8003ff8: 007a1200 .word 0x007a1200
|
|
|
|
08003ffc <UART_AdvFeatureConfig>:
|
|
* @brief Configure the UART peripheral advanced features.
|
|
* @param huart UART handle.
|
|
* @retval None
|
|
*/
|
|
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
|
|
{
|
|
8003ffc: b480 push {r7}
|
|
8003ffe: b083 sub sp, #12
|
|
8004000: af00 add r7, sp, #0
|
|
8004002: 6078 str r0, [r7, #4]
|
|
/* Check whether the set of advanced features to configure is properly set */
|
|
assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
|
|
|
|
/* if required, configure TX pin active level inversion */
|
|
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
|
|
8004004: 687b ldr r3, [r7, #4]
|
|
8004006: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8004008: f003 0301 and.w r3, r3, #1
|
|
800400c: 2b00 cmp r3, #0
|
|
800400e: d00a beq.n 8004026 <UART_AdvFeatureConfig+0x2a>
|
|
{
|
|
assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
|
|
8004010: 687b ldr r3, [r7, #4]
|
|
8004012: 681b ldr r3, [r3, #0]
|
|
8004014: 685b ldr r3, [r3, #4]
|
|
8004016: f423 3100 bic.w r1, r3, #131072 @ 0x20000
|
|
800401a: 687b ldr r3, [r7, #4]
|
|
800401c: 6a9a ldr r2, [r3, #40] @ 0x28
|
|
800401e: 687b ldr r3, [r7, #4]
|
|
8004020: 681b ldr r3, [r3, #0]
|
|
8004022: 430a orrs r2, r1
|
|
8004024: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/* if required, configure RX pin active level inversion */
|
|
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
|
|
8004026: 687b ldr r3, [r7, #4]
|
|
8004028: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
800402a: f003 0302 and.w r3, r3, #2
|
|
800402e: 2b00 cmp r3, #0
|
|
8004030: d00a beq.n 8004048 <UART_AdvFeatureConfig+0x4c>
|
|
{
|
|
assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
|
|
8004032: 687b ldr r3, [r7, #4]
|
|
8004034: 681b ldr r3, [r3, #0]
|
|
8004036: 685b ldr r3, [r3, #4]
|
|
8004038: f423 3180 bic.w r1, r3, #65536 @ 0x10000
|
|
800403c: 687b ldr r3, [r7, #4]
|
|
800403e: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
8004040: 687b ldr r3, [r7, #4]
|
|
8004042: 681b ldr r3, [r3, #0]
|
|
8004044: 430a orrs r2, r1
|
|
8004046: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/* if required, configure data inversion */
|
|
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
|
|
8004048: 687b ldr r3, [r7, #4]
|
|
800404a: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
800404c: f003 0304 and.w r3, r3, #4
|
|
8004050: 2b00 cmp r3, #0
|
|
8004052: d00a beq.n 800406a <UART_AdvFeatureConfig+0x6e>
|
|
{
|
|
assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
|
|
8004054: 687b ldr r3, [r7, #4]
|
|
8004056: 681b ldr r3, [r3, #0]
|
|
8004058: 685b ldr r3, [r3, #4]
|
|
800405a: f423 2180 bic.w r1, r3, #262144 @ 0x40000
|
|
800405e: 687b ldr r3, [r7, #4]
|
|
8004060: 6b1a ldr r2, [r3, #48] @ 0x30
|
|
8004062: 687b ldr r3, [r7, #4]
|
|
8004064: 681b ldr r3, [r3, #0]
|
|
8004066: 430a orrs r2, r1
|
|
8004068: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/* if required, configure RX/TX pins swap */
|
|
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
|
|
800406a: 687b ldr r3, [r7, #4]
|
|
800406c: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
800406e: f003 0308 and.w r3, r3, #8
|
|
8004072: 2b00 cmp r3, #0
|
|
8004074: d00a beq.n 800408c <UART_AdvFeatureConfig+0x90>
|
|
{
|
|
assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
|
|
8004076: 687b ldr r3, [r7, #4]
|
|
8004078: 681b ldr r3, [r3, #0]
|
|
800407a: 685b ldr r3, [r3, #4]
|
|
800407c: f423 4100 bic.w r1, r3, #32768 @ 0x8000
|
|
8004080: 687b ldr r3, [r7, #4]
|
|
8004082: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8004084: 687b ldr r3, [r7, #4]
|
|
8004086: 681b ldr r3, [r3, #0]
|
|
8004088: 430a orrs r2, r1
|
|
800408a: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/* if required, configure RX overrun detection disabling */
|
|
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
|
|
800408c: 687b ldr r3, [r7, #4]
|
|
800408e: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8004090: f003 0310 and.w r3, r3, #16
|
|
8004094: 2b00 cmp r3, #0
|
|
8004096: d00a beq.n 80040ae <UART_AdvFeatureConfig+0xb2>
|
|
{
|
|
assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
|
|
MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
|
|
8004098: 687b ldr r3, [r7, #4]
|
|
800409a: 681b ldr r3, [r3, #0]
|
|
800409c: 689b ldr r3, [r3, #8]
|
|
800409e: f423 5180 bic.w r1, r3, #4096 @ 0x1000
|
|
80040a2: 687b ldr r3, [r7, #4]
|
|
80040a4: 6b9a ldr r2, [r3, #56] @ 0x38
|
|
80040a6: 687b ldr r3, [r7, #4]
|
|
80040a8: 681b ldr r3, [r3, #0]
|
|
80040aa: 430a orrs r2, r1
|
|
80040ac: 609a str r2, [r3, #8]
|
|
}
|
|
|
|
/* if required, configure DMA disabling on reception error */
|
|
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
|
|
80040ae: 687b ldr r3, [r7, #4]
|
|
80040b0: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80040b2: f003 0320 and.w r3, r3, #32
|
|
80040b6: 2b00 cmp r3, #0
|
|
80040b8: d00a beq.n 80040d0 <UART_AdvFeatureConfig+0xd4>
|
|
{
|
|
assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
|
|
MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
|
|
80040ba: 687b ldr r3, [r7, #4]
|
|
80040bc: 681b ldr r3, [r3, #0]
|
|
80040be: 689b ldr r3, [r3, #8]
|
|
80040c0: f423 5100 bic.w r1, r3, #8192 @ 0x2000
|
|
80040c4: 687b ldr r3, [r7, #4]
|
|
80040c6: 6bda ldr r2, [r3, #60] @ 0x3c
|
|
80040c8: 687b ldr r3, [r7, #4]
|
|
80040ca: 681b ldr r3, [r3, #0]
|
|
80040cc: 430a orrs r2, r1
|
|
80040ce: 609a str r2, [r3, #8]
|
|
}
|
|
|
|
/* if required, configure auto Baud rate detection scheme */
|
|
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
|
|
80040d0: 687b ldr r3, [r7, #4]
|
|
80040d2: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80040d4: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
80040d8: 2b00 cmp r3, #0
|
|
80040da: d01a beq.n 8004112 <UART_AdvFeatureConfig+0x116>
|
|
{
|
|
assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
|
|
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
|
|
80040dc: 687b ldr r3, [r7, #4]
|
|
80040de: 681b ldr r3, [r3, #0]
|
|
80040e0: 685b ldr r3, [r3, #4]
|
|
80040e2: f423 1180 bic.w r1, r3, #1048576 @ 0x100000
|
|
80040e6: 687b ldr r3, [r7, #4]
|
|
80040e8: 6c1a ldr r2, [r3, #64] @ 0x40
|
|
80040ea: 687b ldr r3, [r7, #4]
|
|
80040ec: 681b ldr r3, [r3, #0]
|
|
80040ee: 430a orrs r2, r1
|
|
80040f0: 605a str r2, [r3, #4]
|
|
/* set auto Baudrate detection parameters if detection is enabled */
|
|
if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
|
|
80040f2: 687b ldr r3, [r7, #4]
|
|
80040f4: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
80040f6: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
|
|
80040fa: d10a bne.n 8004112 <UART_AdvFeatureConfig+0x116>
|
|
{
|
|
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
|
|
80040fc: 687b ldr r3, [r7, #4]
|
|
80040fe: 681b ldr r3, [r3, #0]
|
|
8004100: 685b ldr r3, [r3, #4]
|
|
8004102: f423 01c0 bic.w r1, r3, #6291456 @ 0x600000
|
|
8004106: 687b ldr r3, [r7, #4]
|
|
8004108: 6c5a ldr r2, [r3, #68] @ 0x44
|
|
800410a: 687b ldr r3, [r7, #4]
|
|
800410c: 681b ldr r3, [r3, #0]
|
|
800410e: 430a orrs r2, r1
|
|
8004110: 605a str r2, [r3, #4]
|
|
}
|
|
}
|
|
|
|
/* if required, configure MSB first on communication line */
|
|
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
|
|
8004112: 687b ldr r3, [r7, #4]
|
|
8004114: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8004116: f003 0380 and.w r3, r3, #128 @ 0x80
|
|
800411a: 2b00 cmp r3, #0
|
|
800411c: d00a beq.n 8004134 <UART_AdvFeatureConfig+0x138>
|
|
{
|
|
assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
|
|
800411e: 687b ldr r3, [r7, #4]
|
|
8004120: 681b ldr r3, [r3, #0]
|
|
8004122: 685b ldr r3, [r3, #4]
|
|
8004124: f423 2100 bic.w r1, r3, #524288 @ 0x80000
|
|
8004128: 687b ldr r3, [r7, #4]
|
|
800412a: 6c9a ldr r2, [r3, #72] @ 0x48
|
|
800412c: 687b ldr r3, [r7, #4]
|
|
800412e: 681b ldr r3, [r3, #0]
|
|
8004130: 430a orrs r2, r1
|
|
8004132: 605a str r2, [r3, #4]
|
|
}
|
|
}
|
|
8004134: bf00 nop
|
|
8004136: 370c adds r7, #12
|
|
8004138: 46bd mov sp, r7
|
|
800413a: f85d 7b04 ldr.w r7, [sp], #4
|
|
800413e: 4770 bx lr
|
|
|
|
08004140 <UART_CheckIdleState>:
|
|
* @brief Check the UART Idle State.
|
|
* @param huart UART handle.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
|
|
{
|
|
8004140: b580 push {r7, lr}
|
|
8004142: b098 sub sp, #96 @ 0x60
|
|
8004144: af02 add r7, sp, #8
|
|
8004146: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart;
|
|
|
|
/* Initialize the UART ErrorCode */
|
|
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
|
8004148: 687b ldr r3, [r7, #4]
|
|
800414a: 2200 movs r2, #0
|
|
800414c: f8c3 2084 str.w r2, [r3, #132] @ 0x84
|
|
|
|
/* Init tickstart for timeout management */
|
|
tickstart = HAL_GetTick();
|
|
8004150: f7fc fa52 bl 80005f8 <HAL_GetTick>
|
|
8004154: 6578 str r0, [r7, #84] @ 0x54
|
|
|
|
/* Check if the Transmitter is enabled */
|
|
if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
|
|
8004156: 687b ldr r3, [r7, #4]
|
|
8004158: 681b ldr r3, [r3, #0]
|
|
800415a: 681b ldr r3, [r3, #0]
|
|
800415c: f003 0308 and.w r3, r3, #8
|
|
8004160: 2b08 cmp r3, #8
|
|
8004162: d12e bne.n 80041c2 <UART_CheckIdleState+0x82>
|
|
{
|
|
/* Wait until TEACK flag is set */
|
|
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
|
|
8004164: f06f 437e mvn.w r3, #4261412864 @ 0xfe000000
|
|
8004168: 9300 str r3, [sp, #0]
|
|
800416a: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
800416c: 2200 movs r2, #0
|
|
800416e: f44f 1100 mov.w r1, #2097152 @ 0x200000
|
|
8004172: 6878 ldr r0, [r7, #4]
|
|
8004174: f000 f88c bl 8004290 <UART_WaitOnFlagUntilTimeout>
|
|
8004178: 4603 mov r3, r0
|
|
800417a: 2b00 cmp r3, #0
|
|
800417c: d021 beq.n 80041c2 <UART_CheckIdleState+0x82>
|
|
{
|
|
/* Disable TXE interrupt for the interrupt process */
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE));
|
|
800417e: 687b ldr r3, [r7, #4]
|
|
8004180: 681b ldr r3, [r3, #0]
|
|
8004182: 63bb str r3, [r7, #56] @ 0x38
|
|
*/
|
|
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
|
|
{
|
|
uint32_t result;
|
|
|
|
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|
8004184: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8004186: e853 3f00 ldrex r3, [r3]
|
|
800418a: 637b str r3, [r7, #52] @ 0x34
|
|
return(result);
|
|
800418c: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
800418e: f023 0380 bic.w r3, r3, #128 @ 0x80
|
|
8004192: 653b str r3, [r7, #80] @ 0x50
|
|
8004194: 687b ldr r3, [r7, #4]
|
|
8004196: 681b ldr r3, [r3, #0]
|
|
8004198: 461a mov r2, r3
|
|
800419a: 6d3b ldr r3, [r7, #80] @ 0x50
|
|
800419c: 647b str r3, [r7, #68] @ 0x44
|
|
800419e: 643a str r2, [r7, #64] @ 0x40
|
|
*/
|
|
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
|
|
{
|
|
uint32_t result;
|
|
|
|
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|
80041a0: 6c39 ldr r1, [r7, #64] @ 0x40
|
|
80041a2: 6c7a ldr r2, [r7, #68] @ 0x44
|
|
80041a4: e841 2300 strex r3, r2, [r1]
|
|
80041a8: 63fb str r3, [r7, #60] @ 0x3c
|
|
return(result);
|
|
80041aa: 6bfb ldr r3, [r7, #60] @ 0x3c
|
|
80041ac: 2b00 cmp r3, #0
|
|
80041ae: d1e6 bne.n 800417e <UART_CheckIdleState+0x3e>
|
|
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
80041b0: 687b ldr r3, [r7, #4]
|
|
80041b2: 2220 movs r2, #32
|
|
80041b4: 67da str r2, [r3, #124] @ 0x7c
|
|
|
|
__HAL_UNLOCK(huart);
|
|
80041b6: 687b ldr r3, [r7, #4]
|
|
80041b8: 2200 movs r2, #0
|
|
80041ba: f883 2078 strb.w r2, [r3, #120] @ 0x78
|
|
|
|
/* Timeout occurred */
|
|
return HAL_TIMEOUT;
|
|
80041be: 2303 movs r3, #3
|
|
80041c0: e062 b.n 8004288 <UART_CheckIdleState+0x148>
|
|
}
|
|
}
|
|
|
|
/* Check if the Receiver is enabled */
|
|
if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
|
|
80041c2: 687b ldr r3, [r7, #4]
|
|
80041c4: 681b ldr r3, [r3, #0]
|
|
80041c6: 681b ldr r3, [r3, #0]
|
|
80041c8: f003 0304 and.w r3, r3, #4
|
|
80041cc: 2b04 cmp r3, #4
|
|
80041ce: d149 bne.n 8004264 <UART_CheckIdleState+0x124>
|
|
{
|
|
/* Wait until REACK flag is set */
|
|
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
|
|
80041d0: f06f 437e mvn.w r3, #4261412864 @ 0xfe000000
|
|
80041d4: 9300 str r3, [sp, #0]
|
|
80041d6: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
80041d8: 2200 movs r2, #0
|
|
80041da: f44f 0180 mov.w r1, #4194304 @ 0x400000
|
|
80041de: 6878 ldr r0, [r7, #4]
|
|
80041e0: f000 f856 bl 8004290 <UART_WaitOnFlagUntilTimeout>
|
|
80041e4: 4603 mov r3, r0
|
|
80041e6: 2b00 cmp r3, #0
|
|
80041e8: d03c beq.n 8004264 <UART_CheckIdleState+0x124>
|
|
{
|
|
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
|
|
interrupts for the interrupt process */
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
|
|
80041ea: 687b ldr r3, [r7, #4]
|
|
80041ec: 681b ldr r3, [r3, #0]
|
|
80041ee: 627b str r3, [r7, #36] @ 0x24
|
|
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|
80041f0: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80041f2: e853 3f00 ldrex r3, [r3]
|
|
80041f6: 623b str r3, [r7, #32]
|
|
return(result);
|
|
80041f8: 6a3b ldr r3, [r7, #32]
|
|
80041fa: f423 7390 bic.w r3, r3, #288 @ 0x120
|
|
80041fe: 64fb str r3, [r7, #76] @ 0x4c
|
|
8004200: 687b ldr r3, [r7, #4]
|
|
8004202: 681b ldr r3, [r3, #0]
|
|
8004204: 461a mov r2, r3
|
|
8004206: 6cfb ldr r3, [r7, #76] @ 0x4c
|
|
8004208: 633b str r3, [r7, #48] @ 0x30
|
|
800420a: 62fa str r2, [r7, #44] @ 0x2c
|
|
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|
800420c: 6af9 ldr r1, [r7, #44] @ 0x2c
|
|
800420e: 6b3a ldr r2, [r7, #48] @ 0x30
|
|
8004210: e841 2300 strex r3, r2, [r1]
|
|
8004214: 62bb str r3, [r7, #40] @ 0x28
|
|
return(result);
|
|
8004216: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8004218: 2b00 cmp r3, #0
|
|
800421a: d1e6 bne.n 80041ea <UART_CheckIdleState+0xaa>
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
|
800421c: 687b ldr r3, [r7, #4]
|
|
800421e: 681b ldr r3, [r3, #0]
|
|
8004220: 3308 adds r3, #8
|
|
8004222: 613b str r3, [r7, #16]
|
|
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|
8004224: 693b ldr r3, [r7, #16]
|
|
8004226: e853 3f00 ldrex r3, [r3]
|
|
800422a: 60fb str r3, [r7, #12]
|
|
return(result);
|
|
800422c: 68fb ldr r3, [r7, #12]
|
|
800422e: f023 0301 bic.w r3, r3, #1
|
|
8004232: 64bb str r3, [r7, #72] @ 0x48
|
|
8004234: 687b ldr r3, [r7, #4]
|
|
8004236: 681b ldr r3, [r3, #0]
|
|
8004238: 3308 adds r3, #8
|
|
800423a: 6cba ldr r2, [r7, #72] @ 0x48
|
|
800423c: 61fa str r2, [r7, #28]
|
|
800423e: 61bb str r3, [r7, #24]
|
|
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|
8004240: 69b9 ldr r1, [r7, #24]
|
|
8004242: 69fa ldr r2, [r7, #28]
|
|
8004244: e841 2300 strex r3, r2, [r1]
|
|
8004248: 617b str r3, [r7, #20]
|
|
return(result);
|
|
800424a: 697b ldr r3, [r7, #20]
|
|
800424c: 2b00 cmp r3, #0
|
|
800424e: d1e5 bne.n 800421c <UART_CheckIdleState+0xdc>
|
|
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
8004250: 687b ldr r3, [r7, #4]
|
|
8004252: 2220 movs r2, #32
|
|
8004254: f8c3 2080 str.w r2, [r3, #128] @ 0x80
|
|
|
|
__HAL_UNLOCK(huart);
|
|
8004258: 687b ldr r3, [r7, #4]
|
|
800425a: 2200 movs r2, #0
|
|
800425c: f883 2078 strb.w r2, [r3, #120] @ 0x78
|
|
|
|
/* Timeout occurred */
|
|
return HAL_TIMEOUT;
|
|
8004260: 2303 movs r3, #3
|
|
8004262: e011 b.n 8004288 <UART_CheckIdleState+0x148>
|
|
}
|
|
}
|
|
|
|
/* Initialize the UART State */
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8004264: 687b ldr r3, [r7, #4]
|
|
8004266: 2220 movs r2, #32
|
|
8004268: 67da str r2, [r3, #124] @ 0x7c
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
800426a: 687b ldr r3, [r7, #4]
|
|
800426c: 2220 movs r2, #32
|
|
800426e: f8c3 2080 str.w r2, [r3, #128] @ 0x80
|
|
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
|
8004272: 687b ldr r3, [r7, #4]
|
|
8004274: 2200 movs r2, #0
|
|
8004276: 661a str r2, [r3, #96] @ 0x60
|
|
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
|
8004278: 687b ldr r3, [r7, #4]
|
|
800427a: 2200 movs r2, #0
|
|
800427c: 665a str r2, [r3, #100] @ 0x64
|
|
|
|
__HAL_UNLOCK(huart);
|
|
800427e: 687b ldr r3, [r7, #4]
|
|
8004280: 2200 movs r2, #0
|
|
8004282: f883 2078 strb.w r2, [r3, #120] @ 0x78
|
|
|
|
return HAL_OK;
|
|
8004286: 2300 movs r3, #0
|
|
}
|
|
8004288: 4618 mov r0, r3
|
|
800428a: 3758 adds r7, #88 @ 0x58
|
|
800428c: 46bd mov sp, r7
|
|
800428e: bd80 pop {r7, pc}
|
|
|
|
08004290 <UART_WaitOnFlagUntilTimeout>:
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
|
|
uint32_t Tickstart, uint32_t Timeout)
|
|
{
|
|
8004290: b580 push {r7, lr}
|
|
8004292: b084 sub sp, #16
|
|
8004294: af00 add r7, sp, #0
|
|
8004296: 60f8 str r0, [r7, #12]
|
|
8004298: 60b9 str r1, [r7, #8]
|
|
800429a: 603b str r3, [r7, #0]
|
|
800429c: 4613 mov r3, r2
|
|
800429e: 71fb strb r3, [r7, #7]
|
|
/* Wait until flag is set */
|
|
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
|
|
80042a0: e049 b.n 8004336 <UART_WaitOnFlagUntilTimeout+0xa6>
|
|
{
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
80042a2: 69bb ldr r3, [r7, #24]
|
|
80042a4: f1b3 3fff cmp.w r3, #4294967295
|
|
80042a8: d045 beq.n 8004336 <UART_WaitOnFlagUntilTimeout+0xa6>
|
|
{
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
80042aa: f7fc f9a5 bl 80005f8 <HAL_GetTick>
|
|
80042ae: 4602 mov r2, r0
|
|
80042b0: 683b ldr r3, [r7, #0]
|
|
80042b2: 1ad3 subs r3, r2, r3
|
|
80042b4: 69ba ldr r2, [r7, #24]
|
|
80042b6: 429a cmp r2, r3
|
|
80042b8: d302 bcc.n 80042c0 <UART_WaitOnFlagUntilTimeout+0x30>
|
|
80042ba: 69bb ldr r3, [r7, #24]
|
|
80042bc: 2b00 cmp r3, #0
|
|
80042be: d101 bne.n 80042c4 <UART_WaitOnFlagUntilTimeout+0x34>
|
|
{
|
|
|
|
return HAL_TIMEOUT;
|
|
80042c0: 2303 movs r3, #3
|
|
80042c2: e048 b.n 8004356 <UART_WaitOnFlagUntilTimeout+0xc6>
|
|
}
|
|
|
|
if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
|
|
80042c4: 68fb ldr r3, [r7, #12]
|
|
80042c6: 681b ldr r3, [r3, #0]
|
|
80042c8: 681b ldr r3, [r3, #0]
|
|
80042ca: f003 0304 and.w r3, r3, #4
|
|
80042ce: 2b00 cmp r3, #0
|
|
80042d0: d031 beq.n 8004336 <UART_WaitOnFlagUntilTimeout+0xa6>
|
|
{
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
|
|
80042d2: 68fb ldr r3, [r7, #12]
|
|
80042d4: 681b ldr r3, [r3, #0]
|
|
80042d6: 69db ldr r3, [r3, #28]
|
|
80042d8: f003 0308 and.w r3, r3, #8
|
|
80042dc: 2b08 cmp r3, #8
|
|
80042de: d110 bne.n 8004302 <UART_WaitOnFlagUntilTimeout+0x72>
|
|
{
|
|
/* Clear Overrun Error flag*/
|
|
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
|
|
80042e0: 68fb ldr r3, [r7, #12]
|
|
80042e2: 681b ldr r3, [r3, #0]
|
|
80042e4: 2208 movs r2, #8
|
|
80042e6: 621a str r2, [r3, #32]
|
|
|
|
/* Blocking error : transfer is aborted
|
|
Set the UART state ready to be able to start again the process,
|
|
Disable Rx Interrupts if ongoing */
|
|
UART_EndRxTransfer(huart);
|
|
80042e8: 68f8 ldr r0, [r7, #12]
|
|
80042ea: f000 f838 bl 800435e <UART_EndRxTransfer>
|
|
|
|
huart->ErrorCode = HAL_UART_ERROR_ORE;
|
|
80042ee: 68fb ldr r3, [r7, #12]
|
|
80042f0: 2208 movs r2, #8
|
|
80042f2: f8c3 2084 str.w r2, [r3, #132] @ 0x84
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(huart);
|
|
80042f6: 68fb ldr r3, [r7, #12]
|
|
80042f8: 2200 movs r2, #0
|
|
80042fa: f883 2078 strb.w r2, [r3, #120] @ 0x78
|
|
|
|
return HAL_ERROR;
|
|
80042fe: 2301 movs r3, #1
|
|
8004300: e029 b.n 8004356 <UART_WaitOnFlagUntilTimeout+0xc6>
|
|
}
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
|
|
8004302: 68fb ldr r3, [r7, #12]
|
|
8004304: 681b ldr r3, [r3, #0]
|
|
8004306: 69db ldr r3, [r3, #28]
|
|
8004308: f403 6300 and.w r3, r3, #2048 @ 0x800
|
|
800430c: f5b3 6f00 cmp.w r3, #2048 @ 0x800
|
|
8004310: d111 bne.n 8004336 <UART_WaitOnFlagUntilTimeout+0xa6>
|
|
{
|
|
/* Clear Receiver Timeout flag*/
|
|
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
|
|
8004312: 68fb ldr r3, [r7, #12]
|
|
8004314: 681b ldr r3, [r3, #0]
|
|
8004316: f44f 6200 mov.w r2, #2048 @ 0x800
|
|
800431a: 621a str r2, [r3, #32]
|
|
|
|
/* Blocking error : transfer is aborted
|
|
Set the UART state ready to be able to start again the process,
|
|
Disable Rx Interrupts if ongoing */
|
|
UART_EndRxTransfer(huart);
|
|
800431c: 68f8 ldr r0, [r7, #12]
|
|
800431e: f000 f81e bl 800435e <UART_EndRxTransfer>
|
|
|
|
huart->ErrorCode = HAL_UART_ERROR_RTO;
|
|
8004322: 68fb ldr r3, [r7, #12]
|
|
8004324: 2220 movs r2, #32
|
|
8004326: f8c3 2084 str.w r2, [r3, #132] @ 0x84
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(huart);
|
|
800432a: 68fb ldr r3, [r7, #12]
|
|
800432c: 2200 movs r2, #0
|
|
800432e: f883 2078 strb.w r2, [r3, #120] @ 0x78
|
|
|
|
return HAL_TIMEOUT;
|
|
8004332: 2303 movs r3, #3
|
|
8004334: e00f b.n 8004356 <UART_WaitOnFlagUntilTimeout+0xc6>
|
|
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
|
|
8004336: 68fb ldr r3, [r7, #12]
|
|
8004338: 681b ldr r3, [r3, #0]
|
|
800433a: 69da ldr r2, [r3, #28]
|
|
800433c: 68bb ldr r3, [r7, #8]
|
|
800433e: 4013 ands r3, r2
|
|
8004340: 68ba ldr r2, [r7, #8]
|
|
8004342: 429a cmp r2, r3
|
|
8004344: bf0c ite eq
|
|
8004346: 2301 moveq r3, #1
|
|
8004348: 2300 movne r3, #0
|
|
800434a: b2db uxtb r3, r3
|
|
800434c: 461a mov r2, r3
|
|
800434e: 79fb ldrb r3, [r7, #7]
|
|
8004350: 429a cmp r2, r3
|
|
8004352: d0a6 beq.n 80042a2 <UART_WaitOnFlagUntilTimeout+0x12>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
8004354: 2300 movs r3, #0
|
|
}
|
|
8004356: 4618 mov r0, r3
|
|
8004358: 3710 adds r7, #16
|
|
800435a: 46bd mov sp, r7
|
|
800435c: bd80 pop {r7, pc}
|
|
|
|
0800435e <UART_EndRxTransfer>:
|
|
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
|
|
* @param huart UART handle.
|
|
* @retval None
|
|
*/
|
|
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
|
|
{
|
|
800435e: b480 push {r7}
|
|
8004360: b095 sub sp, #84 @ 0x54
|
|
8004362: af00 add r7, sp, #0
|
|
8004364: 6078 str r0, [r7, #4]
|
|
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
|
|
8004366: 687b ldr r3, [r7, #4]
|
|
8004368: 681b ldr r3, [r3, #0]
|
|
800436a: 637b str r3, [r7, #52] @ 0x34
|
|
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|
800436c: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
800436e: e853 3f00 ldrex r3, [r3]
|
|
8004372: 633b str r3, [r7, #48] @ 0x30
|
|
return(result);
|
|
8004374: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
8004376: f423 7390 bic.w r3, r3, #288 @ 0x120
|
|
800437a: 64fb str r3, [r7, #76] @ 0x4c
|
|
800437c: 687b ldr r3, [r7, #4]
|
|
800437e: 681b ldr r3, [r3, #0]
|
|
8004380: 461a mov r2, r3
|
|
8004382: 6cfb ldr r3, [r7, #76] @ 0x4c
|
|
8004384: 643b str r3, [r7, #64] @ 0x40
|
|
8004386: 63fa str r2, [r7, #60] @ 0x3c
|
|
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|
8004388: 6bf9 ldr r1, [r7, #60] @ 0x3c
|
|
800438a: 6c3a ldr r2, [r7, #64] @ 0x40
|
|
800438c: e841 2300 strex r3, r2, [r1]
|
|
8004390: 63bb str r3, [r7, #56] @ 0x38
|
|
return(result);
|
|
8004392: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8004394: 2b00 cmp r3, #0
|
|
8004396: d1e6 bne.n 8004366 <UART_EndRxTransfer+0x8>
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
|
8004398: 687b ldr r3, [r7, #4]
|
|
800439a: 681b ldr r3, [r3, #0]
|
|
800439c: 3308 adds r3, #8
|
|
800439e: 623b str r3, [r7, #32]
|
|
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|
80043a0: 6a3b ldr r3, [r7, #32]
|
|
80043a2: e853 3f00 ldrex r3, [r3]
|
|
80043a6: 61fb str r3, [r7, #28]
|
|
return(result);
|
|
80043a8: 69fb ldr r3, [r7, #28]
|
|
80043aa: f023 0301 bic.w r3, r3, #1
|
|
80043ae: 64bb str r3, [r7, #72] @ 0x48
|
|
80043b0: 687b ldr r3, [r7, #4]
|
|
80043b2: 681b ldr r3, [r3, #0]
|
|
80043b4: 3308 adds r3, #8
|
|
80043b6: 6cba ldr r2, [r7, #72] @ 0x48
|
|
80043b8: 62fa str r2, [r7, #44] @ 0x2c
|
|
80043ba: 62bb str r3, [r7, #40] @ 0x28
|
|
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|
80043bc: 6ab9 ldr r1, [r7, #40] @ 0x28
|
|
80043be: 6afa ldr r2, [r7, #44] @ 0x2c
|
|
80043c0: e841 2300 strex r3, r2, [r1]
|
|
80043c4: 627b str r3, [r7, #36] @ 0x24
|
|
return(result);
|
|
80043c6: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80043c8: 2b00 cmp r3, #0
|
|
80043ca: d1e5 bne.n 8004398 <UART_EndRxTransfer+0x3a>
|
|
|
|
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
|
|
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
|
80043cc: 687b ldr r3, [r7, #4]
|
|
80043ce: 6e1b ldr r3, [r3, #96] @ 0x60
|
|
80043d0: 2b01 cmp r3, #1
|
|
80043d2: d118 bne.n 8004406 <UART_EndRxTransfer+0xa8>
|
|
{
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
|
80043d4: 687b ldr r3, [r7, #4]
|
|
80043d6: 681b ldr r3, [r3, #0]
|
|
80043d8: 60fb str r3, [r7, #12]
|
|
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|
80043da: 68fb ldr r3, [r7, #12]
|
|
80043dc: e853 3f00 ldrex r3, [r3]
|
|
80043e0: 60bb str r3, [r7, #8]
|
|
return(result);
|
|
80043e2: 68bb ldr r3, [r7, #8]
|
|
80043e4: f023 0310 bic.w r3, r3, #16
|
|
80043e8: 647b str r3, [r7, #68] @ 0x44
|
|
80043ea: 687b ldr r3, [r7, #4]
|
|
80043ec: 681b ldr r3, [r3, #0]
|
|
80043ee: 461a mov r2, r3
|
|
80043f0: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
80043f2: 61bb str r3, [r7, #24]
|
|
80043f4: 617a str r2, [r7, #20]
|
|
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|
80043f6: 6979 ldr r1, [r7, #20]
|
|
80043f8: 69ba ldr r2, [r7, #24]
|
|
80043fa: e841 2300 strex r3, r2, [r1]
|
|
80043fe: 613b str r3, [r7, #16]
|
|
return(result);
|
|
8004400: 693b ldr r3, [r7, #16]
|
|
8004402: 2b00 cmp r3, #0
|
|
8004404: d1e6 bne.n 80043d4 <UART_EndRxTransfer+0x76>
|
|
}
|
|
|
|
/* At end of Rx process, restore huart->RxState to Ready */
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
8004406: 687b ldr r3, [r7, #4]
|
|
8004408: 2220 movs r2, #32
|
|
800440a: f8c3 2080 str.w r2, [r3, #128] @ 0x80
|
|
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
|
800440e: 687b ldr r3, [r7, #4]
|
|
8004410: 2200 movs r2, #0
|
|
8004412: 661a str r2, [r3, #96] @ 0x60
|
|
|
|
/* Reset RxIsr function pointer */
|
|
huart->RxISR = NULL;
|
|
8004414: 687b ldr r3, [r7, #4]
|
|
8004416: 2200 movs r2, #0
|
|
8004418: 669a str r2, [r3, #104] @ 0x68
|
|
}
|
|
800441a: bf00 nop
|
|
800441c: 3754 adds r7, #84 @ 0x54
|
|
800441e: 46bd mov sp, r7
|
|
8004420: f85d 7b04 ldr.w r7, [sp], #4
|
|
8004424: 4770 bx lr
|
|
|
|
08004426 <USB_EnableGlobalInt>:
|
|
* Enables the controller's Global Int in the AHB Config reg
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
|
|
{
|
|
8004426: b480 push {r7}
|
|
8004428: b085 sub sp, #20
|
|
800442a: af00 add r7, sp, #0
|
|
800442c: 6078 str r0, [r7, #4]
|
|
uint32_t winterruptmask;
|
|
|
|
/* Clear pending interrupts */
|
|
USBx->ISTR = 0U;
|
|
800442e: 687b ldr r3, [r7, #4]
|
|
8004430: 2200 movs r2, #0
|
|
8004432: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
|
|
|
|
/* Set winterruptmask variable */
|
|
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
|
|
8004436: f44f 433f mov.w r3, #48896 @ 0xbf00
|
|
800443a: 60fb str r3, [r7, #12]
|
|
USB_CNTR_SUSPM | USB_CNTR_ERRM |
|
|
USB_CNTR_SOFM | USB_CNTR_ESOFM |
|
|
USB_CNTR_RESETM;
|
|
|
|
/* Set interrupt mask */
|
|
USBx->CNTR = (uint16_t)winterruptmask;
|
|
800443c: 68fb ldr r3, [r7, #12]
|
|
800443e: b29a uxth r2, r3
|
|
8004440: 687b ldr r3, [r7, #4]
|
|
8004442: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
|
|
|
|
return HAL_OK;
|
|
8004446: 2300 movs r3, #0
|
|
}
|
|
8004448: 4618 mov r0, r3
|
|
800444a: 3714 adds r7, #20
|
|
800444c: 46bd mov sp, r7
|
|
800444e: f85d 7b04 ldr.w r7, [sp], #4
|
|
8004452: 4770 bx lr
|
|
|
|
08004454 <USB_DisableGlobalInt>:
|
|
* Disable the controller's Global Int in the AHB Config reg
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
|
|
{
|
|
8004454: b480 push {r7}
|
|
8004456: b085 sub sp, #20
|
|
8004458: af00 add r7, sp, #0
|
|
800445a: 6078 str r0, [r7, #4]
|
|
uint32_t winterruptmask;
|
|
|
|
/* Set winterruptmask variable */
|
|
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
|
|
800445c: f44f 433f mov.w r3, #48896 @ 0xbf00
|
|
8004460: 60fb str r3, [r7, #12]
|
|
USB_CNTR_SUSPM | USB_CNTR_ERRM |
|
|
USB_CNTR_SOFM | USB_CNTR_ESOFM |
|
|
USB_CNTR_RESETM;
|
|
|
|
/* Clear interrupt mask */
|
|
USBx->CNTR &= (uint16_t)(~winterruptmask);
|
|
8004462: 687b ldr r3, [r7, #4]
|
|
8004464: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
|
|
8004468: b29a uxth r2, r3
|
|
800446a: 68fb ldr r3, [r7, #12]
|
|
800446c: b29b uxth r3, r3
|
|
800446e: 43db mvns r3, r3
|
|
8004470: b29b uxth r3, r3
|
|
8004472: 4013 ands r3, r2
|
|
8004474: b29a uxth r2, r3
|
|
8004476: 687b ldr r3, [r7, #4]
|
|
8004478: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
|
|
|
|
return HAL_OK;
|
|
800447c: 2300 movs r3, #0
|
|
}
|
|
800447e: 4618 mov r0, r3
|
|
8004480: 3714 adds r7, #20
|
|
8004482: 46bd mov sp, r7
|
|
8004484: f85d 7b04 ldr.w r7, [sp], #4
|
|
8004488: 4770 bx lr
|
|
|
|
0800448a <USB_DevInit>:
|
|
* @param cfg pointer to a USB_CfgTypeDef structure that contains
|
|
* the configuration information for the specified USBx peripheral.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
|
|
{
|
|
800448a: b084 sub sp, #16
|
|
800448c: b480 push {r7}
|
|
800448e: b083 sub sp, #12
|
|
8004490: af00 add r7, sp, #0
|
|
8004492: 6078 str r0, [r7, #4]
|
|
8004494: f107 0014 add.w r0, r7, #20
|
|
8004498: e880 000e stmia.w r0, {r1, r2, r3}
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(cfg);
|
|
|
|
/* Init Device */
|
|
/* CNTR_FRES = 1 */
|
|
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
|
|
800449c: 687b ldr r3, [r7, #4]
|
|
800449e: 2201 movs r2, #1
|
|
80044a0: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
|
|
|
|
/* CNTR_FRES = 0 */
|
|
USBx->CNTR = 0U;
|
|
80044a4: 687b ldr r3, [r7, #4]
|
|
80044a6: 2200 movs r2, #0
|
|
80044a8: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
|
|
|
|
/* Clear pending interrupts */
|
|
USBx->ISTR = 0U;
|
|
80044ac: 687b ldr r3, [r7, #4]
|
|
80044ae: 2200 movs r2, #0
|
|
80044b0: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
|
|
|
|
/*Set Btable Address*/
|
|
USBx->BTABLE = BTABLE_ADDRESS;
|
|
80044b4: 687b ldr r3, [r7, #4]
|
|
80044b6: 2200 movs r2, #0
|
|
80044b8: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
|
|
|
|
return HAL_OK;
|
|
80044bc: 2300 movs r3, #0
|
|
}
|
|
80044be: 4618 mov r0, r3
|
|
80044c0: 370c adds r7, #12
|
|
80044c2: 46bd mov sp, r7
|
|
80044c4: f85d 7b04 ldr.w r7, [sp], #4
|
|
80044c8: b004 add sp, #16
|
|
80044ca: 4770 bx lr
|
|
|
|
080044cc <USB_ActivateEndpoint>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
80044cc: b480 push {r7}
|
|
80044ce: b09d sub sp, #116 @ 0x74
|
|
80044d0: af00 add r7, sp, #0
|
|
80044d2: 6078 str r0, [r7, #4]
|
|
80044d4: 6039 str r1, [r7, #0]
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
80044d6: 2300 movs r3, #0
|
|
80044d8: f887 306f strb.w r3, [r7, #111] @ 0x6f
|
|
uint16_t wEpRegVal;
|
|
|
|
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
|
|
80044dc: 687a ldr r2, [r7, #4]
|
|
80044de: 683b ldr r3, [r7, #0]
|
|
80044e0: 781b ldrb r3, [r3, #0]
|
|
80044e2: 009b lsls r3, r3, #2
|
|
80044e4: 4413 add r3, r2
|
|
80044e6: 881b ldrh r3, [r3, #0]
|
|
80044e8: b29b uxth r3, r3
|
|
80044ea: f423 43ec bic.w r3, r3, #30208 @ 0x7600
|
|
80044ee: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
80044f2: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
|
|
|
|
/* initialize Endpoint */
|
|
switch (ep->type)
|
|
80044f6: 683b ldr r3, [r7, #0]
|
|
80044f8: 78db ldrb r3, [r3, #3]
|
|
80044fa: 2b03 cmp r3, #3
|
|
80044fc: d81f bhi.n 800453e <USB_ActivateEndpoint+0x72>
|
|
80044fe: a201 add r2, pc, #4 @ (adr r2, 8004504 <USB_ActivateEndpoint+0x38>)
|
|
8004500: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8004504: 08004515 .word 0x08004515
|
|
8004508: 08004531 .word 0x08004531
|
|
800450c: 08004547 .word 0x08004547
|
|
8004510: 08004523 .word 0x08004523
|
|
{
|
|
case EP_TYPE_CTRL:
|
|
wEpRegVal |= USB_EP_CONTROL;
|
|
8004514: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
|
|
8004518: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
800451c: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
|
|
break;
|
|
8004520: e012 b.n 8004548 <USB_ActivateEndpoint+0x7c>
|
|
case EP_TYPE_BULK:
|
|
wEpRegVal |= USB_EP_BULK;
|
|
break;
|
|
|
|
case EP_TYPE_INTR:
|
|
wEpRegVal |= USB_EP_INTERRUPT;
|
|
8004522: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
|
|
8004526: f443 63c0 orr.w r3, r3, #1536 @ 0x600
|
|
800452a: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
|
|
break;
|
|
800452e: e00b b.n 8004548 <USB_ActivateEndpoint+0x7c>
|
|
|
|
case EP_TYPE_ISOC:
|
|
wEpRegVal |= USB_EP_ISOCHRONOUS;
|
|
8004530: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
|
|
8004534: f443 6380 orr.w r3, r3, #1024 @ 0x400
|
|
8004538: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
|
|
break;
|
|
800453c: e004 b.n 8004548 <USB_ActivateEndpoint+0x7c>
|
|
|
|
default:
|
|
ret = HAL_ERROR;
|
|
800453e: 2301 movs r3, #1
|
|
8004540: f887 306f strb.w r3, [r7, #111] @ 0x6f
|
|
break;
|
|
8004544: e000 b.n 8004548 <USB_ActivateEndpoint+0x7c>
|
|
break;
|
|
8004546: bf00 nop
|
|
}
|
|
|
|
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
|
|
8004548: 687a ldr r2, [r7, #4]
|
|
800454a: 683b ldr r3, [r7, #0]
|
|
800454c: 781b ldrb r3, [r3, #0]
|
|
800454e: 009b lsls r3, r3, #2
|
|
8004550: 441a add r2, r3
|
|
8004552: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
|
|
8004556: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
800455a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
800455e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004562: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004566: b29b uxth r3, r3
|
|
8004568: 8013 strh r3, [r2, #0]
|
|
|
|
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
|
|
800456a: 687a ldr r2, [r7, #4]
|
|
800456c: 683b ldr r3, [r7, #0]
|
|
800456e: 781b ldrb r3, [r3, #0]
|
|
8004570: 009b lsls r3, r3, #2
|
|
8004572: 4413 add r3, r2
|
|
8004574: 881b ldrh r3, [r3, #0]
|
|
8004576: b29b uxth r3, r3
|
|
8004578: b21b sxth r3, r3
|
|
800457a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
800457e: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004582: b21a sxth r2, r3
|
|
8004584: 683b ldr r3, [r7, #0]
|
|
8004586: 781b ldrb r3, [r3, #0]
|
|
8004588: b21b sxth r3, r3
|
|
800458a: 4313 orrs r3, r2
|
|
800458c: b21b sxth r3, r3
|
|
800458e: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
|
|
8004592: 687a ldr r2, [r7, #4]
|
|
8004594: 683b ldr r3, [r7, #0]
|
|
8004596: 781b ldrb r3, [r3, #0]
|
|
8004598: 009b lsls r3, r3, #2
|
|
800459a: 441a add r2, r3
|
|
800459c: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
|
|
80045a0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
80045a4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
80045a8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
80045ac: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
80045b0: b29b uxth r3, r3
|
|
80045b2: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->doublebuffer == 0U)
|
|
80045b4: 683b ldr r3, [r7, #0]
|
|
80045b6: 7b1b ldrb r3, [r3, #12]
|
|
80045b8: 2b00 cmp r3, #0
|
|
80045ba: f040 8178 bne.w 80048ae <USB_ActivateEndpoint+0x3e2>
|
|
{
|
|
if (ep->is_in != 0U)
|
|
80045be: 683b ldr r3, [r7, #0]
|
|
80045c0: 785b ldrb r3, [r3, #1]
|
|
80045c2: 2b00 cmp r3, #0
|
|
80045c4: f000 8084 beq.w 80046d0 <USB_ActivateEndpoint+0x204>
|
|
{
|
|
/*Set the endpoint Transmit buffer address */
|
|
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
|
|
80045c8: 687b ldr r3, [r7, #4]
|
|
80045ca: 61bb str r3, [r7, #24]
|
|
80045cc: 687b ldr r3, [r7, #4]
|
|
80045ce: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80045d2: b29b uxth r3, r3
|
|
80045d4: 461a mov r2, r3
|
|
80045d6: 69bb ldr r3, [r7, #24]
|
|
80045d8: 4413 add r3, r2
|
|
80045da: 61bb str r3, [r7, #24]
|
|
80045dc: 683b ldr r3, [r7, #0]
|
|
80045de: 781b ldrb r3, [r3, #0]
|
|
80045e0: 00da lsls r2, r3, #3
|
|
80045e2: 69bb ldr r3, [r7, #24]
|
|
80045e4: 4413 add r3, r2
|
|
80045e6: f503 6380 add.w r3, r3, #1024 @ 0x400
|
|
80045ea: 617b str r3, [r7, #20]
|
|
80045ec: 683b ldr r3, [r7, #0]
|
|
80045ee: 88db ldrh r3, [r3, #6]
|
|
80045f0: 085b lsrs r3, r3, #1
|
|
80045f2: b29b uxth r3, r3
|
|
80045f4: 005b lsls r3, r3, #1
|
|
80045f6: b29a uxth r2, r3
|
|
80045f8: 697b ldr r3, [r7, #20]
|
|
80045fa: 801a strh r2, [r3, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
80045fc: 687a ldr r2, [r7, #4]
|
|
80045fe: 683b ldr r3, [r7, #0]
|
|
8004600: 781b ldrb r3, [r3, #0]
|
|
8004602: 009b lsls r3, r3, #2
|
|
8004604: 4413 add r3, r2
|
|
8004606: 881b ldrh r3, [r3, #0]
|
|
8004608: 827b strh r3, [r7, #18]
|
|
800460a: 8a7b ldrh r3, [r7, #18]
|
|
800460c: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8004610: 2b00 cmp r3, #0
|
|
8004612: d01b beq.n 800464c <USB_ActivateEndpoint+0x180>
|
|
8004614: 687a ldr r2, [r7, #4]
|
|
8004616: 683b ldr r3, [r7, #0]
|
|
8004618: 781b ldrb r3, [r3, #0]
|
|
800461a: 009b lsls r3, r3, #2
|
|
800461c: 4413 add r3, r2
|
|
800461e: 881b ldrh r3, [r3, #0]
|
|
8004620: b29b uxth r3, r3
|
|
8004622: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004626: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
800462a: 823b strh r3, [r7, #16]
|
|
800462c: 687a ldr r2, [r7, #4]
|
|
800462e: 683b ldr r3, [r7, #0]
|
|
8004630: 781b ldrb r3, [r3, #0]
|
|
8004632: 009b lsls r3, r3, #2
|
|
8004634: 441a add r2, r3
|
|
8004636: 8a3b ldrh r3, [r7, #16]
|
|
8004638: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
800463c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004640: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004644: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8004648: b29b uxth r3, r3
|
|
800464a: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type != EP_TYPE_ISOC)
|
|
800464c: 683b ldr r3, [r7, #0]
|
|
800464e: 78db ldrb r3, [r3, #3]
|
|
8004650: 2b01 cmp r3, #1
|
|
8004652: d020 beq.n 8004696 <USB_ActivateEndpoint+0x1ca>
|
|
{
|
|
/* Configure NAK status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
|
8004654: 687a ldr r2, [r7, #4]
|
|
8004656: 683b ldr r3, [r7, #0]
|
|
8004658: 781b ldrb r3, [r3, #0]
|
|
800465a: 009b lsls r3, r3, #2
|
|
800465c: 4413 add r3, r2
|
|
800465e: 881b ldrh r3, [r3, #0]
|
|
8004660: b29b uxth r3, r3
|
|
8004662: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004666: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
800466a: 81bb strh r3, [r7, #12]
|
|
800466c: 89bb ldrh r3, [r7, #12]
|
|
800466e: f083 0320 eor.w r3, r3, #32
|
|
8004672: 81bb strh r3, [r7, #12]
|
|
8004674: 687a ldr r2, [r7, #4]
|
|
8004676: 683b ldr r3, [r7, #0]
|
|
8004678: 781b ldrb r3, [r3, #0]
|
|
800467a: 009b lsls r3, r3, #2
|
|
800467c: 441a add r2, r3
|
|
800467e: 89bb ldrh r3, [r7, #12]
|
|
8004680: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004684: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004688: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
800468c: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004690: b29b uxth r3, r3
|
|
8004692: 8013 strh r3, [r2, #0]
|
|
8004694: e2d5 b.n 8004c42 <USB_ActivateEndpoint+0x776>
|
|
}
|
|
else
|
|
{
|
|
/* Configure TX Endpoint to disabled state */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004696: 687a ldr r2, [r7, #4]
|
|
8004698: 683b ldr r3, [r7, #0]
|
|
800469a: 781b ldrb r3, [r3, #0]
|
|
800469c: 009b lsls r3, r3, #2
|
|
800469e: 4413 add r3, r2
|
|
80046a0: 881b ldrh r3, [r3, #0]
|
|
80046a2: b29b uxth r3, r3
|
|
80046a4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
80046a8: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
80046ac: 81fb strh r3, [r7, #14]
|
|
80046ae: 687a ldr r2, [r7, #4]
|
|
80046b0: 683b ldr r3, [r7, #0]
|
|
80046b2: 781b ldrb r3, [r3, #0]
|
|
80046b4: 009b lsls r3, r3, #2
|
|
80046b6: 441a add r2, r3
|
|
80046b8: 89fb ldrh r3, [r7, #14]
|
|
80046ba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
80046be: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
80046c2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
80046c6: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
80046ca: b29b uxth r3, r3
|
|
80046cc: 8013 strh r3, [r2, #0]
|
|
80046ce: e2b8 b.n 8004c42 <USB_ActivateEndpoint+0x776>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the endpoint Receive buffer address */
|
|
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
|
|
80046d0: 687b ldr r3, [r7, #4]
|
|
80046d2: 633b str r3, [r7, #48] @ 0x30
|
|
80046d4: 687b ldr r3, [r7, #4]
|
|
80046d6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80046da: b29b uxth r3, r3
|
|
80046dc: 461a mov r2, r3
|
|
80046de: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
80046e0: 4413 add r3, r2
|
|
80046e2: 633b str r3, [r7, #48] @ 0x30
|
|
80046e4: 683b ldr r3, [r7, #0]
|
|
80046e6: 781b ldrb r3, [r3, #0]
|
|
80046e8: 00da lsls r2, r3, #3
|
|
80046ea: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
80046ec: 4413 add r3, r2
|
|
80046ee: f203 4304 addw r3, r3, #1028 @ 0x404
|
|
80046f2: 62fb str r3, [r7, #44] @ 0x2c
|
|
80046f4: 683b ldr r3, [r7, #0]
|
|
80046f6: 88db ldrh r3, [r3, #6]
|
|
80046f8: 085b lsrs r3, r3, #1
|
|
80046fa: b29b uxth r3, r3
|
|
80046fc: 005b lsls r3, r3, #1
|
|
80046fe: b29a uxth r2, r3
|
|
8004700: 6afb ldr r3, [r7, #44] @ 0x2c
|
|
8004702: 801a strh r2, [r3, #0]
|
|
|
|
/* Set the endpoint Receive buffer counter */
|
|
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
|
|
8004704: 687b ldr r3, [r7, #4]
|
|
8004706: 62bb str r3, [r7, #40] @ 0x28
|
|
8004708: 687b ldr r3, [r7, #4]
|
|
800470a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800470e: b29b uxth r3, r3
|
|
8004710: 461a mov r2, r3
|
|
8004712: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8004714: 4413 add r3, r2
|
|
8004716: 62bb str r3, [r7, #40] @ 0x28
|
|
8004718: 683b ldr r3, [r7, #0]
|
|
800471a: 781b ldrb r3, [r3, #0]
|
|
800471c: 00da lsls r2, r3, #3
|
|
800471e: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8004720: 4413 add r3, r2
|
|
8004722: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8004726: 627b str r3, [r7, #36] @ 0x24
|
|
8004728: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
800472a: 881b ldrh r3, [r3, #0]
|
|
800472c: b29b uxth r3, r3
|
|
800472e: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8004732: b29a uxth r2, r3
|
|
8004734: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8004736: 801a strh r2, [r3, #0]
|
|
8004738: 683b ldr r3, [r7, #0]
|
|
800473a: 691b ldr r3, [r3, #16]
|
|
800473c: 2b3e cmp r3, #62 @ 0x3e
|
|
800473e: d91d bls.n 800477c <USB_ActivateEndpoint+0x2b0>
|
|
8004740: 683b ldr r3, [r7, #0]
|
|
8004742: 691b ldr r3, [r3, #16]
|
|
8004744: 095b lsrs r3, r3, #5
|
|
8004746: 66bb str r3, [r7, #104] @ 0x68
|
|
8004748: 683b ldr r3, [r7, #0]
|
|
800474a: 691b ldr r3, [r3, #16]
|
|
800474c: f003 031f and.w r3, r3, #31
|
|
8004750: 2b00 cmp r3, #0
|
|
8004752: d102 bne.n 800475a <USB_ActivateEndpoint+0x28e>
|
|
8004754: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
8004756: 3b01 subs r3, #1
|
|
8004758: 66bb str r3, [r7, #104] @ 0x68
|
|
800475a: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
800475c: 881b ldrh r3, [r3, #0]
|
|
800475e: b29a uxth r2, r3
|
|
8004760: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
8004762: b29b uxth r3, r3
|
|
8004764: 029b lsls r3, r3, #10
|
|
8004766: b29b uxth r3, r3
|
|
8004768: 4313 orrs r3, r2
|
|
800476a: b29b uxth r3, r3
|
|
800476c: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8004770: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8004774: b29a uxth r2, r3
|
|
8004776: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8004778: 801a strh r2, [r3, #0]
|
|
800477a: e026 b.n 80047ca <USB_ActivateEndpoint+0x2fe>
|
|
800477c: 683b ldr r3, [r7, #0]
|
|
800477e: 691b ldr r3, [r3, #16]
|
|
8004780: 2b00 cmp r3, #0
|
|
8004782: d10a bne.n 800479a <USB_ActivateEndpoint+0x2ce>
|
|
8004784: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8004786: 881b ldrh r3, [r3, #0]
|
|
8004788: b29b uxth r3, r3
|
|
800478a: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800478e: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8004792: b29a uxth r2, r3
|
|
8004794: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8004796: 801a strh r2, [r3, #0]
|
|
8004798: e017 b.n 80047ca <USB_ActivateEndpoint+0x2fe>
|
|
800479a: 683b ldr r3, [r7, #0]
|
|
800479c: 691b ldr r3, [r3, #16]
|
|
800479e: 085b lsrs r3, r3, #1
|
|
80047a0: 66bb str r3, [r7, #104] @ 0x68
|
|
80047a2: 683b ldr r3, [r7, #0]
|
|
80047a4: 691b ldr r3, [r3, #16]
|
|
80047a6: f003 0301 and.w r3, r3, #1
|
|
80047aa: 2b00 cmp r3, #0
|
|
80047ac: d002 beq.n 80047b4 <USB_ActivateEndpoint+0x2e8>
|
|
80047ae: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
80047b0: 3301 adds r3, #1
|
|
80047b2: 66bb str r3, [r7, #104] @ 0x68
|
|
80047b4: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80047b6: 881b ldrh r3, [r3, #0]
|
|
80047b8: b29a uxth r2, r3
|
|
80047ba: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
80047bc: b29b uxth r3, r3
|
|
80047be: 029b lsls r3, r3, #10
|
|
80047c0: b29b uxth r3, r3
|
|
80047c2: 4313 orrs r3, r2
|
|
80047c4: b29a uxth r2, r3
|
|
80047c6: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80047c8: 801a strh r2, [r3, #0]
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
80047ca: 687a ldr r2, [r7, #4]
|
|
80047cc: 683b ldr r3, [r7, #0]
|
|
80047ce: 781b ldrb r3, [r3, #0]
|
|
80047d0: 009b lsls r3, r3, #2
|
|
80047d2: 4413 add r3, r2
|
|
80047d4: 881b ldrh r3, [r3, #0]
|
|
80047d6: 847b strh r3, [r7, #34] @ 0x22
|
|
80047d8: 8c7b ldrh r3, [r7, #34] @ 0x22
|
|
80047da: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
80047de: 2b00 cmp r3, #0
|
|
80047e0: d01b beq.n 800481a <USB_ActivateEndpoint+0x34e>
|
|
80047e2: 687a ldr r2, [r7, #4]
|
|
80047e4: 683b ldr r3, [r7, #0]
|
|
80047e6: 781b ldrb r3, [r3, #0]
|
|
80047e8: 009b lsls r3, r3, #2
|
|
80047ea: 4413 add r3, r2
|
|
80047ec: 881b ldrh r3, [r3, #0]
|
|
80047ee: b29b uxth r3, r3
|
|
80047f0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
80047f4: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
80047f8: 843b strh r3, [r7, #32]
|
|
80047fa: 687a ldr r2, [r7, #4]
|
|
80047fc: 683b ldr r3, [r7, #0]
|
|
80047fe: 781b ldrb r3, [r3, #0]
|
|
8004800: 009b lsls r3, r3, #2
|
|
8004802: 441a add r2, r3
|
|
8004804: 8c3b ldrh r3, [r7, #32]
|
|
8004806: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
800480a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
800480e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8004812: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004816: b29b uxth r3, r3
|
|
8004818: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->num == 0U)
|
|
800481a: 683b ldr r3, [r7, #0]
|
|
800481c: 781b ldrb r3, [r3, #0]
|
|
800481e: 2b00 cmp r3, #0
|
|
8004820: d124 bne.n 800486c <USB_ActivateEndpoint+0x3a0>
|
|
{
|
|
/* Configure VALID status for EP0 */
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
8004822: 687a ldr r2, [r7, #4]
|
|
8004824: 683b ldr r3, [r7, #0]
|
|
8004826: 781b ldrb r3, [r3, #0]
|
|
8004828: 009b lsls r3, r3, #2
|
|
800482a: 4413 add r3, r2
|
|
800482c: 881b ldrh r3, [r3, #0]
|
|
800482e: b29b uxth r3, r3
|
|
8004830: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
8004834: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004838: 83bb strh r3, [r7, #28]
|
|
800483a: 8bbb ldrh r3, [r7, #28]
|
|
800483c: f483 5380 eor.w r3, r3, #4096 @ 0x1000
|
|
8004840: 83bb strh r3, [r7, #28]
|
|
8004842: 8bbb ldrh r3, [r7, #28]
|
|
8004844: f483 5300 eor.w r3, r3, #8192 @ 0x2000
|
|
8004848: 83bb strh r3, [r7, #28]
|
|
800484a: 687a ldr r2, [r7, #4]
|
|
800484c: 683b ldr r3, [r7, #0]
|
|
800484e: 781b ldrb r3, [r3, #0]
|
|
8004850: 009b lsls r3, r3, #2
|
|
8004852: 441a add r2, r3
|
|
8004854: 8bbb ldrh r3, [r7, #28]
|
|
8004856: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
800485a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
800485e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004862: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004866: b29b uxth r3, r3
|
|
8004868: 8013 strh r3, [r2, #0]
|
|
800486a: e1ea b.n 8004c42 <USB_ActivateEndpoint+0x776>
|
|
}
|
|
else
|
|
{
|
|
/* Configure NAK status for OUT Endpoint */
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
|
|
800486c: 687a ldr r2, [r7, #4]
|
|
800486e: 683b ldr r3, [r7, #0]
|
|
8004870: 781b ldrb r3, [r3, #0]
|
|
8004872: 009b lsls r3, r3, #2
|
|
8004874: 4413 add r3, r2
|
|
8004876: 881b ldrh r3, [r3, #0]
|
|
8004878: b29b uxth r3, r3
|
|
800487a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
800487e: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004882: 83fb strh r3, [r7, #30]
|
|
8004884: 8bfb ldrh r3, [r7, #30]
|
|
8004886: f483 5300 eor.w r3, r3, #8192 @ 0x2000
|
|
800488a: 83fb strh r3, [r7, #30]
|
|
800488c: 687a ldr r2, [r7, #4]
|
|
800488e: 683b ldr r3, [r7, #0]
|
|
8004890: 781b ldrb r3, [r3, #0]
|
|
8004892: 009b lsls r3, r3, #2
|
|
8004894: 441a add r2, r3
|
|
8004896: 8bfb ldrh r3, [r7, #30]
|
|
8004898: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
800489c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
80048a0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
80048a4: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
80048a8: b29b uxth r3, r3
|
|
80048aa: 8013 strh r3, [r2, #0]
|
|
80048ac: e1c9 b.n 8004c42 <USB_ActivateEndpoint+0x776>
|
|
}
|
|
#if (USE_USB_DOUBLE_BUFFER == 1U)
|
|
/* Double Buffer */
|
|
else
|
|
{
|
|
if (ep->type == EP_TYPE_BULK)
|
|
80048ae: 683b ldr r3, [r7, #0]
|
|
80048b0: 78db ldrb r3, [r3, #3]
|
|
80048b2: 2b02 cmp r3, #2
|
|
80048b4: d11e bne.n 80048f4 <USB_ActivateEndpoint+0x428>
|
|
{
|
|
/* Set bulk endpoint as double buffered */
|
|
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
|
|
80048b6: 687a ldr r2, [r7, #4]
|
|
80048b8: 683b ldr r3, [r7, #0]
|
|
80048ba: 781b ldrb r3, [r3, #0]
|
|
80048bc: 009b lsls r3, r3, #2
|
|
80048be: 4413 add r3, r2
|
|
80048c0: 881b ldrh r3, [r3, #0]
|
|
80048c2: b29b uxth r3, r3
|
|
80048c4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
80048c8: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
80048cc: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
|
|
80048d0: 687a ldr r2, [r7, #4]
|
|
80048d2: 683b ldr r3, [r7, #0]
|
|
80048d4: 781b ldrb r3, [r3, #0]
|
|
80048d6: 009b lsls r3, r3, #2
|
|
80048d8: 441a add r2, r3
|
|
80048da: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
|
|
80048de: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
80048e2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
80048e6: f443 4301 orr.w r3, r3, #33024 @ 0x8100
|
|
80048ea: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
80048ee: b29b uxth r3, r3
|
|
80048f0: 8013 strh r3, [r2, #0]
|
|
80048f2: e01d b.n 8004930 <USB_ActivateEndpoint+0x464>
|
|
}
|
|
else
|
|
{
|
|
/* Set the ISOC endpoint in double buffer mode */
|
|
PCD_CLEAR_EP_KIND(USBx, ep->num);
|
|
80048f4: 687a ldr r2, [r7, #4]
|
|
80048f6: 683b ldr r3, [r7, #0]
|
|
80048f8: 781b ldrb r3, [r3, #0]
|
|
80048fa: 009b lsls r3, r3, #2
|
|
80048fc: 4413 add r3, r2
|
|
80048fe: 881b ldrh r3, [r3, #0]
|
|
8004900: b29b uxth r3, r3
|
|
8004902: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
|
|
8004906: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
800490a: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
|
|
800490e: 687a ldr r2, [r7, #4]
|
|
8004910: 683b ldr r3, [r7, #0]
|
|
8004912: 781b ldrb r3, [r3, #0]
|
|
8004914: 009b lsls r3, r3, #2
|
|
8004916: 441a add r2, r3
|
|
8004918: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
|
|
800491c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004920: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004924: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004928: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
800492c: b29b uxth r3, r3
|
|
800492e: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
/* Set buffer address for double buffered mode */
|
|
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
|
|
8004930: 687b ldr r3, [r7, #4]
|
|
8004932: 65fb str r3, [r7, #92] @ 0x5c
|
|
8004934: 687b ldr r3, [r7, #4]
|
|
8004936: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800493a: b29b uxth r3, r3
|
|
800493c: 461a mov r2, r3
|
|
800493e: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8004940: 4413 add r3, r2
|
|
8004942: 65fb str r3, [r7, #92] @ 0x5c
|
|
8004944: 683b ldr r3, [r7, #0]
|
|
8004946: 781b ldrb r3, [r3, #0]
|
|
8004948: 00da lsls r2, r3, #3
|
|
800494a: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
800494c: 4413 add r3, r2
|
|
800494e: f503 6380 add.w r3, r3, #1024 @ 0x400
|
|
8004952: 65bb str r3, [r7, #88] @ 0x58
|
|
8004954: 683b ldr r3, [r7, #0]
|
|
8004956: 891b ldrh r3, [r3, #8]
|
|
8004958: 085b lsrs r3, r3, #1
|
|
800495a: b29b uxth r3, r3
|
|
800495c: 005b lsls r3, r3, #1
|
|
800495e: b29a uxth r2, r3
|
|
8004960: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
8004962: 801a strh r2, [r3, #0]
|
|
8004964: 687b ldr r3, [r7, #4]
|
|
8004966: 657b str r3, [r7, #84] @ 0x54
|
|
8004968: 687b ldr r3, [r7, #4]
|
|
800496a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800496e: b29b uxth r3, r3
|
|
8004970: 461a mov r2, r3
|
|
8004972: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8004974: 4413 add r3, r2
|
|
8004976: 657b str r3, [r7, #84] @ 0x54
|
|
8004978: 683b ldr r3, [r7, #0]
|
|
800497a: 781b ldrb r3, [r3, #0]
|
|
800497c: 00da lsls r2, r3, #3
|
|
800497e: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8004980: 4413 add r3, r2
|
|
8004982: f203 4304 addw r3, r3, #1028 @ 0x404
|
|
8004986: 653b str r3, [r7, #80] @ 0x50
|
|
8004988: 683b ldr r3, [r7, #0]
|
|
800498a: 895b ldrh r3, [r3, #10]
|
|
800498c: 085b lsrs r3, r3, #1
|
|
800498e: b29b uxth r3, r3
|
|
8004990: 005b lsls r3, r3, #1
|
|
8004992: b29a uxth r2, r3
|
|
8004994: 6d3b ldr r3, [r7, #80] @ 0x50
|
|
8004996: 801a strh r2, [r3, #0]
|
|
|
|
if (ep->is_in == 0U)
|
|
8004998: 683b ldr r3, [r7, #0]
|
|
800499a: 785b ldrb r3, [r3, #1]
|
|
800499c: 2b00 cmp r3, #0
|
|
800499e: f040 8093 bne.w 8004ac8 <USB_ActivateEndpoint+0x5fc>
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT */
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
80049a2: 687a ldr r2, [r7, #4]
|
|
80049a4: 683b ldr r3, [r7, #0]
|
|
80049a6: 781b ldrb r3, [r3, #0]
|
|
80049a8: 009b lsls r3, r3, #2
|
|
80049aa: 4413 add r3, r2
|
|
80049ac: 881b ldrh r3, [r3, #0]
|
|
80049ae: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
|
|
80049b2: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
|
|
80049b6: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
80049ba: 2b00 cmp r3, #0
|
|
80049bc: d01b beq.n 80049f6 <USB_ActivateEndpoint+0x52a>
|
|
80049be: 687a ldr r2, [r7, #4]
|
|
80049c0: 683b ldr r3, [r7, #0]
|
|
80049c2: 781b ldrb r3, [r3, #0]
|
|
80049c4: 009b lsls r3, r3, #2
|
|
80049c6: 4413 add r3, r2
|
|
80049c8: 881b ldrh r3, [r3, #0]
|
|
80049ca: b29b uxth r3, r3
|
|
80049cc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
80049d0: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
80049d4: 87fb strh r3, [r7, #62] @ 0x3e
|
|
80049d6: 687a ldr r2, [r7, #4]
|
|
80049d8: 683b ldr r3, [r7, #0]
|
|
80049da: 781b ldrb r3, [r3, #0]
|
|
80049dc: 009b lsls r3, r3, #2
|
|
80049de: 441a add r2, r3
|
|
80049e0: 8ffb ldrh r3, [r7, #62] @ 0x3e
|
|
80049e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
80049e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
80049ea: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
80049ee: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
80049f2: b29b uxth r3, r3
|
|
80049f4: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
80049f6: 687a ldr r2, [r7, #4]
|
|
80049f8: 683b ldr r3, [r7, #0]
|
|
80049fa: 781b ldrb r3, [r3, #0]
|
|
80049fc: 009b lsls r3, r3, #2
|
|
80049fe: 4413 add r3, r2
|
|
8004a00: 881b ldrh r3, [r3, #0]
|
|
8004a02: 87bb strh r3, [r7, #60] @ 0x3c
|
|
8004a04: 8fbb ldrh r3, [r7, #60] @ 0x3c
|
|
8004a06: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8004a0a: 2b00 cmp r3, #0
|
|
8004a0c: d01b beq.n 8004a46 <USB_ActivateEndpoint+0x57a>
|
|
8004a0e: 687a ldr r2, [r7, #4]
|
|
8004a10: 683b ldr r3, [r7, #0]
|
|
8004a12: 781b ldrb r3, [r3, #0]
|
|
8004a14: 009b lsls r3, r3, #2
|
|
8004a16: 4413 add r3, r2
|
|
8004a18: 881b ldrh r3, [r3, #0]
|
|
8004a1a: b29b uxth r3, r3
|
|
8004a1c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004a20: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004a24: 877b strh r3, [r7, #58] @ 0x3a
|
|
8004a26: 687a ldr r2, [r7, #4]
|
|
8004a28: 683b ldr r3, [r7, #0]
|
|
8004a2a: 781b ldrb r3, [r3, #0]
|
|
8004a2c: 009b lsls r3, r3, #2
|
|
8004a2e: 441a add r2, r3
|
|
8004a30: 8f7b ldrh r3, [r7, #58] @ 0x3a
|
|
8004a32: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004a36: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004a3a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004a3e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8004a42: b29b uxth r3, r3
|
|
8004a44: 8013 strh r3, [r2, #0]
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
8004a46: 687a ldr r2, [r7, #4]
|
|
8004a48: 683b ldr r3, [r7, #0]
|
|
8004a4a: 781b ldrb r3, [r3, #0]
|
|
8004a4c: 009b lsls r3, r3, #2
|
|
8004a4e: 4413 add r3, r2
|
|
8004a50: 881b ldrh r3, [r3, #0]
|
|
8004a52: b29b uxth r3, r3
|
|
8004a54: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
8004a58: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004a5c: 873b strh r3, [r7, #56] @ 0x38
|
|
8004a5e: 8f3b ldrh r3, [r7, #56] @ 0x38
|
|
8004a60: f483 5380 eor.w r3, r3, #4096 @ 0x1000
|
|
8004a64: 873b strh r3, [r7, #56] @ 0x38
|
|
8004a66: 8f3b ldrh r3, [r7, #56] @ 0x38
|
|
8004a68: f483 5300 eor.w r3, r3, #8192 @ 0x2000
|
|
8004a6c: 873b strh r3, [r7, #56] @ 0x38
|
|
8004a6e: 687a ldr r2, [r7, #4]
|
|
8004a70: 683b ldr r3, [r7, #0]
|
|
8004a72: 781b ldrb r3, [r3, #0]
|
|
8004a74: 009b lsls r3, r3, #2
|
|
8004a76: 441a add r2, r3
|
|
8004a78: 8f3b ldrh r3, [r7, #56] @ 0x38
|
|
8004a7a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004a7e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004a82: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004a86: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004a8a: b29b uxth r3, r3
|
|
8004a8c: 8013 strh r3, [r2, #0]
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004a8e: 687a ldr r2, [r7, #4]
|
|
8004a90: 683b ldr r3, [r7, #0]
|
|
8004a92: 781b ldrb r3, [r3, #0]
|
|
8004a94: 009b lsls r3, r3, #2
|
|
8004a96: 4413 add r3, r2
|
|
8004a98: 881b ldrh r3, [r3, #0]
|
|
8004a9a: b29b uxth r3, r3
|
|
8004a9c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004aa0: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
8004aa4: 86fb strh r3, [r7, #54] @ 0x36
|
|
8004aa6: 687a ldr r2, [r7, #4]
|
|
8004aa8: 683b ldr r3, [r7, #0]
|
|
8004aaa: 781b ldrb r3, [r3, #0]
|
|
8004aac: 009b lsls r3, r3, #2
|
|
8004aae: 441a add r2, r3
|
|
8004ab0: 8efb ldrh r3, [r7, #54] @ 0x36
|
|
8004ab2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004ab6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004aba: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004abe: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004ac2: b29b uxth r3, r3
|
|
8004ac4: 8013 strh r3, [r2, #0]
|
|
8004ac6: e0bc b.n 8004c42 <USB_ActivateEndpoint+0x776>
|
|
}
|
|
else
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT */
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004ac8: 687a ldr r2, [r7, #4]
|
|
8004aca: 683b ldr r3, [r7, #0]
|
|
8004acc: 781b ldrb r3, [r3, #0]
|
|
8004ace: 009b lsls r3, r3, #2
|
|
8004ad0: 4413 add r3, r2
|
|
8004ad2: 881b ldrh r3, [r3, #0]
|
|
8004ad4: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
|
|
8004ad8: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
|
|
8004adc: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8004ae0: 2b00 cmp r3, #0
|
|
8004ae2: d01d beq.n 8004b20 <USB_ActivateEndpoint+0x654>
|
|
8004ae4: 687a ldr r2, [r7, #4]
|
|
8004ae6: 683b ldr r3, [r7, #0]
|
|
8004ae8: 781b ldrb r3, [r3, #0]
|
|
8004aea: 009b lsls r3, r3, #2
|
|
8004aec: 4413 add r3, r2
|
|
8004aee: 881b ldrh r3, [r3, #0]
|
|
8004af0: b29b uxth r3, r3
|
|
8004af2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004af6: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004afa: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
|
|
8004afe: 687a ldr r2, [r7, #4]
|
|
8004b00: 683b ldr r3, [r7, #0]
|
|
8004b02: 781b ldrb r3, [r3, #0]
|
|
8004b04: 009b lsls r3, r3, #2
|
|
8004b06: 441a add r2, r3
|
|
8004b08: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
|
|
8004b0c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004b10: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004b14: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8004b18: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004b1c: b29b uxth r3, r3
|
|
8004b1e: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8004b20: 687a ldr r2, [r7, #4]
|
|
8004b22: 683b ldr r3, [r7, #0]
|
|
8004b24: 781b ldrb r3, [r3, #0]
|
|
8004b26: 009b lsls r3, r3, #2
|
|
8004b28: 4413 add r3, r2
|
|
8004b2a: 881b ldrh r3, [r3, #0]
|
|
8004b2c: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
|
|
8004b30: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
|
|
8004b34: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8004b38: 2b00 cmp r3, #0
|
|
8004b3a: d01d beq.n 8004b78 <USB_ActivateEndpoint+0x6ac>
|
|
8004b3c: 687a ldr r2, [r7, #4]
|
|
8004b3e: 683b ldr r3, [r7, #0]
|
|
8004b40: 781b ldrb r3, [r3, #0]
|
|
8004b42: 009b lsls r3, r3, #2
|
|
8004b44: 4413 add r3, r2
|
|
8004b46: 881b ldrh r3, [r3, #0]
|
|
8004b48: b29b uxth r3, r3
|
|
8004b4a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004b4e: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004b52: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
|
|
8004b56: 687a ldr r2, [r7, #4]
|
|
8004b58: 683b ldr r3, [r7, #0]
|
|
8004b5a: 781b ldrb r3, [r3, #0]
|
|
8004b5c: 009b lsls r3, r3, #2
|
|
8004b5e: 441a add r2, r3
|
|
8004b60: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
|
|
8004b64: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004b68: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004b6c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004b70: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8004b74: b29b uxth r3, r3
|
|
8004b76: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type != EP_TYPE_ISOC)
|
|
8004b78: 683b ldr r3, [r7, #0]
|
|
8004b7a: 78db ldrb r3, [r3, #3]
|
|
8004b7c: 2b01 cmp r3, #1
|
|
8004b7e: d024 beq.n 8004bca <USB_ActivateEndpoint+0x6fe>
|
|
{
|
|
/* Configure NAK status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
|
8004b80: 687a ldr r2, [r7, #4]
|
|
8004b82: 683b ldr r3, [r7, #0]
|
|
8004b84: 781b ldrb r3, [r3, #0]
|
|
8004b86: 009b lsls r3, r3, #2
|
|
8004b88: 4413 add r3, r2
|
|
8004b8a: 881b ldrh r3, [r3, #0]
|
|
8004b8c: b29b uxth r3, r3
|
|
8004b8e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004b92: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
8004b96: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
|
|
8004b9a: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
|
|
8004b9e: f083 0320 eor.w r3, r3, #32
|
|
8004ba2: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
|
|
8004ba6: 687a ldr r2, [r7, #4]
|
|
8004ba8: 683b ldr r3, [r7, #0]
|
|
8004baa: 781b ldrb r3, [r3, #0]
|
|
8004bac: 009b lsls r3, r3, #2
|
|
8004bae: 441a add r2, r3
|
|
8004bb0: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
|
|
8004bb4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004bb8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004bbc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004bc0: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004bc4: b29b uxth r3, r3
|
|
8004bc6: 8013 strh r3, [r2, #0]
|
|
8004bc8: e01d b.n 8004c06 <USB_ActivateEndpoint+0x73a>
|
|
}
|
|
else
|
|
{
|
|
/* Configure TX Endpoint to disabled state */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004bca: 687a ldr r2, [r7, #4]
|
|
8004bcc: 683b ldr r3, [r7, #0]
|
|
8004bce: 781b ldrb r3, [r3, #0]
|
|
8004bd0: 009b lsls r3, r3, #2
|
|
8004bd2: 4413 add r3, r2
|
|
8004bd4: 881b ldrh r3, [r3, #0]
|
|
8004bd6: b29b uxth r3, r3
|
|
8004bd8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004bdc: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
8004be0: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
|
|
8004be4: 687a ldr r2, [r7, #4]
|
|
8004be6: 683b ldr r3, [r7, #0]
|
|
8004be8: 781b ldrb r3, [r3, #0]
|
|
8004bea: 009b lsls r3, r3, #2
|
|
8004bec: 441a add r2, r3
|
|
8004bee: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
|
|
8004bf2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004bf6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004bfa: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004bfe: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004c02: b29b uxth r3, r3
|
|
8004c04: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8004c06: 687a ldr r2, [r7, #4]
|
|
8004c08: 683b ldr r3, [r7, #0]
|
|
8004c0a: 781b ldrb r3, [r3, #0]
|
|
8004c0c: 009b lsls r3, r3, #2
|
|
8004c0e: 4413 add r3, r2
|
|
8004c10: 881b ldrh r3, [r3, #0]
|
|
8004c12: b29b uxth r3, r3
|
|
8004c14: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
8004c18: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004c1c: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
|
|
8004c20: 687a ldr r2, [r7, #4]
|
|
8004c22: 683b ldr r3, [r7, #0]
|
|
8004c24: 781b ldrb r3, [r3, #0]
|
|
8004c26: 009b lsls r3, r3, #2
|
|
8004c28: 441a add r2, r3
|
|
8004c2a: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
|
|
8004c2e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004c32: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004c36: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004c3a: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004c3e: b29b uxth r3, r3
|
|
8004c40: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
|
|
|
|
return ret;
|
|
8004c42: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
|
|
}
|
|
8004c46: 4618 mov r0, r3
|
|
8004c48: 3774 adds r7, #116 @ 0x74
|
|
8004c4a: 46bd mov sp, r7
|
|
8004c4c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8004c50: 4770 bx lr
|
|
8004c52: bf00 nop
|
|
|
|
08004c54 <USB_DeactivateEndpoint>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
8004c54: b480 push {r7}
|
|
8004c56: b08d sub sp, #52 @ 0x34
|
|
8004c58: af00 add r7, sp, #0
|
|
8004c5a: 6078 str r0, [r7, #4]
|
|
8004c5c: 6039 str r1, [r7, #0]
|
|
if (ep->doublebuffer == 0U)
|
|
8004c5e: 683b ldr r3, [r7, #0]
|
|
8004c60: 7b1b ldrb r3, [r3, #12]
|
|
8004c62: 2b00 cmp r3, #0
|
|
8004c64: f040 808e bne.w 8004d84 <USB_DeactivateEndpoint+0x130>
|
|
{
|
|
if (ep->is_in != 0U)
|
|
8004c68: 683b ldr r3, [r7, #0]
|
|
8004c6a: 785b ldrb r3, [r3, #1]
|
|
8004c6c: 2b00 cmp r3, #0
|
|
8004c6e: d044 beq.n 8004cfa <USB_DeactivateEndpoint+0xa6>
|
|
{
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8004c70: 687a ldr r2, [r7, #4]
|
|
8004c72: 683b ldr r3, [r7, #0]
|
|
8004c74: 781b ldrb r3, [r3, #0]
|
|
8004c76: 009b lsls r3, r3, #2
|
|
8004c78: 4413 add r3, r2
|
|
8004c7a: 881b ldrh r3, [r3, #0]
|
|
8004c7c: 81bb strh r3, [r7, #12]
|
|
8004c7e: 89bb ldrh r3, [r7, #12]
|
|
8004c80: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8004c84: 2b00 cmp r3, #0
|
|
8004c86: d01b beq.n 8004cc0 <USB_DeactivateEndpoint+0x6c>
|
|
8004c88: 687a ldr r2, [r7, #4]
|
|
8004c8a: 683b ldr r3, [r7, #0]
|
|
8004c8c: 781b ldrb r3, [r3, #0]
|
|
8004c8e: 009b lsls r3, r3, #2
|
|
8004c90: 4413 add r3, r2
|
|
8004c92: 881b ldrh r3, [r3, #0]
|
|
8004c94: b29b uxth r3, r3
|
|
8004c96: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004c9a: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004c9e: 817b strh r3, [r7, #10]
|
|
8004ca0: 687a ldr r2, [r7, #4]
|
|
8004ca2: 683b ldr r3, [r7, #0]
|
|
8004ca4: 781b ldrb r3, [r3, #0]
|
|
8004ca6: 009b lsls r3, r3, #2
|
|
8004ca8: 441a add r2, r3
|
|
8004caa: 897b ldrh r3, [r7, #10]
|
|
8004cac: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004cb0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004cb4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004cb8: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8004cbc: b29b uxth r3, r3
|
|
8004cbe: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure DISABLE status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004cc0: 687a ldr r2, [r7, #4]
|
|
8004cc2: 683b ldr r3, [r7, #0]
|
|
8004cc4: 781b ldrb r3, [r3, #0]
|
|
8004cc6: 009b lsls r3, r3, #2
|
|
8004cc8: 4413 add r3, r2
|
|
8004cca: 881b ldrh r3, [r3, #0]
|
|
8004ccc: b29b uxth r3, r3
|
|
8004cce: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004cd2: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
8004cd6: 813b strh r3, [r7, #8]
|
|
8004cd8: 687a ldr r2, [r7, #4]
|
|
8004cda: 683b ldr r3, [r7, #0]
|
|
8004cdc: 781b ldrb r3, [r3, #0]
|
|
8004cde: 009b lsls r3, r3, #2
|
|
8004ce0: 441a add r2, r3
|
|
8004ce2: 893b ldrh r3, [r7, #8]
|
|
8004ce4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004ce8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004cec: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004cf0: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004cf4: b29b uxth r3, r3
|
|
8004cf6: 8013 strh r3, [r2, #0]
|
|
8004cf8: e192 b.n 8005020 <USB_DeactivateEndpoint+0x3cc>
|
|
}
|
|
|
|
else
|
|
{
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004cfa: 687a ldr r2, [r7, #4]
|
|
8004cfc: 683b ldr r3, [r7, #0]
|
|
8004cfe: 781b ldrb r3, [r3, #0]
|
|
8004d00: 009b lsls r3, r3, #2
|
|
8004d02: 4413 add r3, r2
|
|
8004d04: 881b ldrh r3, [r3, #0]
|
|
8004d06: 827b strh r3, [r7, #18]
|
|
8004d08: 8a7b ldrh r3, [r7, #18]
|
|
8004d0a: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8004d0e: 2b00 cmp r3, #0
|
|
8004d10: d01b beq.n 8004d4a <USB_DeactivateEndpoint+0xf6>
|
|
8004d12: 687a ldr r2, [r7, #4]
|
|
8004d14: 683b ldr r3, [r7, #0]
|
|
8004d16: 781b ldrb r3, [r3, #0]
|
|
8004d18: 009b lsls r3, r3, #2
|
|
8004d1a: 4413 add r3, r2
|
|
8004d1c: 881b ldrh r3, [r3, #0]
|
|
8004d1e: b29b uxth r3, r3
|
|
8004d20: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004d24: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004d28: 823b strh r3, [r7, #16]
|
|
8004d2a: 687a ldr r2, [r7, #4]
|
|
8004d2c: 683b ldr r3, [r7, #0]
|
|
8004d2e: 781b ldrb r3, [r3, #0]
|
|
8004d30: 009b lsls r3, r3, #2
|
|
8004d32: 441a add r2, r3
|
|
8004d34: 8a3b ldrh r3, [r7, #16]
|
|
8004d36: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004d3a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004d3e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8004d42: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004d46: b29b uxth r3, r3
|
|
8004d48: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure DISABLE status for the Endpoint */
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8004d4a: 687a ldr r2, [r7, #4]
|
|
8004d4c: 683b ldr r3, [r7, #0]
|
|
8004d4e: 781b ldrb r3, [r3, #0]
|
|
8004d50: 009b lsls r3, r3, #2
|
|
8004d52: 4413 add r3, r2
|
|
8004d54: 881b ldrh r3, [r3, #0]
|
|
8004d56: b29b uxth r3, r3
|
|
8004d58: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
8004d5c: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004d60: 81fb strh r3, [r7, #14]
|
|
8004d62: 687a ldr r2, [r7, #4]
|
|
8004d64: 683b ldr r3, [r7, #0]
|
|
8004d66: 781b ldrb r3, [r3, #0]
|
|
8004d68: 009b lsls r3, r3, #2
|
|
8004d6a: 441a add r2, r3
|
|
8004d6c: 89fb ldrh r3, [r7, #14]
|
|
8004d6e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004d72: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004d76: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004d7a: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004d7e: b29b uxth r3, r3
|
|
8004d80: 8013 strh r3, [r2, #0]
|
|
8004d82: e14d b.n 8005020 <USB_DeactivateEndpoint+0x3cc>
|
|
}
|
|
#if (USE_USB_DOUBLE_BUFFER == 1U)
|
|
/* Double Buffer */
|
|
else
|
|
{
|
|
if (ep->is_in == 0U)
|
|
8004d84: 683b ldr r3, [r7, #0]
|
|
8004d86: 785b ldrb r3, [r3, #1]
|
|
8004d88: 2b00 cmp r3, #0
|
|
8004d8a: f040 80a5 bne.w 8004ed8 <USB_DeactivateEndpoint+0x284>
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT*/
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004d8e: 687a ldr r2, [r7, #4]
|
|
8004d90: 683b ldr r3, [r7, #0]
|
|
8004d92: 781b ldrb r3, [r3, #0]
|
|
8004d94: 009b lsls r3, r3, #2
|
|
8004d96: 4413 add r3, r2
|
|
8004d98: 881b ldrh r3, [r3, #0]
|
|
8004d9a: 843b strh r3, [r7, #32]
|
|
8004d9c: 8c3b ldrh r3, [r7, #32]
|
|
8004d9e: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8004da2: 2b00 cmp r3, #0
|
|
8004da4: d01b beq.n 8004dde <USB_DeactivateEndpoint+0x18a>
|
|
8004da6: 687a ldr r2, [r7, #4]
|
|
8004da8: 683b ldr r3, [r7, #0]
|
|
8004daa: 781b ldrb r3, [r3, #0]
|
|
8004dac: 009b lsls r3, r3, #2
|
|
8004dae: 4413 add r3, r2
|
|
8004db0: 881b ldrh r3, [r3, #0]
|
|
8004db2: b29b uxth r3, r3
|
|
8004db4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004db8: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004dbc: 83fb strh r3, [r7, #30]
|
|
8004dbe: 687a ldr r2, [r7, #4]
|
|
8004dc0: 683b ldr r3, [r7, #0]
|
|
8004dc2: 781b ldrb r3, [r3, #0]
|
|
8004dc4: 009b lsls r3, r3, #2
|
|
8004dc6: 441a add r2, r3
|
|
8004dc8: 8bfb ldrh r3, [r7, #30]
|
|
8004dca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004dce: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004dd2: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8004dd6: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004dda: b29b uxth r3, r3
|
|
8004ddc: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8004dde: 687a ldr r2, [r7, #4]
|
|
8004de0: 683b ldr r3, [r7, #0]
|
|
8004de2: 781b ldrb r3, [r3, #0]
|
|
8004de4: 009b lsls r3, r3, #2
|
|
8004de6: 4413 add r3, r2
|
|
8004de8: 881b ldrh r3, [r3, #0]
|
|
8004dea: 83bb strh r3, [r7, #28]
|
|
8004dec: 8bbb ldrh r3, [r7, #28]
|
|
8004dee: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8004df2: 2b00 cmp r3, #0
|
|
8004df4: d01b beq.n 8004e2e <USB_DeactivateEndpoint+0x1da>
|
|
8004df6: 687a ldr r2, [r7, #4]
|
|
8004df8: 683b ldr r3, [r7, #0]
|
|
8004dfa: 781b ldrb r3, [r3, #0]
|
|
8004dfc: 009b lsls r3, r3, #2
|
|
8004dfe: 4413 add r3, r2
|
|
8004e00: 881b ldrh r3, [r3, #0]
|
|
8004e02: b29b uxth r3, r3
|
|
8004e04: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004e08: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004e0c: 837b strh r3, [r7, #26]
|
|
8004e0e: 687a ldr r2, [r7, #4]
|
|
8004e10: 683b ldr r3, [r7, #0]
|
|
8004e12: 781b ldrb r3, [r3, #0]
|
|
8004e14: 009b lsls r3, r3, #2
|
|
8004e16: 441a add r2, r3
|
|
8004e18: 8b7b ldrh r3, [r7, #26]
|
|
8004e1a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004e1e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004e22: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004e26: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8004e2a: b29b uxth r3, r3
|
|
8004e2c: 8013 strh r3, [r2, #0]
|
|
|
|
/* Reset value of the data toggle bits for the endpoint out*/
|
|
PCD_TX_DTOG(USBx, ep->num);
|
|
8004e2e: 687a ldr r2, [r7, #4]
|
|
8004e30: 683b ldr r3, [r7, #0]
|
|
8004e32: 781b ldrb r3, [r3, #0]
|
|
8004e34: 009b lsls r3, r3, #2
|
|
8004e36: 4413 add r3, r2
|
|
8004e38: 881b ldrh r3, [r3, #0]
|
|
8004e3a: b29b uxth r3, r3
|
|
8004e3c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004e40: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004e44: 833b strh r3, [r7, #24]
|
|
8004e46: 687a ldr r2, [r7, #4]
|
|
8004e48: 683b ldr r3, [r7, #0]
|
|
8004e4a: 781b ldrb r3, [r3, #0]
|
|
8004e4c: 009b lsls r3, r3, #2
|
|
8004e4e: 441a add r2, r3
|
|
8004e50: 8b3b ldrh r3, [r7, #24]
|
|
8004e52: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004e56: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004e5a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004e5e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8004e62: b29b uxth r3, r3
|
|
8004e64: 8013 strh r3, [r2, #0]
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8004e66: 687a ldr r2, [r7, #4]
|
|
8004e68: 683b ldr r3, [r7, #0]
|
|
8004e6a: 781b ldrb r3, [r3, #0]
|
|
8004e6c: 009b lsls r3, r3, #2
|
|
8004e6e: 4413 add r3, r2
|
|
8004e70: 881b ldrh r3, [r3, #0]
|
|
8004e72: b29b uxth r3, r3
|
|
8004e74: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
8004e78: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004e7c: 82fb strh r3, [r7, #22]
|
|
8004e7e: 687a ldr r2, [r7, #4]
|
|
8004e80: 683b ldr r3, [r7, #0]
|
|
8004e82: 781b ldrb r3, [r3, #0]
|
|
8004e84: 009b lsls r3, r3, #2
|
|
8004e86: 441a add r2, r3
|
|
8004e88: 8afb ldrh r3, [r7, #22]
|
|
8004e8a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004e8e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004e92: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004e96: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004e9a: b29b uxth r3, r3
|
|
8004e9c: 8013 strh r3, [r2, #0]
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004e9e: 687a ldr r2, [r7, #4]
|
|
8004ea0: 683b ldr r3, [r7, #0]
|
|
8004ea2: 781b ldrb r3, [r3, #0]
|
|
8004ea4: 009b lsls r3, r3, #2
|
|
8004ea6: 4413 add r3, r2
|
|
8004ea8: 881b ldrh r3, [r3, #0]
|
|
8004eaa: b29b uxth r3, r3
|
|
8004eac: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004eb0: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
8004eb4: 82bb strh r3, [r7, #20]
|
|
8004eb6: 687a ldr r2, [r7, #4]
|
|
8004eb8: 683b ldr r3, [r7, #0]
|
|
8004eba: 781b ldrb r3, [r3, #0]
|
|
8004ebc: 009b lsls r3, r3, #2
|
|
8004ebe: 441a add r2, r3
|
|
8004ec0: 8abb ldrh r3, [r7, #20]
|
|
8004ec2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004ec6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004eca: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004ece: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004ed2: b29b uxth r3, r3
|
|
8004ed4: 8013 strh r3, [r2, #0]
|
|
8004ed6: e0a3 b.n 8005020 <USB_DeactivateEndpoint+0x3cc>
|
|
}
|
|
else
|
|
{
|
|
/* Clear the data toggle bits for the endpoint IN/OUT*/
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
8004ed8: 687a ldr r2, [r7, #4]
|
|
8004eda: 683b ldr r3, [r7, #0]
|
|
8004edc: 781b ldrb r3, [r3, #0]
|
|
8004ede: 009b lsls r3, r3, #2
|
|
8004ee0: 4413 add r3, r2
|
|
8004ee2: 881b ldrh r3, [r3, #0]
|
|
8004ee4: 85fb strh r3, [r7, #46] @ 0x2e
|
|
8004ee6: 8dfb ldrh r3, [r7, #46] @ 0x2e
|
|
8004ee8: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8004eec: 2b00 cmp r3, #0
|
|
8004eee: d01b beq.n 8004f28 <USB_DeactivateEndpoint+0x2d4>
|
|
8004ef0: 687a ldr r2, [r7, #4]
|
|
8004ef2: 683b ldr r3, [r7, #0]
|
|
8004ef4: 781b ldrb r3, [r3, #0]
|
|
8004ef6: 009b lsls r3, r3, #2
|
|
8004ef8: 4413 add r3, r2
|
|
8004efa: 881b ldrh r3, [r3, #0]
|
|
8004efc: b29b uxth r3, r3
|
|
8004efe: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004f02: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004f06: 85bb strh r3, [r7, #44] @ 0x2c
|
|
8004f08: 687a ldr r2, [r7, #4]
|
|
8004f0a: 683b ldr r3, [r7, #0]
|
|
8004f0c: 781b ldrb r3, [r3, #0]
|
|
8004f0e: 009b lsls r3, r3, #2
|
|
8004f10: 441a add r2, r3
|
|
8004f12: 8dbb ldrh r3, [r7, #44] @ 0x2c
|
|
8004f14: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004f18: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004f1c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8004f20: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004f24: b29b uxth r3, r3
|
|
8004f26: 8013 strh r3, [r2, #0]
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
8004f28: 687a ldr r2, [r7, #4]
|
|
8004f2a: 683b ldr r3, [r7, #0]
|
|
8004f2c: 781b ldrb r3, [r3, #0]
|
|
8004f2e: 009b lsls r3, r3, #2
|
|
8004f30: 4413 add r3, r2
|
|
8004f32: 881b ldrh r3, [r3, #0]
|
|
8004f34: 857b strh r3, [r7, #42] @ 0x2a
|
|
8004f36: 8d7b ldrh r3, [r7, #42] @ 0x2a
|
|
8004f38: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8004f3c: 2b00 cmp r3, #0
|
|
8004f3e: d01b beq.n 8004f78 <USB_DeactivateEndpoint+0x324>
|
|
8004f40: 687a ldr r2, [r7, #4]
|
|
8004f42: 683b ldr r3, [r7, #0]
|
|
8004f44: 781b ldrb r3, [r3, #0]
|
|
8004f46: 009b lsls r3, r3, #2
|
|
8004f48: 4413 add r3, r2
|
|
8004f4a: 881b ldrh r3, [r3, #0]
|
|
8004f4c: b29b uxth r3, r3
|
|
8004f4e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004f52: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004f56: 853b strh r3, [r7, #40] @ 0x28
|
|
8004f58: 687a ldr r2, [r7, #4]
|
|
8004f5a: 683b ldr r3, [r7, #0]
|
|
8004f5c: 781b ldrb r3, [r3, #0]
|
|
8004f5e: 009b lsls r3, r3, #2
|
|
8004f60: 441a add r2, r3
|
|
8004f62: 8d3b ldrh r3, [r7, #40] @ 0x28
|
|
8004f64: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004f68: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004f6c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004f70: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
8004f74: b29b uxth r3, r3
|
|
8004f76: 8013 strh r3, [r2, #0]
|
|
PCD_RX_DTOG(USBx, ep->num);
|
|
8004f78: 687a ldr r2, [r7, #4]
|
|
8004f7a: 683b ldr r3, [r7, #0]
|
|
8004f7c: 781b ldrb r3, [r3, #0]
|
|
8004f7e: 009b lsls r3, r3, #2
|
|
8004f80: 4413 add r3, r2
|
|
8004f82: 881b ldrh r3, [r3, #0]
|
|
8004f84: b29b uxth r3, r3
|
|
8004f86: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004f8a: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004f8e: 84fb strh r3, [r7, #38] @ 0x26
|
|
8004f90: 687a ldr r2, [r7, #4]
|
|
8004f92: 683b ldr r3, [r7, #0]
|
|
8004f94: 781b ldrb r3, [r3, #0]
|
|
8004f96: 009b lsls r3, r3, #2
|
|
8004f98: 441a add r2, r3
|
|
8004f9a: 8cfb ldrh r3, [r7, #38] @ 0x26
|
|
8004f9c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004fa0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004fa4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8004fa8: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004fac: b29b uxth r3, r3
|
|
8004fae: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure DISABLE status for the Endpoint*/
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
|
8004fb0: 687a ldr r2, [r7, #4]
|
|
8004fb2: 683b ldr r3, [r7, #0]
|
|
8004fb4: 781b ldrb r3, [r3, #0]
|
|
8004fb6: 009b lsls r3, r3, #2
|
|
8004fb8: 4413 add r3, r2
|
|
8004fba: 881b ldrh r3, [r3, #0]
|
|
8004fbc: b29b uxth r3, r3
|
|
8004fbe: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8004fc2: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
8004fc6: 84bb strh r3, [r7, #36] @ 0x24
|
|
8004fc8: 687a ldr r2, [r7, #4]
|
|
8004fca: 683b ldr r3, [r7, #0]
|
|
8004fcc: 781b ldrb r3, [r3, #0]
|
|
8004fce: 009b lsls r3, r3, #2
|
|
8004fd0: 441a add r2, r3
|
|
8004fd2: 8cbb ldrh r3, [r7, #36] @ 0x24
|
|
8004fd4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8004fd8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8004fdc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8004fe0: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004fe4: b29b uxth r3, r3
|
|
8004fe6: 8013 strh r3, [r2, #0]
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
|
8004fe8: 687a ldr r2, [r7, #4]
|
|
8004fea: 683b ldr r3, [r7, #0]
|
|
8004fec: 781b ldrb r3, [r3, #0]
|
|
8004fee: 009b lsls r3, r3, #2
|
|
8004ff0: 4413 add r3, r2
|
|
8004ff2: 881b ldrh r3, [r3, #0]
|
|
8004ff4: b29b uxth r3, r3
|
|
8004ff6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
8004ffa: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8004ffe: 847b strh r3, [r7, #34] @ 0x22
|
|
8005000: 687a ldr r2, [r7, #4]
|
|
8005002: 683b ldr r3, [r7, #0]
|
|
8005004: 781b ldrb r3, [r3, #0]
|
|
8005006: 009b lsls r3, r3, #2
|
|
8005008: 441a add r2, r3
|
|
800500a: 8c7b ldrh r3, [r7, #34] @ 0x22
|
|
800500c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8005010: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8005014: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8005018: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
800501c: b29b uxth r3, r3
|
|
800501e: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
|
|
|
|
return HAL_OK;
|
|
8005020: 2300 movs r3, #0
|
|
}
|
|
8005022: 4618 mov r0, r3
|
|
8005024: 3734 adds r7, #52 @ 0x34
|
|
8005026: 46bd mov sp, r7
|
|
8005028: f85d 7b04 ldr.w r7, [sp], #4
|
|
800502c: 4770 bx lr
|
|
|
|
0800502e <USB_EPStartXfer>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
800502e: b580 push {r7, lr}
|
|
8005030: b0c2 sub sp, #264 @ 0x108
|
|
8005032: af00 add r7, sp, #0
|
|
8005034: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005038: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
800503c: 6018 str r0, [r3, #0]
|
|
800503e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005042: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005046: 6019 str r1, [r3, #0]
|
|
uint16_t pmabuffer;
|
|
uint16_t wEPVal;
|
|
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
|
|
|
|
/* IN endpoint */
|
|
if (ep->is_in == 1U)
|
|
8005048: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800504c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005050: 681b ldr r3, [r3, #0]
|
|
8005052: 785b ldrb r3, [r3, #1]
|
|
8005054: 2b01 cmp r3, #1
|
|
8005056: f040 86b7 bne.w 8005dc8 <USB_EPStartXfer+0xd9a>
|
|
{
|
|
/*Multi packet transfer*/
|
|
if (ep->xfer_len > ep->maxpacket)
|
|
800505a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800505e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005062: 681b ldr r3, [r3, #0]
|
|
8005064: 699a ldr r2, [r3, #24]
|
|
8005066: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800506a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800506e: 681b ldr r3, [r3, #0]
|
|
8005070: 691b ldr r3, [r3, #16]
|
|
8005072: 429a cmp r2, r3
|
|
8005074: d908 bls.n 8005088 <USB_EPStartXfer+0x5a>
|
|
{
|
|
len = ep->maxpacket;
|
|
8005076: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800507a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800507e: 681b ldr r3, [r3, #0]
|
|
8005080: 691b ldr r3, [r3, #16]
|
|
8005082: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
8005086: e007 b.n 8005098 <USB_EPStartXfer+0x6a>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len;
|
|
8005088: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800508c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005090: 681b ldr r3, [r3, #0]
|
|
8005092: 699b ldr r3, [r3, #24]
|
|
8005094: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
}
|
|
|
|
/* configure and validate Tx endpoint */
|
|
if (ep->doublebuffer == 0U)
|
|
8005098: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800509c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80050a0: 681b ldr r3, [r3, #0]
|
|
80050a2: 7b1b ldrb r3, [r3, #12]
|
|
80050a4: 2b00 cmp r3, #0
|
|
80050a6: d13a bne.n 800511e <USB_EPStartXfer+0xf0>
|
|
{
|
|
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
|
|
80050a8: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80050ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80050b0: 681b ldr r3, [r3, #0]
|
|
80050b2: 6959 ldr r1, [r3, #20]
|
|
80050b4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80050b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80050bc: 681b ldr r3, [r3, #0]
|
|
80050be: 88da ldrh r2, [r3, #6]
|
|
80050c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80050c4: b29b uxth r3, r3
|
|
80050c6: f507 7084 add.w r0, r7, #264 @ 0x108
|
|
80050ca: f5a0 7082 sub.w r0, r0, #260 @ 0x104
|
|
80050ce: 6800 ldr r0, [r0, #0]
|
|
80050d0: f001 fc8c bl 80069ec <USB_WritePMA>
|
|
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
|
|
80050d4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80050d8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80050dc: 681b ldr r3, [r3, #0]
|
|
80050de: 613b str r3, [r7, #16]
|
|
80050e0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80050e4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80050e8: 681b ldr r3, [r3, #0]
|
|
80050ea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80050ee: b29b uxth r3, r3
|
|
80050f0: 461a mov r2, r3
|
|
80050f2: 693b ldr r3, [r7, #16]
|
|
80050f4: 4413 add r3, r2
|
|
80050f6: 613b str r3, [r7, #16]
|
|
80050f8: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80050fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005100: 681b ldr r3, [r3, #0]
|
|
8005102: 781b ldrb r3, [r3, #0]
|
|
8005104: 00da lsls r2, r3, #3
|
|
8005106: 693b ldr r3, [r7, #16]
|
|
8005108: 4413 add r3, r2
|
|
800510a: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
800510e: 60fb str r3, [r7, #12]
|
|
8005110: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005114: b29a uxth r2, r3
|
|
8005116: 68fb ldr r3, [r7, #12]
|
|
8005118: 801a strh r2, [r3, #0]
|
|
800511a: f000 be1f b.w 8005d5c <USB_EPStartXfer+0xd2e>
|
|
}
|
|
#if (USE_USB_DOUBLE_BUFFER == 1U)
|
|
else
|
|
{
|
|
/* double buffer bulk management */
|
|
if (ep->type == EP_TYPE_BULK)
|
|
800511e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005122: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005126: 681b ldr r3, [r3, #0]
|
|
8005128: 78db ldrb r3, [r3, #3]
|
|
800512a: 2b02 cmp r3, #2
|
|
800512c: f040 8462 bne.w 80059f4 <USB_EPStartXfer+0x9c6>
|
|
{
|
|
if (ep->xfer_len_db > ep->maxpacket)
|
|
8005130: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005134: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005138: 681b ldr r3, [r3, #0]
|
|
800513a: 6a1a ldr r2, [r3, #32]
|
|
800513c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005140: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005144: 681b ldr r3, [r3, #0]
|
|
8005146: 691b ldr r3, [r3, #16]
|
|
8005148: 429a cmp r2, r3
|
|
800514a: f240 83df bls.w 800590c <USB_EPStartXfer+0x8de>
|
|
{
|
|
/* enable double buffer */
|
|
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
|
|
800514e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005152: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005156: 681a ldr r2, [r3, #0]
|
|
8005158: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800515c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005160: 681b ldr r3, [r3, #0]
|
|
8005162: 781b ldrb r3, [r3, #0]
|
|
8005164: 009b lsls r3, r3, #2
|
|
8005166: 4413 add r3, r2
|
|
8005168: 881b ldrh r3, [r3, #0]
|
|
800516a: b29b uxth r3, r3
|
|
800516c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8005170: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8005174: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
|
|
8005178: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800517c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005180: 681a ldr r2, [r3, #0]
|
|
8005182: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005186: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800518a: 681b ldr r3, [r3, #0]
|
|
800518c: 781b ldrb r3, [r3, #0]
|
|
800518e: 009b lsls r3, r3, #2
|
|
8005190: 441a add r2, r3
|
|
8005192: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
|
|
8005196: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
800519a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
800519e: f443 4301 orr.w r3, r3, #33024 @ 0x8100
|
|
80051a2: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
80051a6: b29b uxth r3, r3
|
|
80051a8: 8013 strh r3, [r2, #0]
|
|
|
|
/* each Time to write in PMA xfer_len_db will */
|
|
ep->xfer_len_db -= len;
|
|
80051aa: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80051ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80051b2: 681b ldr r3, [r3, #0]
|
|
80051b4: 6a1a ldr r2, [r3, #32]
|
|
80051b6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80051ba: 1ad2 subs r2, r2, r3
|
|
80051bc: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80051c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80051c4: 681b ldr r3, [r3, #0]
|
|
80051c6: 621a str r2, [r3, #32]
|
|
|
|
/* Fill the two first buffer in the Buffer0 & Buffer1 */
|
|
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
|
|
80051c8: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80051cc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80051d0: 681a ldr r2, [r3, #0]
|
|
80051d2: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80051d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80051da: 681b ldr r3, [r3, #0]
|
|
80051dc: 781b ldrb r3, [r3, #0]
|
|
80051de: 009b lsls r3, r3, #2
|
|
80051e0: 4413 add r3, r2
|
|
80051e2: 881b ldrh r3, [r3, #0]
|
|
80051e4: b29b uxth r3, r3
|
|
80051e6: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
80051ea: 2b00 cmp r3, #0
|
|
80051ec: f000 81c7 beq.w 800557e <USB_EPStartXfer+0x550>
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer1 */
|
|
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
|
|
80051f0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80051f4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80051f8: 681b ldr r3, [r3, #0]
|
|
80051fa: 633b str r3, [r7, #48] @ 0x30
|
|
80051fc: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005200: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005204: 681b ldr r3, [r3, #0]
|
|
8005206: 785b ldrb r3, [r3, #1]
|
|
8005208: 2b00 cmp r3, #0
|
|
800520a: d177 bne.n 80052fc <USB_EPStartXfer+0x2ce>
|
|
800520c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005210: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005214: 681b ldr r3, [r3, #0]
|
|
8005216: 62bb str r3, [r7, #40] @ 0x28
|
|
8005218: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800521c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005220: 681b ldr r3, [r3, #0]
|
|
8005222: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8005226: b29b uxth r3, r3
|
|
8005228: 461a mov r2, r3
|
|
800522a: 6abb ldr r3, [r7, #40] @ 0x28
|
|
800522c: 4413 add r3, r2
|
|
800522e: 62bb str r3, [r7, #40] @ 0x28
|
|
8005230: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005234: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005238: 681b ldr r3, [r3, #0]
|
|
800523a: 781b ldrb r3, [r3, #0]
|
|
800523c: 00da lsls r2, r3, #3
|
|
800523e: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8005240: 4413 add r3, r2
|
|
8005242: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8005246: 627b str r3, [r7, #36] @ 0x24
|
|
8005248: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
800524a: 881b ldrh r3, [r3, #0]
|
|
800524c: b29b uxth r3, r3
|
|
800524e: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8005252: b29a uxth r2, r3
|
|
8005254: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8005256: 801a strh r2, [r3, #0]
|
|
8005258: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800525c: 2b3e cmp r3, #62 @ 0x3e
|
|
800525e: d921 bls.n 80052a4 <USB_EPStartXfer+0x276>
|
|
8005260: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005264: 095b lsrs r3, r3, #5
|
|
8005266: f8c7 3100 str.w r3, [r7, #256] @ 0x100
|
|
800526a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800526e: f003 031f and.w r3, r3, #31
|
|
8005272: 2b00 cmp r3, #0
|
|
8005274: d104 bne.n 8005280 <USB_EPStartXfer+0x252>
|
|
8005276: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
|
|
800527a: 3b01 subs r3, #1
|
|
800527c: f8c7 3100 str.w r3, [r7, #256] @ 0x100
|
|
8005280: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8005282: 881b ldrh r3, [r3, #0]
|
|
8005284: b29a uxth r2, r3
|
|
8005286: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
|
|
800528a: b29b uxth r3, r3
|
|
800528c: 029b lsls r3, r3, #10
|
|
800528e: b29b uxth r3, r3
|
|
8005290: 4313 orrs r3, r2
|
|
8005292: b29b uxth r3, r3
|
|
8005294: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005298: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800529c: b29a uxth r2, r3
|
|
800529e: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80052a0: 801a strh r2, [r3, #0]
|
|
80052a2: e050 b.n 8005346 <USB_EPStartXfer+0x318>
|
|
80052a4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80052a8: 2b00 cmp r3, #0
|
|
80052aa: d10a bne.n 80052c2 <USB_EPStartXfer+0x294>
|
|
80052ac: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80052ae: 881b ldrh r3, [r3, #0]
|
|
80052b0: b29b uxth r3, r3
|
|
80052b2: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80052b6: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80052ba: b29a uxth r2, r3
|
|
80052bc: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80052be: 801a strh r2, [r3, #0]
|
|
80052c0: e041 b.n 8005346 <USB_EPStartXfer+0x318>
|
|
80052c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80052c6: 085b lsrs r3, r3, #1
|
|
80052c8: f8c7 3100 str.w r3, [r7, #256] @ 0x100
|
|
80052cc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80052d0: f003 0301 and.w r3, r3, #1
|
|
80052d4: 2b00 cmp r3, #0
|
|
80052d6: d004 beq.n 80052e2 <USB_EPStartXfer+0x2b4>
|
|
80052d8: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
|
|
80052dc: 3301 adds r3, #1
|
|
80052de: f8c7 3100 str.w r3, [r7, #256] @ 0x100
|
|
80052e2: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80052e4: 881b ldrh r3, [r3, #0]
|
|
80052e6: b29a uxth r2, r3
|
|
80052e8: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
|
|
80052ec: b29b uxth r3, r3
|
|
80052ee: 029b lsls r3, r3, #10
|
|
80052f0: b29b uxth r3, r3
|
|
80052f2: 4313 orrs r3, r2
|
|
80052f4: b29a uxth r2, r3
|
|
80052f6: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
80052f8: 801a strh r2, [r3, #0]
|
|
80052fa: e024 b.n 8005346 <USB_EPStartXfer+0x318>
|
|
80052fc: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005300: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005304: 681b ldr r3, [r3, #0]
|
|
8005306: 785b ldrb r3, [r3, #1]
|
|
8005308: 2b01 cmp r3, #1
|
|
800530a: d11c bne.n 8005346 <USB_EPStartXfer+0x318>
|
|
800530c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005310: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005314: 681b ldr r3, [r3, #0]
|
|
8005316: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800531a: b29b uxth r3, r3
|
|
800531c: 461a mov r2, r3
|
|
800531e: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
8005320: 4413 add r3, r2
|
|
8005322: 633b str r3, [r7, #48] @ 0x30
|
|
8005324: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005328: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800532c: 681b ldr r3, [r3, #0]
|
|
800532e: 781b ldrb r3, [r3, #0]
|
|
8005330: 00da lsls r2, r3, #3
|
|
8005332: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
8005334: 4413 add r3, r2
|
|
8005336: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
800533a: 62fb str r3, [r7, #44] @ 0x2c
|
|
800533c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005340: b29a uxth r2, r3
|
|
8005342: 6afb ldr r3, [r7, #44] @ 0x2c
|
|
8005344: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr1;
|
|
8005346: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800534a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800534e: 681b ldr r3, [r3, #0]
|
|
8005350: 895b ldrh r3, [r3, #10]
|
|
8005352: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
8005356: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800535a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800535e: 681b ldr r3, [r3, #0]
|
|
8005360: 6959 ldr r1, [r3, #20]
|
|
8005362: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005366: b29b uxth r3, r3
|
|
8005368: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
|
|
800536c: f507 7084 add.w r0, r7, #264 @ 0x108
|
|
8005370: f5a0 7082 sub.w r0, r0, #260 @ 0x104
|
|
8005374: 6800 ldr r0, [r0, #0]
|
|
8005376: f001 fb39 bl 80069ec <USB_WritePMA>
|
|
ep->xfer_buff += len;
|
|
800537a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800537e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005382: 681b ldr r3, [r3, #0]
|
|
8005384: 695a ldr r2, [r3, #20]
|
|
8005386: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800538a: 441a add r2, r3
|
|
800538c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005390: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005394: 681b ldr r3, [r3, #0]
|
|
8005396: 615a str r2, [r3, #20]
|
|
|
|
if (ep->xfer_len_db > ep->maxpacket)
|
|
8005398: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800539c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80053a0: 681b ldr r3, [r3, #0]
|
|
80053a2: 6a1a ldr r2, [r3, #32]
|
|
80053a4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80053a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80053ac: 681b ldr r3, [r3, #0]
|
|
80053ae: 691b ldr r3, [r3, #16]
|
|
80053b0: 429a cmp r2, r3
|
|
80053b2: d90f bls.n 80053d4 <USB_EPStartXfer+0x3a6>
|
|
{
|
|
ep->xfer_len_db -= len;
|
|
80053b4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80053b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80053bc: 681b ldr r3, [r3, #0]
|
|
80053be: 6a1a ldr r2, [r3, #32]
|
|
80053c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80053c4: 1ad2 subs r2, r2, r3
|
|
80053c6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80053ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80053ce: 681b ldr r3, [r3, #0]
|
|
80053d0: 621a str r2, [r3, #32]
|
|
80053d2: e00e b.n 80053f2 <USB_EPStartXfer+0x3c4>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len_db;
|
|
80053d4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80053d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80053dc: 681b ldr r3, [r3, #0]
|
|
80053de: 6a1b ldr r3, [r3, #32]
|
|
80053e0: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
ep->xfer_len_db = 0U;
|
|
80053e4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80053e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80053ec: 681b ldr r3, [r3, #0]
|
|
80053ee: 2200 movs r2, #0
|
|
80053f0: 621a str r2, [r3, #32]
|
|
}
|
|
|
|
/* Set the Double buffer counter for pmabuffer0 */
|
|
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
|
|
80053f2: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80053f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80053fa: 681b ldr r3, [r3, #0]
|
|
80053fc: 785b ldrb r3, [r3, #1]
|
|
80053fe: 2b00 cmp r3, #0
|
|
8005400: d177 bne.n 80054f2 <USB_EPStartXfer+0x4c4>
|
|
8005402: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005406: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
800540a: 681b ldr r3, [r3, #0]
|
|
800540c: 61bb str r3, [r7, #24]
|
|
800540e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005412: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005416: 681b ldr r3, [r3, #0]
|
|
8005418: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800541c: b29b uxth r3, r3
|
|
800541e: 461a mov r2, r3
|
|
8005420: 69bb ldr r3, [r7, #24]
|
|
8005422: 4413 add r3, r2
|
|
8005424: 61bb str r3, [r7, #24]
|
|
8005426: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800542a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800542e: 681b ldr r3, [r3, #0]
|
|
8005430: 781b ldrb r3, [r3, #0]
|
|
8005432: 00da lsls r2, r3, #3
|
|
8005434: 69bb ldr r3, [r7, #24]
|
|
8005436: 4413 add r3, r2
|
|
8005438: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
800543c: 617b str r3, [r7, #20]
|
|
800543e: 697b ldr r3, [r7, #20]
|
|
8005440: 881b ldrh r3, [r3, #0]
|
|
8005442: b29b uxth r3, r3
|
|
8005444: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8005448: b29a uxth r2, r3
|
|
800544a: 697b ldr r3, [r7, #20]
|
|
800544c: 801a strh r2, [r3, #0]
|
|
800544e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005452: 2b3e cmp r3, #62 @ 0x3e
|
|
8005454: d921 bls.n 800549a <USB_EPStartXfer+0x46c>
|
|
8005456: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800545a: 095b lsrs r3, r3, #5
|
|
800545c: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
|
|
8005460: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005464: f003 031f and.w r3, r3, #31
|
|
8005468: 2b00 cmp r3, #0
|
|
800546a: d104 bne.n 8005476 <USB_EPStartXfer+0x448>
|
|
800546c: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
|
|
8005470: 3b01 subs r3, #1
|
|
8005472: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
|
|
8005476: 697b ldr r3, [r7, #20]
|
|
8005478: 881b ldrh r3, [r3, #0]
|
|
800547a: b29a uxth r2, r3
|
|
800547c: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
|
|
8005480: b29b uxth r3, r3
|
|
8005482: 029b lsls r3, r3, #10
|
|
8005484: b29b uxth r3, r3
|
|
8005486: 4313 orrs r3, r2
|
|
8005488: b29b uxth r3, r3
|
|
800548a: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800548e: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005492: b29a uxth r2, r3
|
|
8005494: 697b ldr r3, [r7, #20]
|
|
8005496: 801a strh r2, [r3, #0]
|
|
8005498: e056 b.n 8005548 <USB_EPStartXfer+0x51a>
|
|
800549a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800549e: 2b00 cmp r3, #0
|
|
80054a0: d10a bne.n 80054b8 <USB_EPStartXfer+0x48a>
|
|
80054a2: 697b ldr r3, [r7, #20]
|
|
80054a4: 881b ldrh r3, [r3, #0]
|
|
80054a6: b29b uxth r3, r3
|
|
80054a8: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80054ac: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80054b0: b29a uxth r2, r3
|
|
80054b2: 697b ldr r3, [r7, #20]
|
|
80054b4: 801a strh r2, [r3, #0]
|
|
80054b6: e047 b.n 8005548 <USB_EPStartXfer+0x51a>
|
|
80054b8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80054bc: 085b lsrs r3, r3, #1
|
|
80054be: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
|
|
80054c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80054c6: f003 0301 and.w r3, r3, #1
|
|
80054ca: 2b00 cmp r3, #0
|
|
80054cc: d004 beq.n 80054d8 <USB_EPStartXfer+0x4aa>
|
|
80054ce: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
|
|
80054d2: 3301 adds r3, #1
|
|
80054d4: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
|
|
80054d8: 697b ldr r3, [r7, #20]
|
|
80054da: 881b ldrh r3, [r3, #0]
|
|
80054dc: b29a uxth r2, r3
|
|
80054de: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
|
|
80054e2: b29b uxth r3, r3
|
|
80054e4: 029b lsls r3, r3, #10
|
|
80054e6: b29b uxth r3, r3
|
|
80054e8: 4313 orrs r3, r2
|
|
80054ea: b29a uxth r2, r3
|
|
80054ec: 697b ldr r3, [r7, #20]
|
|
80054ee: 801a strh r2, [r3, #0]
|
|
80054f0: e02a b.n 8005548 <USB_EPStartXfer+0x51a>
|
|
80054f2: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80054f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80054fa: 681b ldr r3, [r3, #0]
|
|
80054fc: 785b ldrb r3, [r3, #1]
|
|
80054fe: 2b01 cmp r3, #1
|
|
8005500: d122 bne.n 8005548 <USB_EPStartXfer+0x51a>
|
|
8005502: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005506: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
800550a: 681b ldr r3, [r3, #0]
|
|
800550c: 623b str r3, [r7, #32]
|
|
800550e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005512: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005516: 681b ldr r3, [r3, #0]
|
|
8005518: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800551c: b29b uxth r3, r3
|
|
800551e: 461a mov r2, r3
|
|
8005520: 6a3b ldr r3, [r7, #32]
|
|
8005522: 4413 add r3, r2
|
|
8005524: 623b str r3, [r7, #32]
|
|
8005526: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800552a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800552e: 681b ldr r3, [r3, #0]
|
|
8005530: 781b ldrb r3, [r3, #0]
|
|
8005532: 00da lsls r2, r3, #3
|
|
8005534: 6a3b ldr r3, [r7, #32]
|
|
8005536: 4413 add r3, r2
|
|
8005538: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
800553c: 61fb str r3, [r7, #28]
|
|
800553e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005542: b29a uxth r2, r3
|
|
8005544: 69fb ldr r3, [r7, #28]
|
|
8005546: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr0;
|
|
8005548: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800554c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005550: 681b ldr r3, [r3, #0]
|
|
8005552: 891b ldrh r3, [r3, #8]
|
|
8005554: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
8005558: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800555c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005560: 681b ldr r3, [r3, #0]
|
|
8005562: 6959 ldr r1, [r3, #20]
|
|
8005564: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005568: b29b uxth r3, r3
|
|
800556a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
|
|
800556e: f507 7084 add.w r0, r7, #264 @ 0x108
|
|
8005572: f5a0 7082 sub.w r0, r0, #260 @ 0x104
|
|
8005576: 6800 ldr r0, [r0, #0]
|
|
8005578: f001 fa38 bl 80069ec <USB_WritePMA>
|
|
800557c: e3ee b.n 8005d5c <USB_EPStartXfer+0xd2e>
|
|
}
|
|
else
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer0 */
|
|
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
|
|
800557e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005582: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005586: 681b ldr r3, [r3, #0]
|
|
8005588: 785b ldrb r3, [r3, #1]
|
|
800558a: 2b00 cmp r3, #0
|
|
800558c: d177 bne.n 800567e <USB_EPStartXfer+0x650>
|
|
800558e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005592: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005596: 681b ldr r3, [r3, #0]
|
|
8005598: 64bb str r3, [r7, #72] @ 0x48
|
|
800559a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800559e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80055a2: 681b ldr r3, [r3, #0]
|
|
80055a4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80055a8: b29b uxth r3, r3
|
|
80055aa: 461a mov r2, r3
|
|
80055ac: 6cbb ldr r3, [r7, #72] @ 0x48
|
|
80055ae: 4413 add r3, r2
|
|
80055b0: 64bb str r3, [r7, #72] @ 0x48
|
|
80055b2: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80055b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80055ba: 681b ldr r3, [r3, #0]
|
|
80055bc: 781b ldrb r3, [r3, #0]
|
|
80055be: 00da lsls r2, r3, #3
|
|
80055c0: 6cbb ldr r3, [r7, #72] @ 0x48
|
|
80055c2: 4413 add r3, r2
|
|
80055c4: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
80055c8: 647b str r3, [r7, #68] @ 0x44
|
|
80055ca: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
80055cc: 881b ldrh r3, [r3, #0]
|
|
80055ce: b29b uxth r3, r3
|
|
80055d0: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80055d4: b29a uxth r2, r3
|
|
80055d6: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
80055d8: 801a strh r2, [r3, #0]
|
|
80055da: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80055de: 2b3e cmp r3, #62 @ 0x3e
|
|
80055e0: d921 bls.n 8005626 <USB_EPStartXfer+0x5f8>
|
|
80055e2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80055e6: 095b lsrs r3, r3, #5
|
|
80055e8: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
|
|
80055ec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80055f0: f003 031f and.w r3, r3, #31
|
|
80055f4: 2b00 cmp r3, #0
|
|
80055f6: d104 bne.n 8005602 <USB_EPStartXfer+0x5d4>
|
|
80055f8: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
|
|
80055fc: 3b01 subs r3, #1
|
|
80055fe: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
|
|
8005602: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
8005604: 881b ldrh r3, [r3, #0]
|
|
8005606: b29a uxth r2, r3
|
|
8005608: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
|
|
800560c: b29b uxth r3, r3
|
|
800560e: 029b lsls r3, r3, #10
|
|
8005610: b29b uxth r3, r3
|
|
8005612: 4313 orrs r3, r2
|
|
8005614: b29b uxth r3, r3
|
|
8005616: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800561a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800561e: b29a uxth r2, r3
|
|
8005620: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
8005622: 801a strh r2, [r3, #0]
|
|
8005624: e056 b.n 80056d4 <USB_EPStartXfer+0x6a6>
|
|
8005626: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800562a: 2b00 cmp r3, #0
|
|
800562c: d10a bne.n 8005644 <USB_EPStartXfer+0x616>
|
|
800562e: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
8005630: 881b ldrh r3, [r3, #0]
|
|
8005632: b29b uxth r3, r3
|
|
8005634: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005638: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800563c: b29a uxth r2, r3
|
|
800563e: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
8005640: 801a strh r2, [r3, #0]
|
|
8005642: e047 b.n 80056d4 <USB_EPStartXfer+0x6a6>
|
|
8005644: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005648: 085b lsrs r3, r3, #1
|
|
800564a: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
|
|
800564e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005652: f003 0301 and.w r3, r3, #1
|
|
8005656: 2b00 cmp r3, #0
|
|
8005658: d004 beq.n 8005664 <USB_EPStartXfer+0x636>
|
|
800565a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
|
|
800565e: 3301 adds r3, #1
|
|
8005660: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
|
|
8005664: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
8005666: 881b ldrh r3, [r3, #0]
|
|
8005668: b29a uxth r2, r3
|
|
800566a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
|
|
800566e: b29b uxth r3, r3
|
|
8005670: 029b lsls r3, r3, #10
|
|
8005672: b29b uxth r3, r3
|
|
8005674: 4313 orrs r3, r2
|
|
8005676: b29a uxth r2, r3
|
|
8005678: 6c7b ldr r3, [r7, #68] @ 0x44
|
|
800567a: 801a strh r2, [r3, #0]
|
|
800567c: e02a b.n 80056d4 <USB_EPStartXfer+0x6a6>
|
|
800567e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005682: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005686: 681b ldr r3, [r3, #0]
|
|
8005688: 785b ldrb r3, [r3, #1]
|
|
800568a: 2b01 cmp r3, #1
|
|
800568c: d122 bne.n 80056d4 <USB_EPStartXfer+0x6a6>
|
|
800568e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005692: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005696: 681b ldr r3, [r3, #0]
|
|
8005698: 653b str r3, [r7, #80] @ 0x50
|
|
800569a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800569e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80056a2: 681b ldr r3, [r3, #0]
|
|
80056a4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80056a8: b29b uxth r3, r3
|
|
80056aa: 461a mov r2, r3
|
|
80056ac: 6d3b ldr r3, [r7, #80] @ 0x50
|
|
80056ae: 4413 add r3, r2
|
|
80056b0: 653b str r3, [r7, #80] @ 0x50
|
|
80056b2: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80056b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80056ba: 681b ldr r3, [r3, #0]
|
|
80056bc: 781b ldrb r3, [r3, #0]
|
|
80056be: 00da lsls r2, r3, #3
|
|
80056c0: 6d3b ldr r3, [r7, #80] @ 0x50
|
|
80056c2: 4413 add r3, r2
|
|
80056c4: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
80056c8: 64fb str r3, [r7, #76] @ 0x4c
|
|
80056ca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80056ce: b29a uxth r2, r3
|
|
80056d0: 6cfb ldr r3, [r7, #76] @ 0x4c
|
|
80056d2: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr0;
|
|
80056d4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80056d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80056dc: 681b ldr r3, [r3, #0]
|
|
80056de: 891b ldrh r3, [r3, #8]
|
|
80056e0: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
80056e4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80056e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80056ec: 681b ldr r3, [r3, #0]
|
|
80056ee: 6959 ldr r1, [r3, #20]
|
|
80056f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80056f4: b29b uxth r3, r3
|
|
80056f6: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
|
|
80056fa: f507 7084 add.w r0, r7, #264 @ 0x108
|
|
80056fe: f5a0 7082 sub.w r0, r0, #260 @ 0x104
|
|
8005702: 6800 ldr r0, [r0, #0]
|
|
8005704: f001 f972 bl 80069ec <USB_WritePMA>
|
|
ep->xfer_buff += len;
|
|
8005708: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800570c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005710: 681b ldr r3, [r3, #0]
|
|
8005712: 695a ldr r2, [r3, #20]
|
|
8005714: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005718: 441a add r2, r3
|
|
800571a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800571e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005722: 681b ldr r3, [r3, #0]
|
|
8005724: 615a str r2, [r3, #20]
|
|
|
|
if (ep->xfer_len_db > ep->maxpacket)
|
|
8005726: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800572a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800572e: 681b ldr r3, [r3, #0]
|
|
8005730: 6a1a ldr r2, [r3, #32]
|
|
8005732: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005736: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800573a: 681b ldr r3, [r3, #0]
|
|
800573c: 691b ldr r3, [r3, #16]
|
|
800573e: 429a cmp r2, r3
|
|
8005740: d90f bls.n 8005762 <USB_EPStartXfer+0x734>
|
|
{
|
|
ep->xfer_len_db -= len;
|
|
8005742: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005746: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800574a: 681b ldr r3, [r3, #0]
|
|
800574c: 6a1a ldr r2, [r3, #32]
|
|
800574e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005752: 1ad2 subs r2, r2, r3
|
|
8005754: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005758: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800575c: 681b ldr r3, [r3, #0]
|
|
800575e: 621a str r2, [r3, #32]
|
|
8005760: e00e b.n 8005780 <USB_EPStartXfer+0x752>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len_db;
|
|
8005762: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005766: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800576a: 681b ldr r3, [r3, #0]
|
|
800576c: 6a1b ldr r3, [r3, #32]
|
|
800576e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
ep->xfer_len_db = 0U;
|
|
8005772: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005776: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800577a: 681b ldr r3, [r3, #0]
|
|
800577c: 2200 movs r2, #0
|
|
800577e: 621a str r2, [r3, #32]
|
|
}
|
|
|
|
/* Set the Double buffer counter for pmabuffer1 */
|
|
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
|
|
8005780: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005784: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005788: 681b ldr r3, [r3, #0]
|
|
800578a: 643b str r3, [r7, #64] @ 0x40
|
|
800578c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005790: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005794: 681b ldr r3, [r3, #0]
|
|
8005796: 785b ldrb r3, [r3, #1]
|
|
8005798: 2b00 cmp r3, #0
|
|
800579a: d177 bne.n 800588c <USB_EPStartXfer+0x85e>
|
|
800579c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80057a0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80057a4: 681b ldr r3, [r3, #0]
|
|
80057a6: 63bb str r3, [r7, #56] @ 0x38
|
|
80057a8: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80057ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80057b0: 681b ldr r3, [r3, #0]
|
|
80057b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80057b6: b29b uxth r3, r3
|
|
80057b8: 461a mov r2, r3
|
|
80057ba: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
80057bc: 4413 add r3, r2
|
|
80057be: 63bb str r3, [r7, #56] @ 0x38
|
|
80057c0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80057c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80057c8: 681b ldr r3, [r3, #0]
|
|
80057ca: 781b ldrb r3, [r3, #0]
|
|
80057cc: 00da lsls r2, r3, #3
|
|
80057ce: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
80057d0: 4413 add r3, r2
|
|
80057d2: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
80057d6: 637b str r3, [r7, #52] @ 0x34
|
|
80057d8: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
80057da: 881b ldrh r3, [r3, #0]
|
|
80057dc: b29b uxth r3, r3
|
|
80057de: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80057e2: b29a uxth r2, r3
|
|
80057e4: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
80057e6: 801a strh r2, [r3, #0]
|
|
80057e8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80057ec: 2b3e cmp r3, #62 @ 0x3e
|
|
80057ee: d921 bls.n 8005834 <USB_EPStartXfer+0x806>
|
|
80057f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80057f4: 095b lsrs r3, r3, #5
|
|
80057f6: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
|
|
80057fa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80057fe: f003 031f and.w r3, r3, #31
|
|
8005802: 2b00 cmp r3, #0
|
|
8005804: d104 bne.n 8005810 <USB_EPStartXfer+0x7e2>
|
|
8005806: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
|
|
800580a: 3b01 subs r3, #1
|
|
800580c: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
|
|
8005810: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
8005812: 881b ldrh r3, [r3, #0]
|
|
8005814: b29a uxth r2, r3
|
|
8005816: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
|
|
800581a: b29b uxth r3, r3
|
|
800581c: 029b lsls r3, r3, #10
|
|
800581e: b29b uxth r3, r3
|
|
8005820: 4313 orrs r3, r2
|
|
8005822: b29b uxth r3, r3
|
|
8005824: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005828: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800582c: b29a uxth r2, r3
|
|
800582e: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
8005830: 801a strh r2, [r3, #0]
|
|
8005832: e050 b.n 80058d6 <USB_EPStartXfer+0x8a8>
|
|
8005834: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005838: 2b00 cmp r3, #0
|
|
800583a: d10a bne.n 8005852 <USB_EPStartXfer+0x824>
|
|
800583c: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
800583e: 881b ldrh r3, [r3, #0]
|
|
8005840: b29b uxth r3, r3
|
|
8005842: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005846: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800584a: b29a uxth r2, r3
|
|
800584c: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
800584e: 801a strh r2, [r3, #0]
|
|
8005850: e041 b.n 80058d6 <USB_EPStartXfer+0x8a8>
|
|
8005852: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005856: 085b lsrs r3, r3, #1
|
|
8005858: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
|
|
800585c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005860: f003 0301 and.w r3, r3, #1
|
|
8005864: 2b00 cmp r3, #0
|
|
8005866: d004 beq.n 8005872 <USB_EPStartXfer+0x844>
|
|
8005868: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
|
|
800586c: 3301 adds r3, #1
|
|
800586e: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
|
|
8005872: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
8005874: 881b ldrh r3, [r3, #0]
|
|
8005876: b29a uxth r2, r3
|
|
8005878: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
|
|
800587c: b29b uxth r3, r3
|
|
800587e: 029b lsls r3, r3, #10
|
|
8005880: b29b uxth r3, r3
|
|
8005882: 4313 orrs r3, r2
|
|
8005884: b29a uxth r2, r3
|
|
8005886: 6b7b ldr r3, [r7, #52] @ 0x34
|
|
8005888: 801a strh r2, [r3, #0]
|
|
800588a: e024 b.n 80058d6 <USB_EPStartXfer+0x8a8>
|
|
800588c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005890: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005894: 681b ldr r3, [r3, #0]
|
|
8005896: 785b ldrb r3, [r3, #1]
|
|
8005898: 2b01 cmp r3, #1
|
|
800589a: d11c bne.n 80058d6 <USB_EPStartXfer+0x8a8>
|
|
800589c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80058a0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80058a4: 681b ldr r3, [r3, #0]
|
|
80058a6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80058aa: b29b uxth r3, r3
|
|
80058ac: 461a mov r2, r3
|
|
80058ae: 6c3b ldr r3, [r7, #64] @ 0x40
|
|
80058b0: 4413 add r3, r2
|
|
80058b2: 643b str r3, [r7, #64] @ 0x40
|
|
80058b4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80058b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80058bc: 681b ldr r3, [r3, #0]
|
|
80058be: 781b ldrb r3, [r3, #0]
|
|
80058c0: 00da lsls r2, r3, #3
|
|
80058c2: 6c3b ldr r3, [r7, #64] @ 0x40
|
|
80058c4: 4413 add r3, r2
|
|
80058c6: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
80058ca: 63fb str r3, [r7, #60] @ 0x3c
|
|
80058cc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80058d0: b29a uxth r2, r3
|
|
80058d2: 6bfb ldr r3, [r7, #60] @ 0x3c
|
|
80058d4: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr1;
|
|
80058d6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80058da: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80058de: 681b ldr r3, [r3, #0]
|
|
80058e0: 895b ldrh r3, [r3, #10]
|
|
80058e2: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
80058e6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80058ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80058ee: 681b ldr r3, [r3, #0]
|
|
80058f0: 6959 ldr r1, [r3, #20]
|
|
80058f2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80058f6: b29b uxth r3, r3
|
|
80058f8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
|
|
80058fc: f507 7084 add.w r0, r7, #264 @ 0x108
|
|
8005900: f5a0 7082 sub.w r0, r0, #260 @ 0x104
|
|
8005904: 6800 ldr r0, [r0, #0]
|
|
8005906: f001 f871 bl 80069ec <USB_WritePMA>
|
|
800590a: e227 b.n 8005d5c <USB_EPStartXfer+0xd2e>
|
|
}
|
|
}
|
|
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
|
|
else
|
|
{
|
|
len = ep->xfer_len_db;
|
|
800590c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005910: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005914: 681b ldr r3, [r3, #0]
|
|
8005916: 6a1b ldr r3, [r3, #32]
|
|
8005918: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
|
|
/* disable double buffer mode for Bulk endpoint */
|
|
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
|
|
800591c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005920: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005924: 681a ldr r2, [r3, #0]
|
|
8005926: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800592a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800592e: 681b ldr r3, [r3, #0]
|
|
8005930: 781b ldrb r3, [r3, #0]
|
|
8005932: 009b lsls r3, r3, #2
|
|
8005934: 4413 add r3, r2
|
|
8005936: 881b ldrh r3, [r3, #0]
|
|
8005938: b29b uxth r3, r3
|
|
800593a: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
|
|
800593e: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8005942: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
|
|
8005946: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800594a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
800594e: 681a ldr r2, [r3, #0]
|
|
8005950: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005954: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005958: 681b ldr r3, [r3, #0]
|
|
800595a: 781b ldrb r3, [r3, #0]
|
|
800595c: 009b lsls r3, r3, #2
|
|
800595e: 441a add r2, r3
|
|
8005960: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
|
|
8005964: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8005968: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
800596c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8005970: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8005974: b29b uxth r3, r3
|
|
8005976: 8013 strh r3, [r2, #0]
|
|
|
|
/* Set Tx count with nbre of byte to be transmitted */
|
|
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
|
|
8005978: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800597c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005980: 681b ldr r3, [r3, #0]
|
|
8005982: 65fb str r3, [r7, #92] @ 0x5c
|
|
8005984: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005988: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
800598c: 681b ldr r3, [r3, #0]
|
|
800598e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8005992: b29b uxth r3, r3
|
|
8005994: 461a mov r2, r3
|
|
8005996: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8005998: 4413 add r3, r2
|
|
800599a: 65fb str r3, [r7, #92] @ 0x5c
|
|
800599c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80059a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80059a4: 681b ldr r3, [r3, #0]
|
|
80059a6: 781b ldrb r3, [r3, #0]
|
|
80059a8: 00da lsls r2, r3, #3
|
|
80059aa: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
80059ac: 4413 add r3, r2
|
|
80059ae: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
80059b2: 65bb str r3, [r7, #88] @ 0x58
|
|
80059b4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80059b8: b29a uxth r2, r3
|
|
80059ba: 6dbb ldr r3, [r7, #88] @ 0x58
|
|
80059bc: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr0;
|
|
80059be: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80059c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80059c6: 681b ldr r3, [r3, #0]
|
|
80059c8: 891b ldrh r3, [r3, #8]
|
|
80059ca: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
80059ce: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80059d2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80059d6: 681b ldr r3, [r3, #0]
|
|
80059d8: 6959 ldr r1, [r3, #20]
|
|
80059da: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80059de: b29b uxth r3, r3
|
|
80059e0: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
|
|
80059e4: f507 7084 add.w r0, r7, #264 @ 0x108
|
|
80059e8: f5a0 7082 sub.w r0, r0, #260 @ 0x104
|
|
80059ec: 6800 ldr r0, [r0, #0]
|
|
80059ee: f000 fffd bl 80069ec <USB_WritePMA>
|
|
80059f2: e1b3 b.n 8005d5c <USB_EPStartXfer+0xd2e>
|
|
}
|
|
}
|
|
else /* manage isochronous double buffer IN mode */
|
|
{
|
|
/* each Time to write in PMA xfer_len_db will */
|
|
ep->xfer_len_db -= len;
|
|
80059f4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80059f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80059fc: 681b ldr r3, [r3, #0]
|
|
80059fe: 6a1a ldr r2, [r3, #32]
|
|
8005a00: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005a04: 1ad2 subs r2, r2, r3
|
|
8005a06: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005a0a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005a0e: 681b ldr r3, [r3, #0]
|
|
8005a10: 621a str r2, [r3, #32]
|
|
|
|
/* Fill the data buffer */
|
|
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
|
|
8005a12: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005a16: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005a1a: 681a ldr r2, [r3, #0]
|
|
8005a1c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005a20: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005a24: 681b ldr r3, [r3, #0]
|
|
8005a26: 781b ldrb r3, [r3, #0]
|
|
8005a28: 009b lsls r3, r3, #2
|
|
8005a2a: 4413 add r3, r2
|
|
8005a2c: 881b ldrh r3, [r3, #0]
|
|
8005a2e: b29b uxth r3, r3
|
|
8005a30: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8005a34: 2b00 cmp r3, #0
|
|
8005a36: f000 80c6 beq.w 8005bc6 <USB_EPStartXfer+0xb98>
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer1 */
|
|
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
|
|
8005a3a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005a3e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005a42: 681b ldr r3, [r3, #0]
|
|
8005a44: 673b str r3, [r7, #112] @ 0x70
|
|
8005a46: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005a4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005a4e: 681b ldr r3, [r3, #0]
|
|
8005a50: 785b ldrb r3, [r3, #1]
|
|
8005a52: 2b00 cmp r3, #0
|
|
8005a54: d177 bne.n 8005b46 <USB_EPStartXfer+0xb18>
|
|
8005a56: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005a5a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005a5e: 681b ldr r3, [r3, #0]
|
|
8005a60: 66bb str r3, [r7, #104] @ 0x68
|
|
8005a62: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005a66: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005a6a: 681b ldr r3, [r3, #0]
|
|
8005a6c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8005a70: b29b uxth r3, r3
|
|
8005a72: 461a mov r2, r3
|
|
8005a74: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
8005a76: 4413 add r3, r2
|
|
8005a78: 66bb str r3, [r7, #104] @ 0x68
|
|
8005a7a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005a7e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005a82: 681b ldr r3, [r3, #0]
|
|
8005a84: 781b ldrb r3, [r3, #0]
|
|
8005a86: 00da lsls r2, r3, #3
|
|
8005a88: 6ebb ldr r3, [r7, #104] @ 0x68
|
|
8005a8a: 4413 add r3, r2
|
|
8005a8c: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8005a90: 667b str r3, [r7, #100] @ 0x64
|
|
8005a92: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8005a94: 881b ldrh r3, [r3, #0]
|
|
8005a96: b29b uxth r3, r3
|
|
8005a98: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8005a9c: b29a uxth r2, r3
|
|
8005a9e: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8005aa0: 801a strh r2, [r3, #0]
|
|
8005aa2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005aa6: 2b3e cmp r3, #62 @ 0x3e
|
|
8005aa8: d921 bls.n 8005aee <USB_EPStartXfer+0xac0>
|
|
8005aaa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005aae: 095b lsrs r3, r3, #5
|
|
8005ab0: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
|
|
8005ab4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005ab8: f003 031f and.w r3, r3, #31
|
|
8005abc: 2b00 cmp r3, #0
|
|
8005abe: d104 bne.n 8005aca <USB_EPStartXfer+0xa9c>
|
|
8005ac0: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
|
|
8005ac4: 3b01 subs r3, #1
|
|
8005ac6: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
|
|
8005aca: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8005acc: 881b ldrh r3, [r3, #0]
|
|
8005ace: b29a uxth r2, r3
|
|
8005ad0: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
|
|
8005ad4: b29b uxth r3, r3
|
|
8005ad6: 029b lsls r3, r3, #10
|
|
8005ad8: b29b uxth r3, r3
|
|
8005ada: 4313 orrs r3, r2
|
|
8005adc: b29b uxth r3, r3
|
|
8005ade: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005ae2: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005ae6: b29a uxth r2, r3
|
|
8005ae8: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8005aea: 801a strh r2, [r3, #0]
|
|
8005aec: e050 b.n 8005b90 <USB_EPStartXfer+0xb62>
|
|
8005aee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005af2: 2b00 cmp r3, #0
|
|
8005af4: d10a bne.n 8005b0c <USB_EPStartXfer+0xade>
|
|
8005af6: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8005af8: 881b ldrh r3, [r3, #0]
|
|
8005afa: b29b uxth r3, r3
|
|
8005afc: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005b00: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005b04: b29a uxth r2, r3
|
|
8005b06: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8005b08: 801a strh r2, [r3, #0]
|
|
8005b0a: e041 b.n 8005b90 <USB_EPStartXfer+0xb62>
|
|
8005b0c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005b10: 085b lsrs r3, r3, #1
|
|
8005b12: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
|
|
8005b16: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005b1a: f003 0301 and.w r3, r3, #1
|
|
8005b1e: 2b00 cmp r3, #0
|
|
8005b20: d004 beq.n 8005b2c <USB_EPStartXfer+0xafe>
|
|
8005b22: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
|
|
8005b26: 3301 adds r3, #1
|
|
8005b28: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
|
|
8005b2c: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8005b2e: 881b ldrh r3, [r3, #0]
|
|
8005b30: b29a uxth r2, r3
|
|
8005b32: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
|
|
8005b36: b29b uxth r3, r3
|
|
8005b38: 029b lsls r3, r3, #10
|
|
8005b3a: b29b uxth r3, r3
|
|
8005b3c: 4313 orrs r3, r2
|
|
8005b3e: b29a uxth r2, r3
|
|
8005b40: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8005b42: 801a strh r2, [r3, #0]
|
|
8005b44: e024 b.n 8005b90 <USB_EPStartXfer+0xb62>
|
|
8005b46: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005b4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005b4e: 681b ldr r3, [r3, #0]
|
|
8005b50: 785b ldrb r3, [r3, #1]
|
|
8005b52: 2b01 cmp r3, #1
|
|
8005b54: d11c bne.n 8005b90 <USB_EPStartXfer+0xb62>
|
|
8005b56: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005b5a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005b5e: 681b ldr r3, [r3, #0]
|
|
8005b60: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8005b64: b29b uxth r3, r3
|
|
8005b66: 461a mov r2, r3
|
|
8005b68: 6f3b ldr r3, [r7, #112] @ 0x70
|
|
8005b6a: 4413 add r3, r2
|
|
8005b6c: 673b str r3, [r7, #112] @ 0x70
|
|
8005b6e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005b72: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005b76: 681b ldr r3, [r3, #0]
|
|
8005b78: 781b ldrb r3, [r3, #0]
|
|
8005b7a: 00da lsls r2, r3, #3
|
|
8005b7c: 6f3b ldr r3, [r7, #112] @ 0x70
|
|
8005b7e: 4413 add r3, r2
|
|
8005b80: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8005b84: 66fb str r3, [r7, #108] @ 0x6c
|
|
8005b86: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005b8a: b29a uxth r2, r3
|
|
8005b8c: 6efb ldr r3, [r7, #108] @ 0x6c
|
|
8005b8e: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr1;
|
|
8005b90: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005b94: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005b98: 681b ldr r3, [r3, #0]
|
|
8005b9a: 895b ldrh r3, [r3, #10]
|
|
8005b9c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
8005ba0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005ba4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005ba8: 681b ldr r3, [r3, #0]
|
|
8005baa: 6959 ldr r1, [r3, #20]
|
|
8005bac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005bb0: b29b uxth r3, r3
|
|
8005bb2: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
|
|
8005bb6: f507 7084 add.w r0, r7, #264 @ 0x108
|
|
8005bba: f5a0 7082 sub.w r0, r0, #260 @ 0x104
|
|
8005bbe: 6800 ldr r0, [r0, #0]
|
|
8005bc0: f000 ff14 bl 80069ec <USB_WritePMA>
|
|
8005bc4: e0ca b.n 8005d5c <USB_EPStartXfer+0xd2e>
|
|
}
|
|
else
|
|
{
|
|
/* Set the Double buffer counter for pmabuffer0 */
|
|
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
|
|
8005bc6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005bca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005bce: 681b ldr r3, [r3, #0]
|
|
8005bd0: 785b ldrb r3, [r3, #1]
|
|
8005bd2: 2b00 cmp r3, #0
|
|
8005bd4: d177 bne.n 8005cc6 <USB_EPStartXfer+0xc98>
|
|
8005bd6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005bda: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005bde: 681b ldr r3, [r3, #0]
|
|
8005be0: 67fb str r3, [r7, #124] @ 0x7c
|
|
8005be2: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005be6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005bea: 681b ldr r3, [r3, #0]
|
|
8005bec: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8005bf0: b29b uxth r3, r3
|
|
8005bf2: 461a mov r2, r3
|
|
8005bf4: 6ffb ldr r3, [r7, #124] @ 0x7c
|
|
8005bf6: 4413 add r3, r2
|
|
8005bf8: 67fb str r3, [r7, #124] @ 0x7c
|
|
8005bfa: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005bfe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005c02: 681b ldr r3, [r3, #0]
|
|
8005c04: 781b ldrb r3, [r3, #0]
|
|
8005c06: 00da lsls r2, r3, #3
|
|
8005c08: 6ffb ldr r3, [r7, #124] @ 0x7c
|
|
8005c0a: 4413 add r3, r2
|
|
8005c0c: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8005c10: 67bb str r3, [r7, #120] @ 0x78
|
|
8005c12: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
8005c14: 881b ldrh r3, [r3, #0]
|
|
8005c16: b29b uxth r3, r3
|
|
8005c18: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8005c1c: b29a uxth r2, r3
|
|
8005c1e: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
8005c20: 801a strh r2, [r3, #0]
|
|
8005c22: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005c26: 2b3e cmp r3, #62 @ 0x3e
|
|
8005c28: d921 bls.n 8005c6e <USB_EPStartXfer+0xc40>
|
|
8005c2a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005c2e: 095b lsrs r3, r3, #5
|
|
8005c30: f8c7 30ec str.w r3, [r7, #236] @ 0xec
|
|
8005c34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005c38: f003 031f and.w r3, r3, #31
|
|
8005c3c: 2b00 cmp r3, #0
|
|
8005c3e: d104 bne.n 8005c4a <USB_EPStartXfer+0xc1c>
|
|
8005c40: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
|
|
8005c44: 3b01 subs r3, #1
|
|
8005c46: f8c7 30ec str.w r3, [r7, #236] @ 0xec
|
|
8005c4a: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
8005c4c: 881b ldrh r3, [r3, #0]
|
|
8005c4e: b29a uxth r2, r3
|
|
8005c50: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
|
|
8005c54: b29b uxth r3, r3
|
|
8005c56: 029b lsls r3, r3, #10
|
|
8005c58: b29b uxth r3, r3
|
|
8005c5a: 4313 orrs r3, r2
|
|
8005c5c: b29b uxth r3, r3
|
|
8005c5e: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005c62: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005c66: b29a uxth r2, r3
|
|
8005c68: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
8005c6a: 801a strh r2, [r3, #0]
|
|
8005c6c: e05c b.n 8005d28 <USB_EPStartXfer+0xcfa>
|
|
8005c6e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005c72: 2b00 cmp r3, #0
|
|
8005c74: d10a bne.n 8005c8c <USB_EPStartXfer+0xc5e>
|
|
8005c76: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
8005c78: 881b ldrh r3, [r3, #0]
|
|
8005c7a: b29b uxth r3, r3
|
|
8005c7c: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005c80: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005c84: b29a uxth r2, r3
|
|
8005c86: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
8005c88: 801a strh r2, [r3, #0]
|
|
8005c8a: e04d b.n 8005d28 <USB_EPStartXfer+0xcfa>
|
|
8005c8c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005c90: 085b lsrs r3, r3, #1
|
|
8005c92: f8c7 30ec str.w r3, [r7, #236] @ 0xec
|
|
8005c96: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005c9a: f003 0301 and.w r3, r3, #1
|
|
8005c9e: 2b00 cmp r3, #0
|
|
8005ca0: d004 beq.n 8005cac <USB_EPStartXfer+0xc7e>
|
|
8005ca2: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
|
|
8005ca6: 3301 adds r3, #1
|
|
8005ca8: f8c7 30ec str.w r3, [r7, #236] @ 0xec
|
|
8005cac: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
8005cae: 881b ldrh r3, [r3, #0]
|
|
8005cb0: b29a uxth r2, r3
|
|
8005cb2: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
|
|
8005cb6: b29b uxth r3, r3
|
|
8005cb8: 029b lsls r3, r3, #10
|
|
8005cba: b29b uxth r3, r3
|
|
8005cbc: 4313 orrs r3, r2
|
|
8005cbe: b29a uxth r2, r3
|
|
8005cc0: 6fbb ldr r3, [r7, #120] @ 0x78
|
|
8005cc2: 801a strh r2, [r3, #0]
|
|
8005cc4: e030 b.n 8005d28 <USB_EPStartXfer+0xcfa>
|
|
8005cc6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005cca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005cce: 681b ldr r3, [r3, #0]
|
|
8005cd0: 785b ldrb r3, [r3, #1]
|
|
8005cd2: 2b01 cmp r3, #1
|
|
8005cd4: d128 bne.n 8005d28 <USB_EPStartXfer+0xcfa>
|
|
8005cd6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005cda: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005cde: 681b ldr r3, [r3, #0]
|
|
8005ce0: f8c7 3084 str.w r3, [r7, #132] @ 0x84
|
|
8005ce4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005ce8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005cec: 681b ldr r3, [r3, #0]
|
|
8005cee: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8005cf2: b29b uxth r3, r3
|
|
8005cf4: 461a mov r2, r3
|
|
8005cf6: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
|
|
8005cfa: 4413 add r3, r2
|
|
8005cfc: f8c7 3084 str.w r3, [r7, #132] @ 0x84
|
|
8005d00: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005d04: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005d08: 681b ldr r3, [r3, #0]
|
|
8005d0a: 781b ldrb r3, [r3, #0]
|
|
8005d0c: 00da lsls r2, r3, #3
|
|
8005d0e: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
|
|
8005d12: 4413 add r3, r2
|
|
8005d14: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8005d18: f8c7 3080 str.w r3, [r7, #128] @ 0x80
|
|
8005d1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005d20: b29a uxth r2, r3
|
|
8005d22: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
|
|
8005d26: 801a strh r2, [r3, #0]
|
|
pmabuffer = ep->pmaaddr0;
|
|
8005d28: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005d2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005d30: 681b ldr r3, [r3, #0]
|
|
8005d32: 891b ldrh r3, [r3, #8]
|
|
8005d34: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
|
|
|
|
/* Write the user buffer to USB PMA */
|
|
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
|
8005d38: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005d3c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005d40: 681b ldr r3, [r3, #0]
|
|
8005d42: 6959 ldr r1, [r3, #20]
|
|
8005d44: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005d48: b29b uxth r3, r3
|
|
8005d4a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
|
|
8005d4e: f507 7084 add.w r0, r7, #264 @ 0x108
|
|
8005d52: f5a0 7082 sub.w r0, r0, #260 @ 0x104
|
|
8005d56: 6800 ldr r0, [r0, #0]
|
|
8005d58: f000 fe48 bl 80069ec <USB_WritePMA>
|
|
}
|
|
}
|
|
}
|
|
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
|
|
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
|
|
8005d5c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005d60: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005d64: 681a ldr r2, [r3, #0]
|
|
8005d66: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005d6a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005d6e: 681b ldr r3, [r3, #0]
|
|
8005d70: 781b ldrb r3, [r3, #0]
|
|
8005d72: 009b lsls r3, r3, #2
|
|
8005d74: 4413 add r3, r2
|
|
8005d76: 881b ldrh r3, [r3, #0]
|
|
8005d78: b29b uxth r3, r3
|
|
8005d7a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8005d7e: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
8005d82: 817b strh r3, [r7, #10]
|
|
8005d84: 897b ldrh r3, [r7, #10]
|
|
8005d86: f083 0310 eor.w r3, r3, #16
|
|
8005d8a: 817b strh r3, [r7, #10]
|
|
8005d8c: 897b ldrh r3, [r7, #10]
|
|
8005d8e: f083 0320 eor.w r3, r3, #32
|
|
8005d92: 817b strh r3, [r7, #10]
|
|
8005d94: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005d98: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005d9c: 681a ldr r2, [r3, #0]
|
|
8005d9e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005da2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005da6: 681b ldr r3, [r3, #0]
|
|
8005da8: 781b ldrb r3, [r3, #0]
|
|
8005daa: 009b lsls r3, r3, #2
|
|
8005dac: 441a add r2, r3
|
|
8005dae: 897b ldrh r3, [r7, #10]
|
|
8005db0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8005db4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8005db8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8005dbc: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8005dc0: b29b uxth r3, r3
|
|
8005dc2: 8013 strh r3, [r2, #0]
|
|
8005dc4: f000 bcde b.w 8006784 <USB_EPStartXfer+0x1756>
|
|
}
|
|
else /* OUT endpoint */
|
|
{
|
|
if (ep->doublebuffer == 0U)
|
|
8005dc8: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005dcc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005dd0: 681b ldr r3, [r3, #0]
|
|
8005dd2: 7b1b ldrb r3, [r3, #12]
|
|
8005dd4: 2b00 cmp r3, #0
|
|
8005dd6: f040 80bb bne.w 8005f50 <USB_EPStartXfer+0xf22>
|
|
{
|
|
/* Multi packet transfer */
|
|
if (ep->xfer_len > ep->maxpacket)
|
|
8005dda: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005dde: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005de2: 681b ldr r3, [r3, #0]
|
|
8005de4: 699a ldr r2, [r3, #24]
|
|
8005de6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005dea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005dee: 681b ldr r3, [r3, #0]
|
|
8005df0: 691b ldr r3, [r3, #16]
|
|
8005df2: 429a cmp r2, r3
|
|
8005df4: d917 bls.n 8005e26 <USB_EPStartXfer+0xdf8>
|
|
{
|
|
len = ep->maxpacket;
|
|
8005df6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005dfa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005dfe: 681b ldr r3, [r3, #0]
|
|
8005e00: 691b ldr r3, [r3, #16]
|
|
8005e02: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
ep->xfer_len -= len;
|
|
8005e06: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005e0a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005e0e: 681b ldr r3, [r3, #0]
|
|
8005e10: 699a ldr r2, [r3, #24]
|
|
8005e12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005e16: 1ad2 subs r2, r2, r3
|
|
8005e18: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005e1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005e20: 681b ldr r3, [r3, #0]
|
|
8005e22: 619a str r2, [r3, #24]
|
|
8005e24: e00e b.n 8005e44 <USB_EPStartXfer+0xe16>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len;
|
|
8005e26: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005e2a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005e2e: 681b ldr r3, [r3, #0]
|
|
8005e30: 699b ldr r3, [r3, #24]
|
|
8005e32: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
ep->xfer_len = 0U;
|
|
8005e36: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005e3a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005e3e: 681b ldr r3, [r3, #0]
|
|
8005e40: 2200 movs r2, #0
|
|
8005e42: 619a str r2, [r3, #24]
|
|
}
|
|
/* configure and validate Rx endpoint */
|
|
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
|
|
8005e44: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005e48: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005e4c: 681b ldr r3, [r3, #0]
|
|
8005e4e: f8c7 3090 str.w r3, [r7, #144] @ 0x90
|
|
8005e52: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005e56: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005e5a: 681b ldr r3, [r3, #0]
|
|
8005e5c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8005e60: b29b uxth r3, r3
|
|
8005e62: 461a mov r2, r3
|
|
8005e64: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
|
|
8005e68: 4413 add r3, r2
|
|
8005e6a: f8c7 3090 str.w r3, [r7, #144] @ 0x90
|
|
8005e6e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005e72: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005e76: 681b ldr r3, [r3, #0]
|
|
8005e78: 781b ldrb r3, [r3, #0]
|
|
8005e7a: 00da lsls r2, r3, #3
|
|
8005e7c: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
|
|
8005e80: 4413 add r3, r2
|
|
8005e82: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
8005e86: f8c7 308c str.w r3, [r7, #140] @ 0x8c
|
|
8005e8a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8005e8e: 881b ldrh r3, [r3, #0]
|
|
8005e90: b29b uxth r3, r3
|
|
8005e92: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8005e96: b29a uxth r2, r3
|
|
8005e98: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8005e9c: 801a strh r2, [r3, #0]
|
|
8005e9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005ea2: 2b3e cmp r3, #62 @ 0x3e
|
|
8005ea4: d924 bls.n 8005ef0 <USB_EPStartXfer+0xec2>
|
|
8005ea6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005eaa: 095b lsrs r3, r3, #5
|
|
8005eac: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
|
|
8005eb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005eb4: f003 031f and.w r3, r3, #31
|
|
8005eb8: 2b00 cmp r3, #0
|
|
8005eba: d104 bne.n 8005ec6 <USB_EPStartXfer+0xe98>
|
|
8005ebc: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
|
|
8005ec0: 3b01 subs r3, #1
|
|
8005ec2: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
|
|
8005ec6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8005eca: 881b ldrh r3, [r3, #0]
|
|
8005ecc: b29a uxth r2, r3
|
|
8005ece: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
|
|
8005ed2: b29b uxth r3, r3
|
|
8005ed4: 029b lsls r3, r3, #10
|
|
8005ed6: b29b uxth r3, r3
|
|
8005ed8: 4313 orrs r3, r2
|
|
8005eda: b29b uxth r3, r3
|
|
8005edc: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005ee0: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005ee4: b29a uxth r2, r3
|
|
8005ee6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8005eea: 801a strh r2, [r3, #0]
|
|
8005eec: f000 bc10 b.w 8006710 <USB_EPStartXfer+0x16e2>
|
|
8005ef0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005ef4: 2b00 cmp r3, #0
|
|
8005ef6: d10c bne.n 8005f12 <USB_EPStartXfer+0xee4>
|
|
8005ef8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8005efc: 881b ldrh r3, [r3, #0]
|
|
8005efe: b29b uxth r3, r3
|
|
8005f00: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8005f04: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8005f08: b29a uxth r2, r3
|
|
8005f0a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8005f0e: 801a strh r2, [r3, #0]
|
|
8005f10: e3fe b.n 8006710 <USB_EPStartXfer+0x16e2>
|
|
8005f12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005f16: 085b lsrs r3, r3, #1
|
|
8005f18: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
|
|
8005f1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8005f20: f003 0301 and.w r3, r3, #1
|
|
8005f24: 2b00 cmp r3, #0
|
|
8005f26: d004 beq.n 8005f32 <USB_EPStartXfer+0xf04>
|
|
8005f28: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
|
|
8005f2c: 3301 adds r3, #1
|
|
8005f2e: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
|
|
8005f32: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8005f36: 881b ldrh r3, [r3, #0]
|
|
8005f38: b29a uxth r2, r3
|
|
8005f3a: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
|
|
8005f3e: b29b uxth r3, r3
|
|
8005f40: 029b lsls r3, r3, #10
|
|
8005f42: b29b uxth r3, r3
|
|
8005f44: 4313 orrs r3, r2
|
|
8005f46: b29a uxth r2, r3
|
|
8005f48: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
|
|
8005f4c: 801a strh r2, [r3, #0]
|
|
8005f4e: e3df b.n 8006710 <USB_EPStartXfer+0x16e2>
|
|
#if (USE_USB_DOUBLE_BUFFER == 1U)
|
|
else
|
|
{
|
|
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
|
|
/* Set the Double buffer counter */
|
|
if (ep->type == EP_TYPE_BULK)
|
|
8005f50: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005f54: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005f58: 681b ldr r3, [r3, #0]
|
|
8005f5a: 78db ldrb r3, [r3, #3]
|
|
8005f5c: 2b02 cmp r3, #2
|
|
8005f5e: f040 8218 bne.w 8006392 <USB_EPStartXfer+0x1364>
|
|
{
|
|
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
|
|
8005f62: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005f66: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005f6a: 681b ldr r3, [r3, #0]
|
|
8005f6c: 785b ldrb r3, [r3, #1]
|
|
8005f6e: 2b00 cmp r3, #0
|
|
8005f70: f040 809d bne.w 80060ae <USB_EPStartXfer+0x1080>
|
|
8005f74: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005f78: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005f7c: 681b ldr r3, [r3, #0]
|
|
8005f7e: f8c7 30ac str.w r3, [r7, #172] @ 0xac
|
|
8005f82: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005f86: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8005f8a: 681b ldr r3, [r3, #0]
|
|
8005f8c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8005f90: b29b uxth r3, r3
|
|
8005f92: 461a mov r2, r3
|
|
8005f94: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
|
|
8005f98: 4413 add r3, r2
|
|
8005f9a: f8c7 30ac str.w r3, [r7, #172] @ 0xac
|
|
8005f9e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005fa2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005fa6: 681b ldr r3, [r3, #0]
|
|
8005fa8: 781b ldrb r3, [r3, #0]
|
|
8005faa: 00da lsls r2, r3, #3
|
|
8005fac: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
|
|
8005fb0: 4413 add r3, r2
|
|
8005fb2: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8005fb6: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
|
|
8005fba: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
|
|
8005fbe: 881b ldrh r3, [r3, #0]
|
|
8005fc0: b29b uxth r3, r3
|
|
8005fc2: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8005fc6: b29a uxth r2, r3
|
|
8005fc8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
|
|
8005fcc: 801a strh r2, [r3, #0]
|
|
8005fce: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005fd2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005fd6: 681b ldr r3, [r3, #0]
|
|
8005fd8: 691b ldr r3, [r3, #16]
|
|
8005fda: 2b3e cmp r3, #62 @ 0x3e
|
|
8005fdc: d92b bls.n 8006036 <USB_EPStartXfer+0x1008>
|
|
8005fde: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005fe2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005fe6: 681b ldr r3, [r3, #0]
|
|
8005fe8: 691b ldr r3, [r3, #16]
|
|
8005fea: 095b lsrs r3, r3, #5
|
|
8005fec: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
|
|
8005ff0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8005ff4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8005ff8: 681b ldr r3, [r3, #0]
|
|
8005ffa: 691b ldr r3, [r3, #16]
|
|
8005ffc: f003 031f and.w r3, r3, #31
|
|
8006000: 2b00 cmp r3, #0
|
|
8006002: d104 bne.n 800600e <USB_EPStartXfer+0xfe0>
|
|
8006004: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
|
|
8006008: 3b01 subs r3, #1
|
|
800600a: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
|
|
800600e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
|
|
8006012: 881b ldrh r3, [r3, #0]
|
|
8006014: b29a uxth r2, r3
|
|
8006016: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
|
|
800601a: b29b uxth r3, r3
|
|
800601c: 029b lsls r3, r3, #10
|
|
800601e: b29b uxth r3, r3
|
|
8006020: 4313 orrs r3, r2
|
|
8006022: b29b uxth r3, r3
|
|
8006024: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006028: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800602c: b29a uxth r2, r3
|
|
800602e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
|
|
8006032: 801a strh r2, [r3, #0]
|
|
8006034: e070 b.n 8006118 <USB_EPStartXfer+0x10ea>
|
|
8006036: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800603a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800603e: 681b ldr r3, [r3, #0]
|
|
8006040: 691b ldr r3, [r3, #16]
|
|
8006042: 2b00 cmp r3, #0
|
|
8006044: d10c bne.n 8006060 <USB_EPStartXfer+0x1032>
|
|
8006046: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
|
|
800604a: 881b ldrh r3, [r3, #0]
|
|
800604c: b29b uxth r3, r3
|
|
800604e: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006052: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
8006056: b29a uxth r2, r3
|
|
8006058: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
|
|
800605c: 801a strh r2, [r3, #0]
|
|
800605e: e05b b.n 8006118 <USB_EPStartXfer+0x10ea>
|
|
8006060: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006064: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006068: 681b ldr r3, [r3, #0]
|
|
800606a: 691b ldr r3, [r3, #16]
|
|
800606c: 085b lsrs r3, r3, #1
|
|
800606e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
|
|
8006072: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006076: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800607a: 681b ldr r3, [r3, #0]
|
|
800607c: 691b ldr r3, [r3, #16]
|
|
800607e: f003 0301 and.w r3, r3, #1
|
|
8006082: 2b00 cmp r3, #0
|
|
8006084: d004 beq.n 8006090 <USB_EPStartXfer+0x1062>
|
|
8006086: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
|
|
800608a: 3301 adds r3, #1
|
|
800608c: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
|
|
8006090: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
|
|
8006094: 881b ldrh r3, [r3, #0]
|
|
8006096: b29a uxth r2, r3
|
|
8006098: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
|
|
800609c: b29b uxth r3, r3
|
|
800609e: 029b lsls r3, r3, #10
|
|
80060a0: b29b uxth r3, r3
|
|
80060a2: 4313 orrs r3, r2
|
|
80060a4: b29a uxth r2, r3
|
|
80060a6: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
|
|
80060aa: 801a strh r2, [r3, #0]
|
|
80060ac: e034 b.n 8006118 <USB_EPStartXfer+0x10ea>
|
|
80060ae: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80060b2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80060b6: 681b ldr r3, [r3, #0]
|
|
80060b8: 785b ldrb r3, [r3, #1]
|
|
80060ba: 2b01 cmp r3, #1
|
|
80060bc: d12c bne.n 8006118 <USB_EPStartXfer+0x10ea>
|
|
80060be: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80060c2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80060c6: 681b ldr r3, [r3, #0]
|
|
80060c8: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
|
|
80060cc: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80060d0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80060d4: 681b ldr r3, [r3, #0]
|
|
80060d6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80060da: b29b uxth r3, r3
|
|
80060dc: 461a mov r2, r3
|
|
80060de: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
|
|
80060e2: 4413 add r3, r2
|
|
80060e4: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
|
|
80060e8: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80060ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80060f0: 681b ldr r3, [r3, #0]
|
|
80060f2: 781b ldrb r3, [r3, #0]
|
|
80060f4: 00da lsls r2, r3, #3
|
|
80060f6: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
|
|
80060fa: 4413 add r3, r2
|
|
80060fc: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8006100: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
|
|
8006104: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006108: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800610c: 681b ldr r3, [r3, #0]
|
|
800610e: 691b ldr r3, [r3, #16]
|
|
8006110: b29a uxth r2, r3
|
|
8006112: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
|
|
8006116: 801a strh r2, [r3, #0]
|
|
8006118: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800611c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8006120: 681b ldr r3, [r3, #0]
|
|
8006122: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
|
|
8006126: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800612a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800612e: 681b ldr r3, [r3, #0]
|
|
8006130: 785b ldrb r3, [r3, #1]
|
|
8006132: 2b00 cmp r3, #0
|
|
8006134: f040 809d bne.w 8006272 <USB_EPStartXfer+0x1244>
|
|
8006138: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800613c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8006140: 681b ldr r3, [r3, #0]
|
|
8006142: f8c7 309c str.w r3, [r7, #156] @ 0x9c
|
|
8006146: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800614a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
800614e: 681b ldr r3, [r3, #0]
|
|
8006150: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8006154: b29b uxth r3, r3
|
|
8006156: 461a mov r2, r3
|
|
8006158: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
|
|
800615c: 4413 add r3, r2
|
|
800615e: f8c7 309c str.w r3, [r7, #156] @ 0x9c
|
|
8006162: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006166: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800616a: 681b ldr r3, [r3, #0]
|
|
800616c: 781b ldrb r3, [r3, #0]
|
|
800616e: 00da lsls r2, r3, #3
|
|
8006170: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
|
|
8006174: 4413 add r3, r2
|
|
8006176: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
800617a: f8c7 3098 str.w r3, [r7, #152] @ 0x98
|
|
800617e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
|
|
8006182: 881b ldrh r3, [r3, #0]
|
|
8006184: b29b uxth r3, r3
|
|
8006186: f3c3 0309 ubfx r3, r3, #0, #10
|
|
800618a: b29a uxth r2, r3
|
|
800618c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
|
|
8006190: 801a strh r2, [r3, #0]
|
|
8006192: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006196: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800619a: 681b ldr r3, [r3, #0]
|
|
800619c: 691b ldr r3, [r3, #16]
|
|
800619e: 2b3e cmp r3, #62 @ 0x3e
|
|
80061a0: d92b bls.n 80061fa <USB_EPStartXfer+0x11cc>
|
|
80061a2: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80061a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80061aa: 681b ldr r3, [r3, #0]
|
|
80061ac: 691b ldr r3, [r3, #16]
|
|
80061ae: 095b lsrs r3, r3, #5
|
|
80061b0: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
|
|
80061b4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80061b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80061bc: 681b ldr r3, [r3, #0]
|
|
80061be: 691b ldr r3, [r3, #16]
|
|
80061c0: f003 031f and.w r3, r3, #31
|
|
80061c4: 2b00 cmp r3, #0
|
|
80061c6: d104 bne.n 80061d2 <USB_EPStartXfer+0x11a4>
|
|
80061c8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
|
|
80061cc: 3b01 subs r3, #1
|
|
80061ce: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
|
|
80061d2: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
|
|
80061d6: 881b ldrh r3, [r3, #0]
|
|
80061d8: b29a uxth r2, r3
|
|
80061da: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
|
|
80061de: b29b uxth r3, r3
|
|
80061e0: 029b lsls r3, r3, #10
|
|
80061e2: b29b uxth r3, r3
|
|
80061e4: 4313 orrs r3, r2
|
|
80061e6: b29b uxth r3, r3
|
|
80061e8: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80061ec: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80061f0: b29a uxth r2, r3
|
|
80061f2: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
|
|
80061f6: 801a strh r2, [r3, #0]
|
|
80061f8: e069 b.n 80062ce <USB_EPStartXfer+0x12a0>
|
|
80061fa: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80061fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006202: 681b ldr r3, [r3, #0]
|
|
8006204: 691b ldr r3, [r3, #16]
|
|
8006206: 2b00 cmp r3, #0
|
|
8006208: d10c bne.n 8006224 <USB_EPStartXfer+0x11f6>
|
|
800620a: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
|
|
800620e: 881b ldrh r3, [r3, #0]
|
|
8006210: b29b uxth r3, r3
|
|
8006212: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006216: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800621a: b29a uxth r2, r3
|
|
800621c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
|
|
8006220: 801a strh r2, [r3, #0]
|
|
8006222: e054 b.n 80062ce <USB_EPStartXfer+0x12a0>
|
|
8006224: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006228: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800622c: 681b ldr r3, [r3, #0]
|
|
800622e: 691b ldr r3, [r3, #16]
|
|
8006230: 085b lsrs r3, r3, #1
|
|
8006232: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
|
|
8006236: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800623a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800623e: 681b ldr r3, [r3, #0]
|
|
8006240: 691b ldr r3, [r3, #16]
|
|
8006242: f003 0301 and.w r3, r3, #1
|
|
8006246: 2b00 cmp r3, #0
|
|
8006248: d004 beq.n 8006254 <USB_EPStartXfer+0x1226>
|
|
800624a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
|
|
800624e: 3301 adds r3, #1
|
|
8006250: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
|
|
8006254: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
|
|
8006258: 881b ldrh r3, [r3, #0]
|
|
800625a: b29a uxth r2, r3
|
|
800625c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
|
|
8006260: b29b uxth r3, r3
|
|
8006262: 029b lsls r3, r3, #10
|
|
8006264: b29b uxth r3, r3
|
|
8006266: 4313 orrs r3, r2
|
|
8006268: b29a uxth r2, r3
|
|
800626a: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
|
|
800626e: 801a strh r2, [r3, #0]
|
|
8006270: e02d b.n 80062ce <USB_EPStartXfer+0x12a0>
|
|
8006272: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006276: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800627a: 681b ldr r3, [r3, #0]
|
|
800627c: 785b ldrb r3, [r3, #1]
|
|
800627e: 2b01 cmp r3, #1
|
|
8006280: d125 bne.n 80062ce <USB_EPStartXfer+0x12a0>
|
|
8006282: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006286: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
800628a: 681b ldr r3, [r3, #0]
|
|
800628c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8006290: b29b uxth r3, r3
|
|
8006292: 461a mov r2, r3
|
|
8006294: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
|
|
8006298: 4413 add r3, r2
|
|
800629a: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
|
|
800629e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80062a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80062a6: 681b ldr r3, [r3, #0]
|
|
80062a8: 781b ldrb r3, [r3, #0]
|
|
80062aa: 00da lsls r2, r3, #3
|
|
80062ac: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
|
|
80062b0: 4413 add r3, r2
|
|
80062b2: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
80062b6: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
|
|
80062ba: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80062be: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80062c2: 681b ldr r3, [r3, #0]
|
|
80062c4: 691b ldr r3, [r3, #16]
|
|
80062c6: b29a uxth r2, r3
|
|
80062c8: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
|
|
80062cc: 801a strh r2, [r3, #0]
|
|
|
|
/* Coming from ISR */
|
|
if (ep->xfer_count != 0U)
|
|
80062ce: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80062d2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80062d6: 681b ldr r3, [r3, #0]
|
|
80062d8: 69db ldr r3, [r3, #28]
|
|
80062da: 2b00 cmp r3, #0
|
|
80062dc: f000 8218 beq.w 8006710 <USB_EPStartXfer+0x16e2>
|
|
{
|
|
/* update last value to check if there is blocking state */
|
|
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
|
|
80062e0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80062e4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80062e8: 681a ldr r2, [r3, #0]
|
|
80062ea: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80062ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80062f2: 681b ldr r3, [r3, #0]
|
|
80062f4: 781b ldrb r3, [r3, #0]
|
|
80062f6: 009b lsls r3, r3, #2
|
|
80062f8: 4413 add r3, r2
|
|
80062fa: 881b ldrh r3, [r3, #0]
|
|
80062fc: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
|
|
|
|
/*Blocking State */
|
|
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
|
|
8006300: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
|
|
8006304: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8006308: 2b00 cmp r3, #0
|
|
800630a: d005 beq.n 8006318 <USB_EPStartXfer+0x12ea>
|
|
800630c: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
|
|
8006310: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8006314: 2b00 cmp r3, #0
|
|
8006316: d10d bne.n 8006334 <USB_EPStartXfer+0x1306>
|
|
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
|
|
8006318: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
|
|
800631c: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
|
|
8006320: 2b00 cmp r3, #0
|
|
8006322: f040 81f5 bne.w 8006710 <USB_EPStartXfer+0x16e2>
|
|
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
|
|
8006326: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
|
|
800632a: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
800632e: 2b00 cmp r3, #0
|
|
8006330: f040 81ee bne.w 8006710 <USB_EPStartXfer+0x16e2>
|
|
{
|
|
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
|
|
8006334: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006338: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
800633c: 681a ldr r2, [r3, #0]
|
|
800633e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006342: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006346: 681b ldr r3, [r3, #0]
|
|
8006348: 781b ldrb r3, [r3, #0]
|
|
800634a: 009b lsls r3, r3, #2
|
|
800634c: 4413 add r3, r2
|
|
800634e: 881b ldrh r3, [r3, #0]
|
|
8006350: b29b uxth r3, r3
|
|
8006352: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8006356: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
800635a: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
|
|
800635e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006362: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8006366: 681a ldr r2, [r3, #0]
|
|
8006368: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800636c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006370: 681b ldr r3, [r3, #0]
|
|
8006372: 781b ldrb r3, [r3, #0]
|
|
8006374: 009b lsls r3, r3, #2
|
|
8006376: 441a add r2, r3
|
|
8006378: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
|
|
800637c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8006380: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8006384: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8006388: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
800638c: b29b uxth r3, r3
|
|
800638e: 8013 strh r3, [r2, #0]
|
|
8006390: e1be b.n 8006710 <USB_EPStartXfer+0x16e2>
|
|
}
|
|
}
|
|
}
|
|
/* iso out double */
|
|
else if (ep->type == EP_TYPE_ISOC)
|
|
8006392: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006396: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800639a: 681b ldr r3, [r3, #0]
|
|
800639c: 78db ldrb r3, [r3, #3]
|
|
800639e: 2b01 cmp r3, #1
|
|
80063a0: f040 81b4 bne.w 800670c <USB_EPStartXfer+0x16de>
|
|
{
|
|
/* Multi packet transfer */
|
|
if (ep->xfer_len > ep->maxpacket)
|
|
80063a4: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80063a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80063ac: 681b ldr r3, [r3, #0]
|
|
80063ae: 699a ldr r2, [r3, #24]
|
|
80063b0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80063b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80063b8: 681b ldr r3, [r3, #0]
|
|
80063ba: 691b ldr r3, [r3, #16]
|
|
80063bc: 429a cmp r2, r3
|
|
80063be: d917 bls.n 80063f0 <USB_EPStartXfer+0x13c2>
|
|
{
|
|
len = ep->maxpacket;
|
|
80063c0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80063c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80063c8: 681b ldr r3, [r3, #0]
|
|
80063ca: 691b ldr r3, [r3, #16]
|
|
80063cc: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
ep->xfer_len -= len;
|
|
80063d0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80063d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80063d8: 681b ldr r3, [r3, #0]
|
|
80063da: 699a ldr r2, [r3, #24]
|
|
80063dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80063e0: 1ad2 subs r2, r2, r3
|
|
80063e2: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80063e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80063ea: 681b ldr r3, [r3, #0]
|
|
80063ec: 619a str r2, [r3, #24]
|
|
80063ee: e00e b.n 800640e <USB_EPStartXfer+0x13e0>
|
|
}
|
|
else
|
|
{
|
|
len = ep->xfer_len;
|
|
80063f0: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80063f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80063f8: 681b ldr r3, [r3, #0]
|
|
80063fa: 699b ldr r3, [r3, #24]
|
|
80063fc: f8c7 3104 str.w r3, [r7, #260] @ 0x104
|
|
ep->xfer_len = 0U;
|
|
8006400: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006404: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006408: 681b ldr r3, [r3, #0]
|
|
800640a: 2200 movs r2, #0
|
|
800640c: 619a str r2, [r3, #24]
|
|
}
|
|
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
|
|
800640e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006412: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006416: 681b ldr r3, [r3, #0]
|
|
8006418: 785b ldrb r3, [r3, #1]
|
|
800641a: 2b00 cmp r3, #0
|
|
800641c: f040 8085 bne.w 800652a <USB_EPStartXfer+0x14fc>
|
|
8006420: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006424: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8006428: 681b ldr r3, [r3, #0]
|
|
800642a: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
|
|
800642e: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006432: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8006436: 681b ldr r3, [r3, #0]
|
|
8006438: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
800643c: b29b uxth r3, r3
|
|
800643e: 461a mov r2, r3
|
|
8006440: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
|
|
8006444: 4413 add r3, r2
|
|
8006446: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
|
|
800644a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800644e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006452: 681b ldr r3, [r3, #0]
|
|
8006454: 781b ldrb r3, [r3, #0]
|
|
8006456: 00da lsls r2, r3, #3
|
|
8006458: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
|
|
800645c: 4413 add r3, r2
|
|
800645e: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
8006462: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
|
|
8006466: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
|
|
800646a: 881b ldrh r3, [r3, #0]
|
|
800646c: b29b uxth r3, r3
|
|
800646e: f3c3 0309 ubfx r3, r3, #0, #10
|
|
8006472: b29a uxth r2, r3
|
|
8006474: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
|
|
8006478: 801a strh r2, [r3, #0]
|
|
800647a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800647e: 2b3e cmp r3, #62 @ 0x3e
|
|
8006480: d923 bls.n 80064ca <USB_EPStartXfer+0x149c>
|
|
8006482: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8006486: 095b lsrs r3, r3, #5
|
|
8006488: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
|
|
800648c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8006490: f003 031f and.w r3, r3, #31
|
|
8006494: 2b00 cmp r3, #0
|
|
8006496: d104 bne.n 80064a2 <USB_EPStartXfer+0x1474>
|
|
8006498: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
|
|
800649c: 3b01 subs r3, #1
|
|
800649e: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
|
|
80064a2: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
|
|
80064a6: 881b ldrh r3, [r3, #0]
|
|
80064a8: b29a uxth r2, r3
|
|
80064aa: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
|
|
80064ae: b29b uxth r3, r3
|
|
80064b0: 029b lsls r3, r3, #10
|
|
80064b2: b29b uxth r3, r3
|
|
80064b4: 4313 orrs r3, r2
|
|
80064b6: b29b uxth r3, r3
|
|
80064b8: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80064bc: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80064c0: b29a uxth r2, r3
|
|
80064c2: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
|
|
80064c6: 801a strh r2, [r3, #0]
|
|
80064c8: e060 b.n 800658c <USB_EPStartXfer+0x155e>
|
|
80064ca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80064ce: 2b00 cmp r3, #0
|
|
80064d0: d10c bne.n 80064ec <USB_EPStartXfer+0x14be>
|
|
80064d2: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
|
|
80064d6: 881b ldrh r3, [r3, #0]
|
|
80064d8: b29b uxth r3, r3
|
|
80064da: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
80064de: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
80064e2: b29a uxth r2, r3
|
|
80064e4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
|
|
80064e8: 801a strh r2, [r3, #0]
|
|
80064ea: e04f b.n 800658c <USB_EPStartXfer+0x155e>
|
|
80064ec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80064f0: 085b lsrs r3, r3, #1
|
|
80064f2: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
|
|
80064f6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
80064fa: f003 0301 and.w r3, r3, #1
|
|
80064fe: 2b00 cmp r3, #0
|
|
8006500: d004 beq.n 800650c <USB_EPStartXfer+0x14de>
|
|
8006502: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
|
|
8006506: 3301 adds r3, #1
|
|
8006508: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
|
|
800650c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
|
|
8006510: 881b ldrh r3, [r3, #0]
|
|
8006512: b29a uxth r2, r3
|
|
8006514: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
|
|
8006518: b29b uxth r3, r3
|
|
800651a: 029b lsls r3, r3, #10
|
|
800651c: b29b uxth r3, r3
|
|
800651e: 4313 orrs r3, r2
|
|
8006520: b29a uxth r2, r3
|
|
8006522: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
|
|
8006526: 801a strh r2, [r3, #0]
|
|
8006528: e030 b.n 800658c <USB_EPStartXfer+0x155e>
|
|
800652a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800652e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006532: 681b ldr r3, [r3, #0]
|
|
8006534: 785b ldrb r3, [r3, #1]
|
|
8006536: 2b01 cmp r3, #1
|
|
8006538: d128 bne.n 800658c <USB_EPStartXfer+0x155e>
|
|
800653a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800653e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8006542: 681b ldr r3, [r3, #0]
|
|
8006544: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
|
|
8006548: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800654c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8006550: 681b ldr r3, [r3, #0]
|
|
8006552: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
8006556: b29b uxth r3, r3
|
|
8006558: 461a mov r2, r3
|
|
800655a: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
|
|
800655e: 4413 add r3, r2
|
|
8006560: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
|
|
8006564: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006568: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
800656c: 681b ldr r3, [r3, #0]
|
|
800656e: 781b ldrb r3, [r3, #0]
|
|
8006570: 00da lsls r2, r3, #3
|
|
8006572: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
|
|
8006576: 4413 add r3, r2
|
|
8006578: f203 4302 addw r3, r3, #1026 @ 0x402
|
|
800657c: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
|
|
8006580: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8006584: b29a uxth r2, r3
|
|
8006586: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
|
|
800658a: 801a strh r2, [r3, #0]
|
|
800658c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006590: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8006594: 681b ldr r3, [r3, #0]
|
|
8006596: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
|
|
800659a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800659e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80065a2: 681b ldr r3, [r3, #0]
|
|
80065a4: 785b ldrb r3, [r3, #1]
|
|
80065a6: 2b00 cmp r3, #0
|
|
80065a8: f040 8085 bne.w 80066b6 <USB_EPStartXfer+0x1688>
|
|
80065ac: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80065b0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80065b4: 681b ldr r3, [r3, #0]
|
|
80065b6: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
|
|
80065ba: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80065be: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80065c2: 681b ldr r3, [r3, #0]
|
|
80065c4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80065c8: b29b uxth r3, r3
|
|
80065ca: 461a mov r2, r3
|
|
80065cc: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
|
|
80065d0: 4413 add r3, r2
|
|
80065d2: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
|
|
80065d6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80065da: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80065de: 681b ldr r3, [r3, #0]
|
|
80065e0: 781b ldrb r3, [r3, #0]
|
|
80065e2: 00da lsls r2, r3, #3
|
|
80065e4: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
|
|
80065e8: 4413 add r3, r2
|
|
80065ea: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
80065ee: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
|
|
80065f2: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
|
|
80065f6: 881b ldrh r3, [r3, #0]
|
|
80065f8: b29b uxth r3, r3
|
|
80065fa: f3c3 0309 ubfx r3, r3, #0, #10
|
|
80065fe: b29a uxth r2, r3
|
|
8006600: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
|
|
8006604: 801a strh r2, [r3, #0]
|
|
8006606: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800660a: 2b3e cmp r3, #62 @ 0x3e
|
|
800660c: d923 bls.n 8006656 <USB_EPStartXfer+0x1628>
|
|
800660e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8006612: 095b lsrs r3, r3, #5
|
|
8006614: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
|
|
8006618: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800661c: f003 031f and.w r3, r3, #31
|
|
8006620: 2b00 cmp r3, #0
|
|
8006622: d104 bne.n 800662e <USB_EPStartXfer+0x1600>
|
|
8006624: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
|
|
8006628: 3b01 subs r3, #1
|
|
800662a: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
|
|
800662e: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
|
|
8006632: 881b ldrh r3, [r3, #0]
|
|
8006634: b29a uxth r2, r3
|
|
8006636: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
|
|
800663a: b29b uxth r3, r3
|
|
800663c: 029b lsls r3, r3, #10
|
|
800663e: b29b uxth r3, r3
|
|
8006640: 4313 orrs r3, r2
|
|
8006642: b29b uxth r3, r3
|
|
8006644: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
8006648: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800664c: b29a uxth r2, r3
|
|
800664e: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
|
|
8006652: 801a strh r2, [r3, #0]
|
|
8006654: e05c b.n 8006710 <USB_EPStartXfer+0x16e2>
|
|
8006656: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800665a: 2b00 cmp r3, #0
|
|
800665c: d10c bne.n 8006678 <USB_EPStartXfer+0x164a>
|
|
800665e: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
|
|
8006662: 881b ldrh r3, [r3, #0]
|
|
8006664: b29b uxth r3, r3
|
|
8006666: ea6f 4343 mvn.w r3, r3, lsl #17
|
|
800666a: ea6f 4353 mvn.w r3, r3, lsr #17
|
|
800666e: b29a uxth r2, r3
|
|
8006670: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
|
|
8006674: 801a strh r2, [r3, #0]
|
|
8006676: e04b b.n 8006710 <USB_EPStartXfer+0x16e2>
|
|
8006678: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
800667c: 085b lsrs r3, r3, #1
|
|
800667e: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
|
|
8006682: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8006686: f003 0301 and.w r3, r3, #1
|
|
800668a: 2b00 cmp r3, #0
|
|
800668c: d004 beq.n 8006698 <USB_EPStartXfer+0x166a>
|
|
800668e: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
|
|
8006692: 3301 adds r3, #1
|
|
8006694: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
|
|
8006698: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
|
|
800669c: 881b ldrh r3, [r3, #0]
|
|
800669e: b29a uxth r2, r3
|
|
80066a0: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
|
|
80066a4: b29b uxth r3, r3
|
|
80066a6: 029b lsls r3, r3, #10
|
|
80066a8: b29b uxth r3, r3
|
|
80066aa: 4313 orrs r3, r2
|
|
80066ac: b29a uxth r2, r3
|
|
80066ae: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
|
|
80066b2: 801a strh r2, [r3, #0]
|
|
80066b4: e02c b.n 8006710 <USB_EPStartXfer+0x16e2>
|
|
80066b6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80066ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80066be: 681b ldr r3, [r3, #0]
|
|
80066c0: 785b ldrb r3, [r3, #1]
|
|
80066c2: 2b01 cmp r3, #1
|
|
80066c4: d124 bne.n 8006710 <USB_EPStartXfer+0x16e2>
|
|
80066c6: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80066ca: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
80066ce: 681b ldr r3, [r3, #0]
|
|
80066d0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
|
|
80066d4: b29b uxth r3, r3
|
|
80066d6: 461a mov r2, r3
|
|
80066d8: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
|
|
80066dc: 4413 add r3, r2
|
|
80066de: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
|
|
80066e2: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
80066e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
80066ea: 681b ldr r3, [r3, #0]
|
|
80066ec: 781b ldrb r3, [r3, #0]
|
|
80066ee: 00da lsls r2, r3, #3
|
|
80066f0: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
|
|
80066f4: 4413 add r3, r2
|
|
80066f6: f203 4306 addw r3, r3, #1030 @ 0x406
|
|
80066fa: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
|
|
80066fe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
|
|
8006702: b29a uxth r2, r3
|
|
8006704: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
|
|
8006708: 801a strh r2, [r3, #0]
|
|
800670a: e001 b.n 8006710 <USB_EPStartXfer+0x16e2>
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
800670c: 2301 movs r3, #1
|
|
800670e: e03a b.n 8006786 <USB_EPStartXfer+0x1758>
|
|
}
|
|
}
|
|
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
|
|
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
8006710: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006714: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
8006718: 681a ldr r2, [r3, #0]
|
|
800671a: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
800671e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006722: 681b ldr r3, [r3, #0]
|
|
8006724: 781b ldrb r3, [r3, #0]
|
|
8006726: 009b lsls r3, r3, #2
|
|
8006728: 4413 add r3, r2
|
|
800672a: 881b ldrh r3, [r3, #0]
|
|
800672c: b29b uxth r3, r3
|
|
800672e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
8006732: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8006736: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
|
|
800673a: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
|
|
800673e: f483 5380 eor.w r3, r3, #4096 @ 0x1000
|
|
8006742: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
|
|
8006746: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
|
|
800674a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
|
|
800674e: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
|
|
8006752: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006756: f5a3 7382 sub.w r3, r3, #260 @ 0x104
|
|
800675a: 681a ldr r2, [r3, #0]
|
|
800675c: f507 7384 add.w r3, r7, #264 @ 0x108
|
|
8006760: f5a3 7384 sub.w r3, r3, #264 @ 0x108
|
|
8006764: 681b ldr r3, [r3, #0]
|
|
8006766: 781b ldrb r3, [r3, #0]
|
|
8006768: 009b lsls r3, r3, #2
|
|
800676a: 441a add r2, r3
|
|
800676c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
|
|
8006770: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8006774: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8006778: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
800677c: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8006780: b29b uxth r3, r3
|
|
8006782: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
return HAL_OK;
|
|
8006784: 2300 movs r3, #0
|
|
}
|
|
8006786: 4618 mov r0, r3
|
|
8006788: f507 7784 add.w r7, r7, #264 @ 0x108
|
|
800678c: 46bd mov sp, r7
|
|
800678e: bd80 pop {r7, pc}
|
|
|
|
08006790 <USB_EPSetStall>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
8006790: b480 push {r7}
|
|
8006792: b085 sub sp, #20
|
|
8006794: af00 add r7, sp, #0
|
|
8006796: 6078 str r0, [r7, #4]
|
|
8006798: 6039 str r1, [r7, #0]
|
|
if (ep->is_in != 0U)
|
|
800679a: 683b ldr r3, [r7, #0]
|
|
800679c: 785b ldrb r3, [r3, #1]
|
|
800679e: 2b00 cmp r3, #0
|
|
80067a0: d020 beq.n 80067e4 <USB_EPSetStall+0x54>
|
|
{
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
|
|
80067a2: 687a ldr r2, [r7, #4]
|
|
80067a4: 683b ldr r3, [r7, #0]
|
|
80067a6: 781b ldrb r3, [r3, #0]
|
|
80067a8: 009b lsls r3, r3, #2
|
|
80067aa: 4413 add r3, r2
|
|
80067ac: 881b ldrh r3, [r3, #0]
|
|
80067ae: b29b uxth r3, r3
|
|
80067b0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
80067b4: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
80067b8: 81bb strh r3, [r7, #12]
|
|
80067ba: 89bb ldrh r3, [r7, #12]
|
|
80067bc: f083 0310 eor.w r3, r3, #16
|
|
80067c0: 81bb strh r3, [r7, #12]
|
|
80067c2: 687a ldr r2, [r7, #4]
|
|
80067c4: 683b ldr r3, [r7, #0]
|
|
80067c6: 781b ldrb r3, [r3, #0]
|
|
80067c8: 009b lsls r3, r3, #2
|
|
80067ca: 441a add r2, r3
|
|
80067cc: 89bb ldrh r3, [r7, #12]
|
|
80067ce: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
80067d2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
80067d6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
80067da: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
80067de: b29b uxth r3, r3
|
|
80067e0: 8013 strh r3, [r2, #0]
|
|
80067e2: e01f b.n 8006824 <USB_EPSetStall+0x94>
|
|
}
|
|
else
|
|
{
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
|
|
80067e4: 687a ldr r2, [r7, #4]
|
|
80067e6: 683b ldr r3, [r7, #0]
|
|
80067e8: 781b ldrb r3, [r3, #0]
|
|
80067ea: 009b lsls r3, r3, #2
|
|
80067ec: 4413 add r3, r2
|
|
80067ee: 881b ldrh r3, [r3, #0]
|
|
80067f0: b29b uxth r3, r3
|
|
80067f2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
80067f6: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
80067fa: 81fb strh r3, [r7, #14]
|
|
80067fc: 89fb ldrh r3, [r7, #14]
|
|
80067fe: f483 5380 eor.w r3, r3, #4096 @ 0x1000
|
|
8006802: 81fb strh r3, [r7, #14]
|
|
8006804: 687a ldr r2, [r7, #4]
|
|
8006806: 683b ldr r3, [r7, #0]
|
|
8006808: 781b ldrb r3, [r3, #0]
|
|
800680a: 009b lsls r3, r3, #2
|
|
800680c: 441a add r2, r3
|
|
800680e: 89fb ldrh r3, [r7, #14]
|
|
8006810: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8006814: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8006818: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
800681c: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8006820: b29b uxth r3, r3
|
|
8006822: 8013 strh r3, [r2, #0]
|
|
}
|
|
|
|
return HAL_OK;
|
|
8006824: 2300 movs r3, #0
|
|
}
|
|
8006826: 4618 mov r0, r3
|
|
8006828: 3714 adds r7, #20
|
|
800682a: 46bd mov sp, r7
|
|
800682c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006830: 4770 bx lr
|
|
|
|
08006832 <USB_EPClearStall>:
|
|
* @param USBx Selected device
|
|
* @param ep pointer to endpoint structure
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
|
{
|
|
8006832: b480 push {r7}
|
|
8006834: b087 sub sp, #28
|
|
8006836: af00 add r7, sp, #0
|
|
8006838: 6078 str r0, [r7, #4]
|
|
800683a: 6039 str r1, [r7, #0]
|
|
if (ep->doublebuffer == 0U)
|
|
800683c: 683b ldr r3, [r7, #0]
|
|
800683e: 7b1b ldrb r3, [r3, #12]
|
|
8006840: 2b00 cmp r3, #0
|
|
8006842: f040 809d bne.w 8006980 <USB_EPClearStall+0x14e>
|
|
{
|
|
if (ep->is_in != 0U)
|
|
8006846: 683b ldr r3, [r7, #0]
|
|
8006848: 785b ldrb r3, [r3, #1]
|
|
800684a: 2b00 cmp r3, #0
|
|
800684c: d04c beq.n 80068e8 <USB_EPClearStall+0xb6>
|
|
{
|
|
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
|
800684e: 687a ldr r2, [r7, #4]
|
|
8006850: 683b ldr r3, [r7, #0]
|
|
8006852: 781b ldrb r3, [r3, #0]
|
|
8006854: 009b lsls r3, r3, #2
|
|
8006856: 4413 add r3, r2
|
|
8006858: 881b ldrh r3, [r3, #0]
|
|
800685a: 823b strh r3, [r7, #16]
|
|
800685c: 8a3b ldrh r3, [r7, #16]
|
|
800685e: f003 0340 and.w r3, r3, #64 @ 0x40
|
|
8006862: 2b00 cmp r3, #0
|
|
8006864: d01b beq.n 800689e <USB_EPClearStall+0x6c>
|
|
8006866: 687a ldr r2, [r7, #4]
|
|
8006868: 683b ldr r3, [r7, #0]
|
|
800686a: 781b ldrb r3, [r3, #0]
|
|
800686c: 009b lsls r3, r3, #2
|
|
800686e: 4413 add r3, r2
|
|
8006870: 881b ldrh r3, [r3, #0]
|
|
8006872: b29b uxth r3, r3
|
|
8006874: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8006878: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
800687c: 81fb strh r3, [r7, #14]
|
|
800687e: 687a ldr r2, [r7, #4]
|
|
8006880: 683b ldr r3, [r7, #0]
|
|
8006882: 781b ldrb r3, [r3, #0]
|
|
8006884: 009b lsls r3, r3, #2
|
|
8006886: 441a add r2, r3
|
|
8006888: 89fb ldrh r3, [r7, #14]
|
|
800688a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
800688e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8006892: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8006896: f043 03c0 orr.w r3, r3, #192 @ 0xc0
|
|
800689a: b29b uxth r3, r3
|
|
800689c: 8013 strh r3, [r2, #0]
|
|
|
|
if (ep->type != EP_TYPE_ISOC)
|
|
800689e: 683b ldr r3, [r7, #0]
|
|
80068a0: 78db ldrb r3, [r3, #3]
|
|
80068a2: 2b01 cmp r3, #1
|
|
80068a4: d06c beq.n 8006980 <USB_EPClearStall+0x14e>
|
|
{
|
|
/* Configure NAK status for the Endpoint */
|
|
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
|
80068a6: 687a ldr r2, [r7, #4]
|
|
80068a8: 683b ldr r3, [r7, #0]
|
|
80068aa: 781b ldrb r3, [r3, #0]
|
|
80068ac: 009b lsls r3, r3, #2
|
|
80068ae: 4413 add r3, r2
|
|
80068b0: 881b ldrh r3, [r3, #0]
|
|
80068b2: b29b uxth r3, r3
|
|
80068b4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
80068b8: f023 0340 bic.w r3, r3, #64 @ 0x40
|
|
80068bc: 81bb strh r3, [r7, #12]
|
|
80068be: 89bb ldrh r3, [r7, #12]
|
|
80068c0: f083 0320 eor.w r3, r3, #32
|
|
80068c4: 81bb strh r3, [r7, #12]
|
|
80068c6: 687a ldr r2, [r7, #4]
|
|
80068c8: 683b ldr r3, [r7, #0]
|
|
80068ca: 781b ldrb r3, [r3, #0]
|
|
80068cc: 009b lsls r3, r3, #2
|
|
80068ce: 441a add r2, r3
|
|
80068d0: 89bb ldrh r3, [r7, #12]
|
|
80068d2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
80068d6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
80068da: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
80068de: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
80068e2: b29b uxth r3, r3
|
|
80068e4: 8013 strh r3, [r2, #0]
|
|
80068e6: e04b b.n 8006980 <USB_EPClearStall+0x14e>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
|
80068e8: 687a ldr r2, [r7, #4]
|
|
80068ea: 683b ldr r3, [r7, #0]
|
|
80068ec: 781b ldrb r3, [r3, #0]
|
|
80068ee: 009b lsls r3, r3, #2
|
|
80068f0: 4413 add r3, r2
|
|
80068f2: 881b ldrh r3, [r3, #0]
|
|
80068f4: 82fb strh r3, [r7, #22]
|
|
80068f6: 8afb ldrh r3, [r7, #22]
|
|
80068f8: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
80068fc: 2b00 cmp r3, #0
|
|
80068fe: d01b beq.n 8006938 <USB_EPClearStall+0x106>
|
|
8006900: 687a ldr r2, [r7, #4]
|
|
8006902: 683b ldr r3, [r7, #0]
|
|
8006904: 781b ldrb r3, [r3, #0]
|
|
8006906: 009b lsls r3, r3, #2
|
|
8006908: 4413 add r3, r2
|
|
800690a: 881b ldrh r3, [r3, #0]
|
|
800690c: b29b uxth r3, r3
|
|
800690e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
|
|
8006912: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
8006916: 82bb strh r3, [r7, #20]
|
|
8006918: 687a ldr r2, [r7, #4]
|
|
800691a: 683b ldr r3, [r7, #0]
|
|
800691c: 781b ldrb r3, [r3, #0]
|
|
800691e: 009b lsls r3, r3, #2
|
|
8006920: 441a add r2, r3
|
|
8006922: 8abb ldrh r3, [r7, #20]
|
|
8006924: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8006928: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
800692c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8006930: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8006934: b29b uxth r3, r3
|
|
8006936: 8013 strh r3, [r2, #0]
|
|
|
|
/* Configure VALID status for the Endpoint */
|
|
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
|
8006938: 687a ldr r2, [r7, #4]
|
|
800693a: 683b ldr r3, [r7, #0]
|
|
800693c: 781b ldrb r3, [r3, #0]
|
|
800693e: 009b lsls r3, r3, #2
|
|
8006940: 4413 add r3, r2
|
|
8006942: 881b ldrh r3, [r3, #0]
|
|
8006944: b29b uxth r3, r3
|
|
8006946: f423 4380 bic.w r3, r3, #16384 @ 0x4000
|
|
800694a: f023 0370 bic.w r3, r3, #112 @ 0x70
|
|
800694e: 827b strh r3, [r7, #18]
|
|
8006950: 8a7b ldrh r3, [r7, #18]
|
|
8006952: f483 5380 eor.w r3, r3, #4096 @ 0x1000
|
|
8006956: 827b strh r3, [r7, #18]
|
|
8006958: 8a7b ldrh r3, [r7, #18]
|
|
800695a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
|
|
800695e: 827b strh r3, [r7, #18]
|
|
8006960: 687a ldr r2, [r7, #4]
|
|
8006962: 683b ldr r3, [r7, #0]
|
|
8006964: 781b ldrb r3, [r3, #0]
|
|
8006966: 009b lsls r3, r3, #2
|
|
8006968: 441a add r2, r3
|
|
800696a: 8a7b ldrh r3, [r7, #18]
|
|
800696c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
|
|
8006970: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
|
|
8006974: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8006978: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
800697c: b29b uxth r3, r3
|
|
800697e: 8013 strh r3, [r2, #0]
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8006980: 2300 movs r3, #0
|
|
}
|
|
8006982: 4618 mov r0, r3
|
|
8006984: 371c adds r7, #28
|
|
8006986: 46bd mov sp, r7
|
|
8006988: f85d 7b04 ldr.w r7, [sp], #4
|
|
800698c: 4770 bx lr
|
|
|
|
0800698e <USB_SetDevAddress>:
|
|
* @param address new device address to be assigned
|
|
* This parameter can be a value from 0 to 255
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
|
|
{
|
|
800698e: b480 push {r7}
|
|
8006990: b083 sub sp, #12
|
|
8006992: af00 add r7, sp, #0
|
|
8006994: 6078 str r0, [r7, #4]
|
|
8006996: 460b mov r3, r1
|
|
8006998: 70fb strb r3, [r7, #3]
|
|
if (address == 0U)
|
|
800699a: 78fb ldrb r3, [r7, #3]
|
|
800699c: 2b00 cmp r3, #0
|
|
800699e: d103 bne.n 80069a8 <USB_SetDevAddress+0x1a>
|
|
{
|
|
/* set device address and enable function */
|
|
USBx->DADDR = (uint16_t)USB_DADDR_EF;
|
|
80069a0: 687b ldr r3, [r7, #4]
|
|
80069a2: 2280 movs r2, #128 @ 0x80
|
|
80069a4: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
|
|
}
|
|
|
|
return HAL_OK;
|
|
80069a8: 2300 movs r3, #0
|
|
}
|
|
80069aa: 4618 mov r0, r3
|
|
80069ac: 370c adds r7, #12
|
|
80069ae: 46bd mov sp, r7
|
|
80069b0: f85d 7b04 ldr.w r7, [sp], #4
|
|
80069b4: 4770 bx lr
|
|
|
|
080069b6 <USB_DevConnect>:
|
|
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
|
|
{
|
|
80069b6: b480 push {r7}
|
|
80069b8: b083 sub sp, #12
|
|
80069ba: af00 add r7, sp, #0
|
|
80069bc: 6078 str r0, [r7, #4]
|
|
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|
only by USB OTG FS peripheral.
|
|
- This function is added to ensure compatibility across platforms.
|
|
*/
|
|
|
|
return HAL_OK;
|
|
80069be: 2300 movs r3, #0
|
|
}
|
|
80069c0: 4618 mov r0, r3
|
|
80069c2: 370c adds r7, #12
|
|
80069c4: 46bd mov sp, r7
|
|
80069c6: f85d 7b04 ldr.w r7, [sp], #4
|
|
80069ca: 4770 bx lr
|
|
|
|
080069cc <USB_ReadInterrupts>:
|
|
* @brief USB_ReadInterrupts return the global USB interrupt status
|
|
* @param USBx Selected device
|
|
* @retval USB Global Interrupt status
|
|
*/
|
|
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx)
|
|
{
|
|
80069cc: b480 push {r7}
|
|
80069ce: b085 sub sp, #20
|
|
80069d0: af00 add r7, sp, #0
|
|
80069d2: 6078 str r0, [r7, #4]
|
|
uint32_t tmpreg;
|
|
|
|
tmpreg = USBx->ISTR;
|
|
80069d4: 687b ldr r3, [r7, #4]
|
|
80069d6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
|
|
80069da: b29b uxth r3, r3
|
|
80069dc: 60fb str r3, [r7, #12]
|
|
return tmpreg;
|
|
80069de: 68fb ldr r3, [r7, #12]
|
|
}
|
|
80069e0: 4618 mov r0, r3
|
|
80069e2: 3714 adds r7, #20
|
|
80069e4: 46bd mov sp, r7
|
|
80069e6: f85d 7b04 ldr.w r7, [sp], #4
|
|
80069ea: 4770 bx lr
|
|
|
|
080069ec <USB_WritePMA>:
|
|
* @param wPMABufAddr address into PMA.
|
|
* @param wNBytes no. of bytes to be copied.
|
|
* @retval None
|
|
*/
|
|
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
|
{
|
|
80069ec: b480 push {r7}
|
|
80069ee: b08b sub sp, #44 @ 0x2c
|
|
80069f0: af00 add r7, sp, #0
|
|
80069f2: 60f8 str r0, [r7, #12]
|
|
80069f4: 60b9 str r1, [r7, #8]
|
|
80069f6: 4611 mov r1, r2
|
|
80069f8: 461a mov r2, r3
|
|
80069fa: 460b mov r3, r1
|
|
80069fc: 80fb strh r3, [r7, #6]
|
|
80069fe: 4613 mov r3, r2
|
|
8006a00: 80bb strh r3, [r7, #4]
|
|
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
|
|
8006a02: 88bb ldrh r3, [r7, #4]
|
|
8006a04: 3301 adds r3, #1
|
|
8006a06: 085b lsrs r3, r3, #1
|
|
8006a08: 61bb str r3, [r7, #24]
|
|
uint32_t BaseAddr = (uint32_t)USBx;
|
|
8006a0a: 68fb ldr r3, [r7, #12]
|
|
8006a0c: 617b str r3, [r7, #20]
|
|
uint32_t count;
|
|
uint16_t WrVal;
|
|
__IO uint16_t *pdwVal;
|
|
uint8_t *pBuf = pbUsrBuf;
|
|
8006a0e: 68bb ldr r3, [r7, #8]
|
|
8006a10: 61fb str r3, [r7, #28]
|
|
|
|
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
|
8006a12: 88fa ldrh r2, [r7, #6]
|
|
8006a14: 697b ldr r3, [r7, #20]
|
|
8006a16: 4413 add r3, r2
|
|
8006a18: f503 6380 add.w r3, r3, #1024 @ 0x400
|
|
8006a1c: 623b str r3, [r7, #32]
|
|
|
|
for (count = n; count != 0U; count--)
|
|
8006a1e: 69bb ldr r3, [r7, #24]
|
|
8006a20: 627b str r3, [r7, #36] @ 0x24
|
|
8006a22: e01b b.n 8006a5c <USB_WritePMA+0x70>
|
|
{
|
|
WrVal = pBuf[0];
|
|
8006a24: 69fb ldr r3, [r7, #28]
|
|
8006a26: 781b ldrb r3, [r3, #0]
|
|
8006a28: 827b strh r3, [r7, #18]
|
|
WrVal |= (uint16_t)pBuf[1] << 8;
|
|
8006a2a: 69fb ldr r3, [r7, #28]
|
|
8006a2c: 3301 adds r3, #1
|
|
8006a2e: 781b ldrb r3, [r3, #0]
|
|
8006a30: 021b lsls r3, r3, #8
|
|
8006a32: b21a sxth r2, r3
|
|
8006a34: f9b7 3012 ldrsh.w r3, [r7, #18]
|
|
8006a38: 4313 orrs r3, r2
|
|
8006a3a: b21b sxth r3, r3
|
|
8006a3c: 827b strh r3, [r7, #18]
|
|
*pdwVal = (WrVal & 0xFFFFU);
|
|
8006a3e: 6a3b ldr r3, [r7, #32]
|
|
8006a40: 8a7a ldrh r2, [r7, #18]
|
|
8006a42: 801a strh r2, [r3, #0]
|
|
pdwVal++;
|
|
8006a44: 6a3b ldr r3, [r7, #32]
|
|
8006a46: 3302 adds r3, #2
|
|
8006a48: 623b str r3, [r7, #32]
|
|
|
|
#if PMA_ACCESS > 1U
|
|
pdwVal++;
|
|
#endif /* PMA_ACCESS */
|
|
|
|
pBuf++;
|
|
8006a4a: 69fb ldr r3, [r7, #28]
|
|
8006a4c: 3301 adds r3, #1
|
|
8006a4e: 61fb str r3, [r7, #28]
|
|
pBuf++;
|
|
8006a50: 69fb ldr r3, [r7, #28]
|
|
8006a52: 3301 adds r3, #1
|
|
8006a54: 61fb str r3, [r7, #28]
|
|
for (count = n; count != 0U; count--)
|
|
8006a56: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8006a58: 3b01 subs r3, #1
|
|
8006a5a: 627b str r3, [r7, #36] @ 0x24
|
|
8006a5c: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8006a5e: 2b00 cmp r3, #0
|
|
8006a60: d1e0 bne.n 8006a24 <USB_WritePMA+0x38>
|
|
}
|
|
}
|
|
8006a62: bf00 nop
|
|
8006a64: bf00 nop
|
|
8006a66: 372c adds r7, #44 @ 0x2c
|
|
8006a68: 46bd mov sp, r7
|
|
8006a6a: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006a6e: 4770 bx lr
|
|
|
|
08006a70 <USB_ReadPMA>:
|
|
* @param wPMABufAddr address into PMA.
|
|
* @param wNBytes no. of bytes to be copied.
|
|
* @retval None
|
|
*/
|
|
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
|
{
|
|
8006a70: b480 push {r7}
|
|
8006a72: b08b sub sp, #44 @ 0x2c
|
|
8006a74: af00 add r7, sp, #0
|
|
8006a76: 60f8 str r0, [r7, #12]
|
|
8006a78: 60b9 str r1, [r7, #8]
|
|
8006a7a: 4611 mov r1, r2
|
|
8006a7c: 461a mov r2, r3
|
|
8006a7e: 460b mov r3, r1
|
|
8006a80: 80fb strh r3, [r7, #6]
|
|
8006a82: 4613 mov r3, r2
|
|
8006a84: 80bb strh r3, [r7, #4]
|
|
uint32_t n = (uint32_t)wNBytes >> 1;
|
|
8006a86: 88bb ldrh r3, [r7, #4]
|
|
8006a88: 085b lsrs r3, r3, #1
|
|
8006a8a: b29b uxth r3, r3
|
|
8006a8c: 61bb str r3, [r7, #24]
|
|
uint32_t BaseAddr = (uint32_t)USBx;
|
|
8006a8e: 68fb ldr r3, [r7, #12]
|
|
8006a90: 617b str r3, [r7, #20]
|
|
uint32_t count;
|
|
uint32_t RdVal;
|
|
__IO uint16_t *pdwVal;
|
|
uint8_t *pBuf = pbUsrBuf;
|
|
8006a92: 68bb ldr r3, [r7, #8]
|
|
8006a94: 61fb str r3, [r7, #28]
|
|
|
|
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
|
8006a96: 88fa ldrh r2, [r7, #6]
|
|
8006a98: 697b ldr r3, [r7, #20]
|
|
8006a9a: 4413 add r3, r2
|
|
8006a9c: f503 6380 add.w r3, r3, #1024 @ 0x400
|
|
8006aa0: 623b str r3, [r7, #32]
|
|
|
|
for (count = n; count != 0U; count--)
|
|
8006aa2: 69bb ldr r3, [r7, #24]
|
|
8006aa4: 627b str r3, [r7, #36] @ 0x24
|
|
8006aa6: e018 b.n 8006ada <USB_ReadPMA+0x6a>
|
|
{
|
|
RdVal = *(__IO uint16_t *)pdwVal;
|
|
8006aa8: 6a3b ldr r3, [r7, #32]
|
|
8006aaa: 881b ldrh r3, [r3, #0]
|
|
8006aac: b29b uxth r3, r3
|
|
8006aae: 613b str r3, [r7, #16]
|
|
pdwVal++;
|
|
8006ab0: 6a3b ldr r3, [r7, #32]
|
|
8006ab2: 3302 adds r3, #2
|
|
8006ab4: 623b str r3, [r7, #32]
|
|
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
|
|
8006ab6: 693b ldr r3, [r7, #16]
|
|
8006ab8: b2da uxtb r2, r3
|
|
8006aba: 69fb ldr r3, [r7, #28]
|
|
8006abc: 701a strb r2, [r3, #0]
|
|
pBuf++;
|
|
8006abe: 69fb ldr r3, [r7, #28]
|
|
8006ac0: 3301 adds r3, #1
|
|
8006ac2: 61fb str r3, [r7, #28]
|
|
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
|
|
8006ac4: 693b ldr r3, [r7, #16]
|
|
8006ac6: 0a1b lsrs r3, r3, #8
|
|
8006ac8: b2da uxtb r2, r3
|
|
8006aca: 69fb ldr r3, [r7, #28]
|
|
8006acc: 701a strb r2, [r3, #0]
|
|
pBuf++;
|
|
8006ace: 69fb ldr r3, [r7, #28]
|
|
8006ad0: 3301 adds r3, #1
|
|
8006ad2: 61fb str r3, [r7, #28]
|
|
for (count = n; count != 0U; count--)
|
|
8006ad4: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8006ad6: 3b01 subs r3, #1
|
|
8006ad8: 627b str r3, [r7, #36] @ 0x24
|
|
8006ada: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8006adc: 2b00 cmp r3, #0
|
|
8006ade: d1e3 bne.n 8006aa8 <USB_ReadPMA+0x38>
|
|
#if PMA_ACCESS > 1U
|
|
pdwVal++;
|
|
#endif /* PMA_ACCESS */
|
|
}
|
|
|
|
if ((wNBytes % 2U) != 0U)
|
|
8006ae0: 88bb ldrh r3, [r7, #4]
|
|
8006ae2: f003 0301 and.w r3, r3, #1
|
|
8006ae6: b29b uxth r3, r3
|
|
8006ae8: 2b00 cmp r3, #0
|
|
8006aea: d007 beq.n 8006afc <USB_ReadPMA+0x8c>
|
|
{
|
|
RdVal = *pdwVal;
|
|
8006aec: 6a3b ldr r3, [r7, #32]
|
|
8006aee: 881b ldrh r3, [r3, #0]
|
|
8006af0: b29b uxth r3, r3
|
|
8006af2: 613b str r3, [r7, #16]
|
|
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
|
|
8006af4: 693b ldr r3, [r7, #16]
|
|
8006af6: b2da uxtb r2, r3
|
|
8006af8: 69fb ldr r3, [r7, #28]
|
|
8006afa: 701a strb r2, [r3, #0]
|
|
}
|
|
}
|
|
8006afc: bf00 nop
|
|
8006afe: 372c adds r7, #44 @ 0x2c
|
|
8006b00: 46bd mov sp, r7
|
|
8006b02: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006b06: 4770 bx lr
|
|
|
|
08006b08 <USBD_CDC_Init>:
|
|
* @param pdev: device instance
|
|
* @param cfgidx: Configuration index
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
8006b08: b580 push {r7, lr}
|
|
8006b0a: b084 sub sp, #16
|
|
8006b0c: af00 add r7, sp, #0
|
|
8006b0e: 6078 str r0, [r7, #4]
|
|
8006b10: 460b mov r3, r1
|
|
8006b12: 70fb strb r3, [r7, #3]
|
|
uint8_t ret = 0U;
|
|
8006b14: 2300 movs r3, #0
|
|
8006b16: 73fb strb r3, [r7, #15]
|
|
USBD_CDC_HandleTypeDef *hcdc;
|
|
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8006b18: 687b ldr r3, [r7, #4]
|
|
8006b1a: 7c1b ldrb r3, [r3, #16]
|
|
8006b1c: 2b00 cmp r3, #0
|
|
8006b1e: d115 bne.n 8006b4c <USBD_CDC_Init+0x44>
|
|
{
|
|
/* Open EP IN */
|
|
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
|
|
8006b20: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8006b24: 2202 movs r2, #2
|
|
8006b26: 2181 movs r1, #129 @ 0x81
|
|
8006b28: 6878 ldr r0, [r7, #4]
|
|
8006b2a: f001 fe8e bl 800884a <USBD_LL_OpenEP>
|
|
CDC_DATA_HS_IN_PACKET_SIZE);
|
|
|
|
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
|
|
8006b2e: 687b ldr r3, [r7, #4]
|
|
8006b30: 2201 movs r2, #1
|
|
8006b32: 62da str r2, [r3, #44] @ 0x2c
|
|
|
|
/* Open EP OUT */
|
|
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
|
|
8006b34: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8006b38: 2202 movs r2, #2
|
|
8006b3a: 2101 movs r1, #1
|
|
8006b3c: 6878 ldr r0, [r7, #4]
|
|
8006b3e: f001 fe84 bl 800884a <USBD_LL_OpenEP>
|
|
CDC_DATA_HS_OUT_PACKET_SIZE);
|
|
|
|
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
|
|
8006b42: 687b ldr r3, [r7, #4]
|
|
8006b44: 2201 movs r2, #1
|
|
8006b46: f8c3 216c str.w r2, [r3, #364] @ 0x16c
|
|
8006b4a: e012 b.n 8006b72 <USBD_CDC_Init+0x6a>
|
|
|
|
}
|
|
else
|
|
{
|
|
/* Open EP IN */
|
|
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
|
|
8006b4c: 2340 movs r3, #64 @ 0x40
|
|
8006b4e: 2202 movs r2, #2
|
|
8006b50: 2181 movs r1, #129 @ 0x81
|
|
8006b52: 6878 ldr r0, [r7, #4]
|
|
8006b54: f001 fe79 bl 800884a <USBD_LL_OpenEP>
|
|
CDC_DATA_FS_IN_PACKET_SIZE);
|
|
|
|
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
|
|
8006b58: 687b ldr r3, [r7, #4]
|
|
8006b5a: 2201 movs r2, #1
|
|
8006b5c: 62da str r2, [r3, #44] @ 0x2c
|
|
|
|
/* Open EP OUT */
|
|
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
|
|
8006b5e: 2340 movs r3, #64 @ 0x40
|
|
8006b60: 2202 movs r2, #2
|
|
8006b62: 2101 movs r1, #1
|
|
8006b64: 6878 ldr r0, [r7, #4]
|
|
8006b66: f001 fe70 bl 800884a <USBD_LL_OpenEP>
|
|
CDC_DATA_FS_OUT_PACKET_SIZE);
|
|
|
|
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
|
|
8006b6a: 687b ldr r3, [r7, #4]
|
|
8006b6c: 2201 movs r2, #1
|
|
8006b6e: f8c3 216c str.w r2, [r3, #364] @ 0x16c
|
|
}
|
|
/* Open Command IN EP */
|
|
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
|
|
8006b72: 2308 movs r3, #8
|
|
8006b74: 2203 movs r2, #3
|
|
8006b76: 2182 movs r1, #130 @ 0x82
|
|
8006b78: 6878 ldr r0, [r7, #4]
|
|
8006b7a: f001 fe66 bl 800884a <USBD_LL_OpenEP>
|
|
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
|
|
8006b7e: 687b ldr r3, [r7, #4]
|
|
8006b80: 2201 movs r2, #1
|
|
8006b82: 641a str r2, [r3, #64] @ 0x40
|
|
|
|
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
|
|
8006b84: f44f 7007 mov.w r0, #540 @ 0x21c
|
|
8006b88: f001 ff88 bl 8008a9c <USBD_static_malloc>
|
|
8006b8c: 4602 mov r2, r0
|
|
8006b8e: 687b ldr r3, [r7, #4]
|
|
8006b90: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
|
|
|
|
if (pdev->pClassData == NULL)
|
|
8006b94: 687b ldr r3, [r7, #4]
|
|
8006b96: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006b9a: 2b00 cmp r3, #0
|
|
8006b9c: d102 bne.n 8006ba4 <USBD_CDC_Init+0x9c>
|
|
{
|
|
ret = 1U;
|
|
8006b9e: 2301 movs r3, #1
|
|
8006ba0: 73fb strb r3, [r7, #15]
|
|
8006ba2: e026 b.n 8006bf2 <USBD_CDC_Init+0xea>
|
|
}
|
|
else
|
|
{
|
|
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006ba4: 687b ldr r3, [r7, #4]
|
|
8006ba6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006baa: 60bb str r3, [r7, #8]
|
|
|
|
/* Init physical Interface components */
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
|
|
8006bac: 687b ldr r3, [r7, #4]
|
|
8006bae: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
|
|
8006bb2: 681b ldr r3, [r3, #0]
|
|
8006bb4: 4798 blx r3
|
|
|
|
/* Init Xfer states */
|
|
hcdc->TxState = 0U;
|
|
8006bb6: 68bb ldr r3, [r7, #8]
|
|
8006bb8: 2200 movs r2, #0
|
|
8006bba: f8c3 2214 str.w r2, [r3, #532] @ 0x214
|
|
hcdc->RxState = 0U;
|
|
8006bbe: 68bb ldr r3, [r7, #8]
|
|
8006bc0: 2200 movs r2, #0
|
|
8006bc2: f8c3 2218 str.w r2, [r3, #536] @ 0x218
|
|
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8006bc6: 687b ldr r3, [r7, #4]
|
|
8006bc8: 7c1b ldrb r3, [r3, #16]
|
|
8006bca: 2b00 cmp r3, #0
|
|
8006bcc: d109 bne.n 8006be2 <USBD_CDC_Init+0xda>
|
|
{
|
|
/* Prepare Out endpoint to receive next packet */
|
|
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
|
|
8006bce: 68bb ldr r3, [r7, #8]
|
|
8006bd0: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
|
|
8006bd4: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8006bd8: 2101 movs r1, #1
|
|
8006bda: 6878 ldr r0, [r7, #4]
|
|
8006bdc: f001 ff27 bl 8008a2e <USBD_LL_PrepareReceive>
|
|
8006be0: e007 b.n 8006bf2 <USBD_CDC_Init+0xea>
|
|
CDC_DATA_HS_OUT_PACKET_SIZE);
|
|
}
|
|
else
|
|
{
|
|
/* Prepare Out endpoint to receive next packet */
|
|
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
|
|
8006be2: 68bb ldr r3, [r7, #8]
|
|
8006be4: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
|
|
8006be8: 2340 movs r3, #64 @ 0x40
|
|
8006bea: 2101 movs r1, #1
|
|
8006bec: 6878 ldr r0, [r7, #4]
|
|
8006bee: f001 ff1e bl 8008a2e <USBD_LL_PrepareReceive>
|
|
CDC_DATA_FS_OUT_PACKET_SIZE);
|
|
}
|
|
}
|
|
return ret;
|
|
8006bf2: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8006bf4: 4618 mov r0, r3
|
|
8006bf6: 3710 adds r7, #16
|
|
8006bf8: 46bd mov sp, r7
|
|
8006bfa: bd80 pop {r7, pc}
|
|
|
|
08006bfc <USBD_CDC_DeInit>:
|
|
* @param pdev: device instance
|
|
* @param cfgidx: Configuration index
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
8006bfc: b580 push {r7, lr}
|
|
8006bfe: b084 sub sp, #16
|
|
8006c00: af00 add r7, sp, #0
|
|
8006c02: 6078 str r0, [r7, #4]
|
|
8006c04: 460b mov r3, r1
|
|
8006c06: 70fb strb r3, [r7, #3]
|
|
uint8_t ret = 0U;
|
|
8006c08: 2300 movs r3, #0
|
|
8006c0a: 73fb strb r3, [r7, #15]
|
|
|
|
/* Close EP IN */
|
|
USBD_LL_CloseEP(pdev, CDC_IN_EP);
|
|
8006c0c: 2181 movs r1, #129 @ 0x81
|
|
8006c0e: 6878 ldr r0, [r7, #4]
|
|
8006c10: f001 fe41 bl 8008896 <USBD_LL_CloseEP>
|
|
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
|
|
8006c14: 687b ldr r3, [r7, #4]
|
|
8006c16: 2200 movs r2, #0
|
|
8006c18: 62da str r2, [r3, #44] @ 0x2c
|
|
|
|
/* Close EP OUT */
|
|
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
|
|
8006c1a: 2101 movs r1, #1
|
|
8006c1c: 6878 ldr r0, [r7, #4]
|
|
8006c1e: f001 fe3a bl 8008896 <USBD_LL_CloseEP>
|
|
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
|
|
8006c22: 687b ldr r3, [r7, #4]
|
|
8006c24: 2200 movs r2, #0
|
|
8006c26: f8c3 216c str.w r2, [r3, #364] @ 0x16c
|
|
|
|
/* Close Command IN EP */
|
|
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
|
|
8006c2a: 2182 movs r1, #130 @ 0x82
|
|
8006c2c: 6878 ldr r0, [r7, #4]
|
|
8006c2e: f001 fe32 bl 8008896 <USBD_LL_CloseEP>
|
|
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
|
|
8006c32: 687b ldr r3, [r7, #4]
|
|
8006c34: 2200 movs r2, #0
|
|
8006c36: 641a str r2, [r3, #64] @ 0x40
|
|
|
|
/* DeInit physical Interface components */
|
|
if (pdev->pClassData != NULL)
|
|
8006c38: 687b ldr r3, [r7, #4]
|
|
8006c3a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006c3e: 2b00 cmp r3, #0
|
|
8006c40: d00e beq.n 8006c60 <USBD_CDC_DeInit+0x64>
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
|
|
8006c42: 687b ldr r3, [r7, #4]
|
|
8006c44: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
|
|
8006c48: 685b ldr r3, [r3, #4]
|
|
8006c4a: 4798 blx r3
|
|
USBD_free(pdev->pClassData);
|
|
8006c4c: 687b ldr r3, [r7, #4]
|
|
8006c4e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006c52: 4618 mov r0, r3
|
|
8006c54: f001 ff30 bl 8008ab8 <USBD_static_free>
|
|
pdev->pClassData = NULL;
|
|
8006c58: 687b ldr r3, [r7, #4]
|
|
8006c5a: 2200 movs r2, #0
|
|
8006c5c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
|
|
}
|
|
|
|
return ret;
|
|
8006c60: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8006c62: 4618 mov r0, r3
|
|
8006c64: 3710 adds r7, #16
|
|
8006c66: 46bd mov sp, r7
|
|
8006c68: bd80 pop {r7, pc}
|
|
|
|
08006c6a <USBD_CDC_Setup>:
|
|
* @param req: usb requests
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8006c6a: b580 push {r7, lr}
|
|
8006c6c: b086 sub sp, #24
|
|
8006c6e: af00 add r7, sp, #0
|
|
8006c70: 6078 str r0, [r7, #4]
|
|
8006c72: 6039 str r1, [r7, #0]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006c74: 687b ldr r3, [r7, #4]
|
|
8006c76: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006c7a: 613b str r3, [r7, #16]
|
|
uint8_t ifalt = 0U;
|
|
8006c7c: 2300 movs r3, #0
|
|
8006c7e: 73fb strb r3, [r7, #15]
|
|
uint16_t status_info = 0U;
|
|
8006c80: 2300 movs r3, #0
|
|
8006c82: 81bb strh r3, [r7, #12]
|
|
uint8_t ret = USBD_OK;
|
|
8006c84: 2300 movs r3, #0
|
|
8006c86: 75fb strb r3, [r7, #23]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
8006c88: 683b ldr r3, [r7, #0]
|
|
8006c8a: 781b ldrb r3, [r3, #0]
|
|
8006c8c: f003 0360 and.w r3, r3, #96 @ 0x60
|
|
8006c90: 2b00 cmp r3, #0
|
|
8006c92: d039 beq.n 8006d08 <USBD_CDC_Setup+0x9e>
|
|
8006c94: 2b20 cmp r3, #32
|
|
8006c96: d17f bne.n 8006d98 <USBD_CDC_Setup+0x12e>
|
|
{
|
|
case USB_REQ_TYPE_CLASS :
|
|
if (req->wLength)
|
|
8006c98: 683b ldr r3, [r7, #0]
|
|
8006c9a: 88db ldrh r3, [r3, #6]
|
|
8006c9c: 2b00 cmp r3, #0
|
|
8006c9e: d029 beq.n 8006cf4 <USBD_CDC_Setup+0x8a>
|
|
{
|
|
if (req->bmRequest & 0x80U)
|
|
8006ca0: 683b ldr r3, [r7, #0]
|
|
8006ca2: 781b ldrb r3, [r3, #0]
|
|
8006ca4: b25b sxtb r3, r3
|
|
8006ca6: 2b00 cmp r3, #0
|
|
8006ca8: da11 bge.n 8006cce <USBD_CDC_Setup+0x64>
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
|
|
8006caa: 687b ldr r3, [r7, #4]
|
|
8006cac: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
|
|
8006cb0: 689b ldr r3, [r3, #8]
|
|
8006cb2: 683a ldr r2, [r7, #0]
|
|
8006cb4: 7850 ldrb r0, [r2, #1]
|
|
(uint8_t *)(void *)hcdc->data,
|
|
8006cb6: 6939 ldr r1, [r7, #16]
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
|
|
8006cb8: 683a ldr r2, [r7, #0]
|
|
8006cba: 88d2 ldrh r2, [r2, #6]
|
|
8006cbc: 4798 blx r3
|
|
req->wLength);
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
|
|
8006cbe: 6939 ldr r1, [r7, #16]
|
|
8006cc0: 683b ldr r3, [r7, #0]
|
|
8006cc2: 88db ldrh r3, [r3, #6]
|
|
8006cc4: 461a mov r2, r3
|
|
8006cc6: 6878 ldr r0, [r7, #4]
|
|
8006cc8: f001 fa10 bl 80080ec <USBD_CtlSendData>
|
|
else
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
|
|
(uint8_t *)(void *)req, 0U);
|
|
}
|
|
break;
|
|
8006ccc: e06b b.n 8006da6 <USBD_CDC_Setup+0x13c>
|
|
hcdc->CmdOpCode = req->bRequest;
|
|
8006cce: 683b ldr r3, [r7, #0]
|
|
8006cd0: 785a ldrb r2, [r3, #1]
|
|
8006cd2: 693b ldr r3, [r7, #16]
|
|
8006cd4: f883 2200 strb.w r2, [r3, #512] @ 0x200
|
|
hcdc->CmdLength = (uint8_t)req->wLength;
|
|
8006cd8: 683b ldr r3, [r7, #0]
|
|
8006cda: 88db ldrh r3, [r3, #6]
|
|
8006cdc: b2da uxtb r2, r3
|
|
8006cde: 693b ldr r3, [r7, #16]
|
|
8006ce0: f883 2201 strb.w r2, [r3, #513] @ 0x201
|
|
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
|
|
8006ce4: 6939 ldr r1, [r7, #16]
|
|
8006ce6: 683b ldr r3, [r7, #0]
|
|
8006ce8: 88db ldrh r3, [r3, #6]
|
|
8006cea: 461a mov r2, r3
|
|
8006cec: 6878 ldr r0, [r7, #4]
|
|
8006cee: f001 fa2b bl 8008148 <USBD_CtlPrepareRx>
|
|
break;
|
|
8006cf2: e058 b.n 8006da6 <USBD_CDC_Setup+0x13c>
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
|
|
8006cf4: 687b ldr r3, [r7, #4]
|
|
8006cf6: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
|
|
8006cfa: 689b ldr r3, [r3, #8]
|
|
8006cfc: 683a ldr r2, [r7, #0]
|
|
8006cfe: 7850 ldrb r0, [r2, #1]
|
|
8006d00: 2200 movs r2, #0
|
|
8006d02: 6839 ldr r1, [r7, #0]
|
|
8006d04: 4798 blx r3
|
|
break;
|
|
8006d06: e04e b.n 8006da6 <USBD_CDC_Setup+0x13c>
|
|
|
|
case USB_REQ_TYPE_STANDARD:
|
|
switch (req->bRequest)
|
|
8006d08: 683b ldr r3, [r7, #0]
|
|
8006d0a: 785b ldrb r3, [r3, #1]
|
|
8006d0c: 2b0b cmp r3, #11
|
|
8006d0e: d02e beq.n 8006d6e <USBD_CDC_Setup+0x104>
|
|
8006d10: 2b0b cmp r3, #11
|
|
8006d12: dc38 bgt.n 8006d86 <USBD_CDC_Setup+0x11c>
|
|
8006d14: 2b00 cmp r3, #0
|
|
8006d16: d002 beq.n 8006d1e <USBD_CDC_Setup+0xb4>
|
|
8006d18: 2b0a cmp r3, #10
|
|
8006d1a: d014 beq.n 8006d46 <USBD_CDC_Setup+0xdc>
|
|
8006d1c: e033 b.n 8006d86 <USBD_CDC_Setup+0x11c>
|
|
{
|
|
case USB_REQ_GET_STATUS:
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8006d1e: 687b ldr r3, [r7, #4]
|
|
8006d20: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8006d24: 2b03 cmp r3, #3
|
|
8006d26: d107 bne.n 8006d38 <USBD_CDC_Setup+0xce>
|
|
{
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
|
|
8006d28: f107 030c add.w r3, r7, #12
|
|
8006d2c: 2202 movs r2, #2
|
|
8006d2e: 4619 mov r1, r3
|
|
8006d30: 6878 ldr r0, [r7, #4]
|
|
8006d32: f001 f9db bl 80080ec <USBD_CtlSendData>
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
ret = USBD_FAIL;
|
|
}
|
|
break;
|
|
8006d36: e02e b.n 8006d96 <USBD_CDC_Setup+0x12c>
|
|
USBD_CtlError(pdev, req);
|
|
8006d38: 6839 ldr r1, [r7, #0]
|
|
8006d3a: 6878 ldr r0, [r7, #4]
|
|
8006d3c: f001 f96b bl 8008016 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8006d40: 2302 movs r3, #2
|
|
8006d42: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8006d44: e027 b.n 8006d96 <USBD_CDC_Setup+0x12c>
|
|
|
|
case USB_REQ_GET_INTERFACE:
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8006d46: 687b ldr r3, [r7, #4]
|
|
8006d48: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8006d4c: 2b03 cmp r3, #3
|
|
8006d4e: d107 bne.n 8006d60 <USBD_CDC_Setup+0xf6>
|
|
{
|
|
USBD_CtlSendData(pdev, &ifalt, 1U);
|
|
8006d50: f107 030f add.w r3, r7, #15
|
|
8006d54: 2201 movs r2, #1
|
|
8006d56: 4619 mov r1, r3
|
|
8006d58: 6878 ldr r0, [r7, #4]
|
|
8006d5a: f001 f9c7 bl 80080ec <USBD_CtlSendData>
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
ret = USBD_FAIL;
|
|
}
|
|
break;
|
|
8006d5e: e01a b.n 8006d96 <USBD_CDC_Setup+0x12c>
|
|
USBD_CtlError(pdev, req);
|
|
8006d60: 6839 ldr r1, [r7, #0]
|
|
8006d62: 6878 ldr r0, [r7, #4]
|
|
8006d64: f001 f957 bl 8008016 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8006d68: 2302 movs r3, #2
|
|
8006d6a: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8006d6c: e013 b.n 8006d96 <USBD_CDC_Setup+0x12c>
|
|
|
|
case USB_REQ_SET_INTERFACE:
|
|
if (pdev->dev_state != USBD_STATE_CONFIGURED)
|
|
8006d6e: 687b ldr r3, [r7, #4]
|
|
8006d70: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8006d74: 2b03 cmp r3, #3
|
|
8006d76: d00d beq.n 8006d94 <USBD_CDC_Setup+0x12a>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8006d78: 6839 ldr r1, [r7, #0]
|
|
8006d7a: 6878 ldr r0, [r7, #4]
|
|
8006d7c: f001 f94b bl 8008016 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8006d80: 2302 movs r3, #2
|
|
8006d82: 75fb strb r3, [r7, #23]
|
|
}
|
|
break;
|
|
8006d84: e006 b.n 8006d94 <USBD_CDC_Setup+0x12a>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8006d86: 6839 ldr r1, [r7, #0]
|
|
8006d88: 6878 ldr r0, [r7, #4]
|
|
8006d8a: f001 f944 bl 8008016 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8006d8e: 2302 movs r3, #2
|
|
8006d90: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8006d92: e000 b.n 8006d96 <USBD_CDC_Setup+0x12c>
|
|
break;
|
|
8006d94: bf00 nop
|
|
}
|
|
break;
|
|
8006d96: e006 b.n 8006da6 <USBD_CDC_Setup+0x13c>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8006d98: 6839 ldr r1, [r7, #0]
|
|
8006d9a: 6878 ldr r0, [r7, #4]
|
|
8006d9c: f001 f93b bl 8008016 <USBD_CtlError>
|
|
ret = USBD_FAIL;
|
|
8006da0: 2302 movs r3, #2
|
|
8006da2: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8006da4: bf00 nop
|
|
}
|
|
|
|
return ret;
|
|
8006da6: 7dfb ldrb r3, [r7, #23]
|
|
}
|
|
8006da8: 4618 mov r0, r3
|
|
8006daa: 3718 adds r7, #24
|
|
8006dac: 46bd mov sp, r7
|
|
8006dae: bd80 pop {r7, pc}
|
|
|
|
08006db0 <USBD_CDC_DataIn>:
|
|
* @param pdev: device instance
|
|
* @param epnum: endpoint number
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
|
|
{
|
|
8006db0: b580 push {r7, lr}
|
|
8006db2: b084 sub sp, #16
|
|
8006db4: af00 add r7, sp, #0
|
|
8006db6: 6078 str r0, [r7, #4]
|
|
8006db8: 460b mov r3, r1
|
|
8006dba: 70fb strb r3, [r7, #3]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
|
|
8006dbc: 687b ldr r3, [r7, #4]
|
|
8006dbe: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006dc2: 60fb str r3, [r7, #12]
|
|
PCD_HandleTypeDef *hpcd = pdev->pData;
|
|
8006dc4: 687b ldr r3, [r7, #4]
|
|
8006dc6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
|
|
8006dca: 60bb str r3, [r7, #8]
|
|
|
|
if (pdev->pClassData != NULL)
|
|
8006dcc: 687b ldr r3, [r7, #4]
|
|
8006dce: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006dd2: 2b00 cmp r3, #0
|
|
8006dd4: d03a beq.n 8006e4c <USBD_CDC_DataIn+0x9c>
|
|
{
|
|
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
|
|
8006dd6: 78fa ldrb r2, [r7, #3]
|
|
8006dd8: 6879 ldr r1, [r7, #4]
|
|
8006dda: 4613 mov r3, r2
|
|
8006ddc: 009b lsls r3, r3, #2
|
|
8006dde: 4413 add r3, r2
|
|
8006de0: 009b lsls r3, r3, #2
|
|
8006de2: 440b add r3, r1
|
|
8006de4: 331c adds r3, #28
|
|
8006de6: 681b ldr r3, [r3, #0]
|
|
8006de8: 2b00 cmp r3, #0
|
|
8006dea: d029 beq.n 8006e40 <USBD_CDC_DataIn+0x90>
|
|
8006dec: 78fa ldrb r2, [r7, #3]
|
|
8006dee: 6879 ldr r1, [r7, #4]
|
|
8006df0: 4613 mov r3, r2
|
|
8006df2: 009b lsls r3, r3, #2
|
|
8006df4: 4413 add r3, r2
|
|
8006df6: 009b lsls r3, r3, #2
|
|
8006df8: 440b add r3, r1
|
|
8006dfa: 331c adds r3, #28
|
|
8006dfc: 681a ldr r2, [r3, #0]
|
|
8006dfe: 78f9 ldrb r1, [r7, #3]
|
|
8006e00: 68b8 ldr r0, [r7, #8]
|
|
8006e02: 460b mov r3, r1
|
|
8006e04: 009b lsls r3, r3, #2
|
|
8006e06: 440b add r3, r1
|
|
8006e08: 00db lsls r3, r3, #3
|
|
8006e0a: 4403 add r3, r0
|
|
8006e0c: 3338 adds r3, #56 @ 0x38
|
|
8006e0e: 681b ldr r3, [r3, #0]
|
|
8006e10: fbb2 f1f3 udiv r1, r2, r3
|
|
8006e14: fb01 f303 mul.w r3, r1, r3
|
|
8006e18: 1ad3 subs r3, r2, r3
|
|
8006e1a: 2b00 cmp r3, #0
|
|
8006e1c: d110 bne.n 8006e40 <USBD_CDC_DataIn+0x90>
|
|
{
|
|
/* Update the packet total length */
|
|
pdev->ep_in[epnum].total_length = 0U;
|
|
8006e1e: 78fa ldrb r2, [r7, #3]
|
|
8006e20: 6879 ldr r1, [r7, #4]
|
|
8006e22: 4613 mov r3, r2
|
|
8006e24: 009b lsls r3, r3, #2
|
|
8006e26: 4413 add r3, r2
|
|
8006e28: 009b lsls r3, r3, #2
|
|
8006e2a: 440b add r3, r1
|
|
8006e2c: 331c adds r3, #28
|
|
8006e2e: 2200 movs r2, #0
|
|
8006e30: 601a str r2, [r3, #0]
|
|
|
|
/* Send ZLP */
|
|
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
|
|
8006e32: 78f9 ldrb r1, [r7, #3]
|
|
8006e34: 2300 movs r3, #0
|
|
8006e36: 2200 movs r2, #0
|
|
8006e38: 6878 ldr r0, [r7, #4]
|
|
8006e3a: f001 fdd5 bl 80089e8 <USBD_LL_Transmit>
|
|
8006e3e: e003 b.n 8006e48 <USBD_CDC_DataIn+0x98>
|
|
}
|
|
else
|
|
{
|
|
hcdc->TxState = 0U;
|
|
8006e40: 68fb ldr r3, [r7, #12]
|
|
8006e42: 2200 movs r2, #0
|
|
8006e44: f8c3 2214 str.w r2, [r3, #532] @ 0x214
|
|
}
|
|
return USBD_OK;
|
|
8006e48: 2300 movs r3, #0
|
|
8006e4a: e000 b.n 8006e4e <USBD_CDC_DataIn+0x9e>
|
|
}
|
|
else
|
|
{
|
|
return USBD_FAIL;
|
|
8006e4c: 2302 movs r3, #2
|
|
}
|
|
}
|
|
8006e4e: 4618 mov r0, r3
|
|
8006e50: 3710 adds r7, #16
|
|
8006e52: 46bd mov sp, r7
|
|
8006e54: bd80 pop {r7, pc}
|
|
|
|
08006e56 <USBD_CDC_DataOut>:
|
|
* @param pdev: device instance
|
|
* @param epnum: endpoint number
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
|
|
{
|
|
8006e56: b580 push {r7, lr}
|
|
8006e58: b084 sub sp, #16
|
|
8006e5a: af00 add r7, sp, #0
|
|
8006e5c: 6078 str r0, [r7, #4]
|
|
8006e5e: 460b mov r3, r1
|
|
8006e60: 70fb strb r3, [r7, #3]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006e62: 687b ldr r3, [r7, #4]
|
|
8006e64: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006e68: 60fb str r3, [r7, #12]
|
|
|
|
/* Get the received data length */
|
|
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
|
|
8006e6a: 78fb ldrb r3, [r7, #3]
|
|
8006e6c: 4619 mov r1, r3
|
|
8006e6e: 6878 ldr r0, [r7, #4]
|
|
8006e70: f001 fe00 bl 8008a74 <USBD_LL_GetRxDataSize>
|
|
8006e74: 4602 mov r2, r0
|
|
8006e76: 68fb ldr r3, [r7, #12]
|
|
8006e78: f8c3 220c str.w r2, [r3, #524] @ 0x20c
|
|
|
|
/* USB data will be immediately processed, this allow next USB traffic being
|
|
NAKed till the end of the application Xfer */
|
|
if (pdev->pClassData != NULL)
|
|
8006e7c: 687b ldr r3, [r7, #4]
|
|
8006e7e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006e82: 2b00 cmp r3, #0
|
|
8006e84: d00d beq.n 8006ea2 <USBD_CDC_DataOut+0x4c>
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
|
|
8006e86: 687b ldr r3, [r7, #4]
|
|
8006e88: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
|
|
8006e8c: 68db ldr r3, [r3, #12]
|
|
8006e8e: 68fa ldr r2, [r7, #12]
|
|
8006e90: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
|
|
8006e94: 68fa ldr r2, [r7, #12]
|
|
8006e96: f502 7203 add.w r2, r2, #524 @ 0x20c
|
|
8006e9a: 4611 mov r1, r2
|
|
8006e9c: 4798 blx r3
|
|
|
|
return USBD_OK;
|
|
8006e9e: 2300 movs r3, #0
|
|
8006ea0: e000 b.n 8006ea4 <USBD_CDC_DataOut+0x4e>
|
|
}
|
|
else
|
|
{
|
|
return USBD_FAIL;
|
|
8006ea2: 2302 movs r3, #2
|
|
}
|
|
}
|
|
8006ea4: 4618 mov r0, r3
|
|
8006ea6: 3710 adds r7, #16
|
|
8006ea8: 46bd mov sp, r7
|
|
8006eaa: bd80 pop {r7, pc}
|
|
|
|
08006eac <USBD_CDC_EP0_RxReady>:
|
|
* Handle EP0 Rx Ready event
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8006eac: b580 push {r7, lr}
|
|
8006eae: b084 sub sp, #16
|
|
8006eb0: af00 add r7, sp, #0
|
|
8006eb2: 6078 str r0, [r7, #4]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006eb4: 687b ldr r3, [r7, #4]
|
|
8006eb6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006eba: 60fb str r3, [r7, #12]
|
|
|
|
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
|
|
8006ebc: 687b ldr r3, [r7, #4]
|
|
8006ebe: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
|
|
8006ec2: 2b00 cmp r3, #0
|
|
8006ec4: d014 beq.n 8006ef0 <USBD_CDC_EP0_RxReady+0x44>
|
|
8006ec6: 68fb ldr r3, [r7, #12]
|
|
8006ec8: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
|
|
8006ecc: 2bff cmp r3, #255 @ 0xff
|
|
8006ece: d00f beq.n 8006ef0 <USBD_CDC_EP0_RxReady+0x44>
|
|
{
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
|
|
8006ed0: 687b ldr r3, [r7, #4]
|
|
8006ed2: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
|
|
8006ed6: 689b ldr r3, [r3, #8]
|
|
8006ed8: 68fa ldr r2, [r7, #12]
|
|
8006eda: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
|
|
(uint8_t *)(void *)hcdc->data,
|
|
8006ede: 68f9 ldr r1, [r7, #12]
|
|
(uint16_t)hcdc->CmdLength);
|
|
8006ee0: 68fa ldr r2, [r7, #12]
|
|
8006ee2: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
|
|
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
|
|
8006ee6: 4798 blx r3
|
|
hcdc->CmdOpCode = 0xFFU;
|
|
8006ee8: 68fb ldr r3, [r7, #12]
|
|
8006eea: 22ff movs r2, #255 @ 0xff
|
|
8006eec: f883 2200 strb.w r2, [r3, #512] @ 0x200
|
|
|
|
}
|
|
return USBD_OK;
|
|
8006ef0: 2300 movs r3, #0
|
|
}
|
|
8006ef2: 4618 mov r0, r3
|
|
8006ef4: 3710 adds r7, #16
|
|
8006ef6: 46bd mov sp, r7
|
|
8006ef8: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08006efc <USBD_CDC_GetFSCfgDesc>:
|
|
* @param speed : current device speed
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
|
|
{
|
|
8006efc: b480 push {r7}
|
|
8006efe: b083 sub sp, #12
|
|
8006f00: af00 add r7, sp, #0
|
|
8006f02: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_CDC_CfgFSDesc);
|
|
8006f04: 687b ldr r3, [r7, #4]
|
|
8006f06: 2243 movs r2, #67 @ 0x43
|
|
8006f08: 801a strh r2, [r3, #0]
|
|
return USBD_CDC_CfgFSDesc;
|
|
8006f0a: 4b03 ldr r3, [pc, #12] @ (8006f18 <USBD_CDC_GetFSCfgDesc+0x1c>)
|
|
}
|
|
8006f0c: 4618 mov r0, r3
|
|
8006f0e: 370c adds r7, #12
|
|
8006f10: 46bd mov sp, r7
|
|
8006f12: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006f16: 4770 bx lr
|
|
8006f18: 20000094 .word 0x20000094
|
|
|
|
08006f1c <USBD_CDC_GetHSCfgDesc>:
|
|
* @param speed : current device speed
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
|
|
{
|
|
8006f1c: b480 push {r7}
|
|
8006f1e: b083 sub sp, #12
|
|
8006f20: af00 add r7, sp, #0
|
|
8006f22: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_CDC_CfgHSDesc);
|
|
8006f24: 687b ldr r3, [r7, #4]
|
|
8006f26: 2243 movs r2, #67 @ 0x43
|
|
8006f28: 801a strh r2, [r3, #0]
|
|
return USBD_CDC_CfgHSDesc;
|
|
8006f2a: 4b03 ldr r3, [pc, #12] @ (8006f38 <USBD_CDC_GetHSCfgDesc+0x1c>)
|
|
}
|
|
8006f2c: 4618 mov r0, r3
|
|
8006f2e: 370c adds r7, #12
|
|
8006f30: 46bd mov sp, r7
|
|
8006f32: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006f36: 4770 bx lr
|
|
8006f38: 20000050 .word 0x20000050
|
|
|
|
08006f3c <USBD_CDC_GetOtherSpeedCfgDesc>:
|
|
* @param speed : current device speed
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
|
|
{
|
|
8006f3c: b480 push {r7}
|
|
8006f3e: b083 sub sp, #12
|
|
8006f40: af00 add r7, sp, #0
|
|
8006f42: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
|
|
8006f44: 687b ldr r3, [r7, #4]
|
|
8006f46: 2243 movs r2, #67 @ 0x43
|
|
8006f48: 801a strh r2, [r3, #0]
|
|
return USBD_CDC_OtherSpeedCfgDesc;
|
|
8006f4a: 4b03 ldr r3, [pc, #12] @ (8006f58 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
|
|
}
|
|
8006f4c: 4618 mov r0, r3
|
|
8006f4e: 370c adds r7, #12
|
|
8006f50: 46bd mov sp, r7
|
|
8006f52: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006f56: 4770 bx lr
|
|
8006f58: 200000d8 .word 0x200000d8
|
|
|
|
08006f5c <USBD_CDC_GetDeviceQualifierDescriptor>:
|
|
* return Device Qualifier descriptor
|
|
* @param length : pointer data length
|
|
* @retval pointer to descriptor buffer
|
|
*/
|
|
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
|
|
{
|
|
8006f5c: b480 push {r7}
|
|
8006f5e: b083 sub sp, #12
|
|
8006f60: af00 add r7, sp, #0
|
|
8006f62: 6078 str r0, [r7, #4]
|
|
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
|
|
8006f64: 687b ldr r3, [r7, #4]
|
|
8006f66: 220a movs r2, #10
|
|
8006f68: 801a strh r2, [r3, #0]
|
|
return USBD_CDC_DeviceQualifierDesc;
|
|
8006f6a: 4b03 ldr r3, [pc, #12] @ (8006f78 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
|
|
}
|
|
8006f6c: 4618 mov r0, r3
|
|
8006f6e: 370c adds r7, #12
|
|
8006f70: 46bd mov sp, r7
|
|
8006f72: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006f76: 4770 bx lr
|
|
8006f78: 2000000c .word 0x2000000c
|
|
|
|
08006f7c <USBD_CDC_RegisterInterface>:
|
|
* @param fops: CD Interface callback
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
|
|
USBD_CDC_ItfTypeDef *fops)
|
|
{
|
|
8006f7c: b480 push {r7}
|
|
8006f7e: b085 sub sp, #20
|
|
8006f80: af00 add r7, sp, #0
|
|
8006f82: 6078 str r0, [r7, #4]
|
|
8006f84: 6039 str r1, [r7, #0]
|
|
uint8_t ret = USBD_FAIL;
|
|
8006f86: 2302 movs r3, #2
|
|
8006f88: 73fb strb r3, [r7, #15]
|
|
|
|
if (fops != NULL)
|
|
8006f8a: 683b ldr r3, [r7, #0]
|
|
8006f8c: 2b00 cmp r3, #0
|
|
8006f8e: d005 beq.n 8006f9c <USBD_CDC_RegisterInterface+0x20>
|
|
{
|
|
pdev->pUserData = fops;
|
|
8006f90: 687b ldr r3, [r7, #4]
|
|
8006f92: 683a ldr r2, [r7, #0]
|
|
8006f94: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
|
|
ret = USBD_OK;
|
|
8006f98: 2300 movs r3, #0
|
|
8006f9a: 73fb strb r3, [r7, #15]
|
|
}
|
|
|
|
return ret;
|
|
8006f9c: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8006f9e: 4618 mov r0, r3
|
|
8006fa0: 3714 adds r7, #20
|
|
8006fa2: 46bd mov sp, r7
|
|
8006fa4: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006fa8: 4770 bx lr
|
|
|
|
08006faa <USBD_CDC_SetTxBuffer>:
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuff,
|
|
uint16_t length)
|
|
{
|
|
8006faa: b480 push {r7}
|
|
8006fac: b087 sub sp, #28
|
|
8006fae: af00 add r7, sp, #0
|
|
8006fb0: 60f8 str r0, [r7, #12]
|
|
8006fb2: 60b9 str r1, [r7, #8]
|
|
8006fb4: 4613 mov r3, r2
|
|
8006fb6: 80fb strh r3, [r7, #6]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006fb8: 68fb ldr r3, [r7, #12]
|
|
8006fba: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006fbe: 617b str r3, [r7, #20]
|
|
|
|
hcdc->TxBuffer = pbuff;
|
|
8006fc0: 697b ldr r3, [r7, #20]
|
|
8006fc2: 68ba ldr r2, [r7, #8]
|
|
8006fc4: f8c3 2208 str.w r2, [r3, #520] @ 0x208
|
|
hcdc->TxLength = length;
|
|
8006fc8: 88fa ldrh r2, [r7, #6]
|
|
8006fca: 697b ldr r3, [r7, #20]
|
|
8006fcc: f8c3 2210 str.w r2, [r3, #528] @ 0x210
|
|
|
|
return USBD_OK;
|
|
8006fd0: 2300 movs r3, #0
|
|
}
|
|
8006fd2: 4618 mov r0, r3
|
|
8006fd4: 371c adds r7, #28
|
|
8006fd6: 46bd mov sp, r7
|
|
8006fd8: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006fdc: 4770 bx lr
|
|
|
|
08006fde <USBD_CDC_SetRxBuffer>:
|
|
* @param pbuff: Rx Buffer
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuff)
|
|
{
|
|
8006fde: b480 push {r7}
|
|
8006fe0: b085 sub sp, #20
|
|
8006fe2: af00 add r7, sp, #0
|
|
8006fe4: 6078 str r0, [r7, #4]
|
|
8006fe6: 6039 str r1, [r7, #0]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
8006fe8: 687b ldr r3, [r7, #4]
|
|
8006fea: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8006fee: 60fb str r3, [r7, #12]
|
|
|
|
hcdc->RxBuffer = pbuff;
|
|
8006ff0: 68fb ldr r3, [r7, #12]
|
|
8006ff2: 683a ldr r2, [r7, #0]
|
|
8006ff4: f8c3 2204 str.w r2, [r3, #516] @ 0x204
|
|
|
|
return USBD_OK;
|
|
8006ff8: 2300 movs r3, #0
|
|
}
|
|
8006ffa: 4618 mov r0, r3
|
|
8006ffc: 3714 adds r7, #20
|
|
8006ffe: 46bd mov sp, r7
|
|
8007000: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007004: 4770 bx lr
|
|
|
|
08007006 <USBD_CDC_TransmitPacket>:
|
|
* Transmit packet on IN endpoint
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007006: b580 push {r7, lr}
|
|
8007008: b084 sub sp, #16
|
|
800700a: af00 add r7, sp, #0
|
|
800700c: 6078 str r0, [r7, #4]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
800700e: 687b ldr r3, [r7, #4]
|
|
8007010: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8007014: 60fb str r3, [r7, #12]
|
|
|
|
if (pdev->pClassData != NULL)
|
|
8007016: 687b ldr r3, [r7, #4]
|
|
8007018: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
800701c: 2b00 cmp r3, #0
|
|
800701e: d01c beq.n 800705a <USBD_CDC_TransmitPacket+0x54>
|
|
{
|
|
if (hcdc->TxState == 0U)
|
|
8007020: 68fb ldr r3, [r7, #12]
|
|
8007022: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
|
|
8007026: 2b00 cmp r3, #0
|
|
8007028: d115 bne.n 8007056 <USBD_CDC_TransmitPacket+0x50>
|
|
{
|
|
/* Tx Transfer in progress */
|
|
hcdc->TxState = 1U;
|
|
800702a: 68fb ldr r3, [r7, #12]
|
|
800702c: 2201 movs r2, #1
|
|
800702e: f8c3 2214 str.w r2, [r3, #532] @ 0x214
|
|
|
|
/* Update the packet total length */
|
|
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
|
|
8007032: 68fb ldr r3, [r7, #12]
|
|
8007034: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
|
|
8007038: 687b ldr r3, [r7, #4]
|
|
800703a: 631a str r2, [r3, #48] @ 0x30
|
|
|
|
/* Transmit next packet */
|
|
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
|
|
800703c: 68fb ldr r3, [r7, #12]
|
|
800703e: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
|
|
(uint16_t)hcdc->TxLength);
|
|
8007042: 68fb ldr r3, [r7, #12]
|
|
8007044: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
|
|
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
|
|
8007048: b29b uxth r3, r3
|
|
800704a: 2181 movs r1, #129 @ 0x81
|
|
800704c: 6878 ldr r0, [r7, #4]
|
|
800704e: f001 fccb bl 80089e8 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
8007052: 2300 movs r3, #0
|
|
8007054: e002 b.n 800705c <USBD_CDC_TransmitPacket+0x56>
|
|
}
|
|
else
|
|
{
|
|
return USBD_BUSY;
|
|
8007056: 2301 movs r3, #1
|
|
8007058: e000 b.n 800705c <USBD_CDC_TransmitPacket+0x56>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
return USBD_FAIL;
|
|
800705a: 2302 movs r3, #2
|
|
}
|
|
}
|
|
800705c: 4618 mov r0, r3
|
|
800705e: 3710 adds r7, #16
|
|
8007060: 46bd mov sp, r7
|
|
8007062: bd80 pop {r7, pc}
|
|
|
|
08007064 <USBD_CDC_ReceivePacket>:
|
|
* prepare OUT Endpoint for reception
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007064: b580 push {r7, lr}
|
|
8007066: b084 sub sp, #16
|
|
8007068: af00 add r7, sp, #0
|
|
800706a: 6078 str r0, [r7, #4]
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
|
|
800706c: 687b ldr r3, [r7, #4]
|
|
800706e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8007072: 60fb str r3, [r7, #12]
|
|
|
|
/* Suspend or Resume USB Out process */
|
|
if (pdev->pClassData != NULL)
|
|
8007074: 687b ldr r3, [r7, #4]
|
|
8007076: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
800707a: 2b00 cmp r3, #0
|
|
800707c: d017 beq.n 80070ae <USBD_CDC_ReceivePacket+0x4a>
|
|
{
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
800707e: 687b ldr r3, [r7, #4]
|
|
8007080: 7c1b ldrb r3, [r3, #16]
|
|
8007082: 2b00 cmp r3, #0
|
|
8007084: d109 bne.n 800709a <USBD_CDC_ReceivePacket+0x36>
|
|
{
|
|
/* Prepare Out endpoint to receive next packet */
|
|
USBD_LL_PrepareReceive(pdev,
|
|
8007086: 68fb ldr r3, [r7, #12]
|
|
8007088: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
|
|
800708c: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8007090: 2101 movs r1, #1
|
|
8007092: 6878 ldr r0, [r7, #4]
|
|
8007094: f001 fccb bl 8008a2e <USBD_LL_PrepareReceive>
|
|
8007098: e007 b.n 80070aa <USBD_CDC_ReceivePacket+0x46>
|
|
CDC_DATA_HS_OUT_PACKET_SIZE);
|
|
}
|
|
else
|
|
{
|
|
/* Prepare Out endpoint to receive next packet */
|
|
USBD_LL_PrepareReceive(pdev,
|
|
800709a: 68fb ldr r3, [r7, #12]
|
|
800709c: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
|
|
80070a0: 2340 movs r3, #64 @ 0x40
|
|
80070a2: 2101 movs r1, #1
|
|
80070a4: 6878 ldr r0, [r7, #4]
|
|
80070a6: f001 fcc2 bl 8008a2e <USBD_LL_PrepareReceive>
|
|
CDC_OUT_EP,
|
|
hcdc->RxBuffer,
|
|
CDC_DATA_FS_OUT_PACKET_SIZE);
|
|
}
|
|
return USBD_OK;
|
|
80070aa: 2300 movs r3, #0
|
|
80070ac: e000 b.n 80070b0 <USBD_CDC_ReceivePacket+0x4c>
|
|
}
|
|
else
|
|
{
|
|
return USBD_FAIL;
|
|
80070ae: 2302 movs r3, #2
|
|
}
|
|
}
|
|
80070b0: 4618 mov r0, r3
|
|
80070b2: 3710 adds r7, #16
|
|
80070b4: 46bd mov sp, r7
|
|
80070b6: bd80 pop {r7, pc}
|
|
|
|
080070b8 <USBD_Init>:
|
|
* @param id: Low level core index
|
|
* @retval None
|
|
*/
|
|
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
|
|
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
|
|
{
|
|
80070b8: b580 push {r7, lr}
|
|
80070ba: b084 sub sp, #16
|
|
80070bc: af00 add r7, sp, #0
|
|
80070be: 60f8 str r0, [r7, #12]
|
|
80070c0: 60b9 str r1, [r7, #8]
|
|
80070c2: 4613 mov r3, r2
|
|
80070c4: 71fb strb r3, [r7, #7]
|
|
/* Check whether the USB Host handle is valid */
|
|
if (pdev == NULL)
|
|
80070c6: 68fb ldr r3, [r7, #12]
|
|
80070c8: 2b00 cmp r3, #0
|
|
80070ca: d101 bne.n 80070d0 <USBD_Init+0x18>
|
|
{
|
|
#if (USBD_DEBUG_LEVEL > 1U)
|
|
USBD_ErrLog("Invalid Device handle");
|
|
#endif
|
|
return USBD_FAIL;
|
|
80070cc: 2302 movs r3, #2
|
|
80070ce: e01a b.n 8007106 <USBD_Init+0x4e>
|
|
}
|
|
|
|
/* Unlink previous class*/
|
|
if (pdev->pClass != NULL)
|
|
80070d0: 68fb ldr r3, [r7, #12]
|
|
80070d2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
80070d6: 2b00 cmp r3, #0
|
|
80070d8: d003 beq.n 80070e2 <USBD_Init+0x2a>
|
|
{
|
|
pdev->pClass = NULL;
|
|
80070da: 68fb ldr r3, [r7, #12]
|
|
80070dc: 2200 movs r2, #0
|
|
80070de: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
|
|
}
|
|
|
|
/* Assign USBD Descriptors */
|
|
if (pdesc != NULL)
|
|
80070e2: 68bb ldr r3, [r7, #8]
|
|
80070e4: 2b00 cmp r3, #0
|
|
80070e6: d003 beq.n 80070f0 <USBD_Init+0x38>
|
|
{
|
|
pdev->pDesc = pdesc;
|
|
80070e8: 68fb ldr r3, [r7, #12]
|
|
80070ea: 68ba ldr r2, [r7, #8]
|
|
80070ec: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
|
|
}
|
|
|
|
/* Set Device initial State */
|
|
pdev->dev_state = USBD_STATE_DEFAULT;
|
|
80070f0: 68fb ldr r3, [r7, #12]
|
|
80070f2: 2201 movs r2, #1
|
|
80070f4: f883 229c strb.w r2, [r3, #668] @ 0x29c
|
|
pdev->id = id;
|
|
80070f8: 68fb ldr r3, [r7, #12]
|
|
80070fa: 79fa ldrb r2, [r7, #7]
|
|
80070fc: 701a strb r2, [r3, #0]
|
|
/* Initialize low level driver */
|
|
USBD_LL_Init(pdev);
|
|
80070fe: 68f8 ldr r0, [r7, #12]
|
|
8007100: f001 fb2e bl 8008760 <USBD_LL_Init>
|
|
|
|
return USBD_OK;
|
|
8007104: 2300 movs r3, #0
|
|
}
|
|
8007106: 4618 mov r0, r3
|
|
8007108: 3710 adds r7, #16
|
|
800710a: 46bd mov sp, r7
|
|
800710c: bd80 pop {r7, pc}
|
|
|
|
0800710e <USBD_RegisterClass>:
|
|
* @param pDevice : Device Handle
|
|
* @param pclass: Class handle
|
|
* @retval USBD Status
|
|
*/
|
|
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
|
|
{
|
|
800710e: b480 push {r7}
|
|
8007110: b085 sub sp, #20
|
|
8007112: af00 add r7, sp, #0
|
|
8007114: 6078 str r0, [r7, #4]
|
|
8007116: 6039 str r1, [r7, #0]
|
|
USBD_StatusTypeDef status = USBD_OK;
|
|
8007118: 2300 movs r3, #0
|
|
800711a: 73fb strb r3, [r7, #15]
|
|
if (pclass != NULL)
|
|
800711c: 683b ldr r3, [r7, #0]
|
|
800711e: 2b00 cmp r3, #0
|
|
8007120: d006 beq.n 8007130 <USBD_RegisterClass+0x22>
|
|
{
|
|
/* link the class to the USB Device handle */
|
|
pdev->pClass = pclass;
|
|
8007122: 687b ldr r3, [r7, #4]
|
|
8007124: 683a ldr r2, [r7, #0]
|
|
8007126: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
|
|
status = USBD_OK;
|
|
800712a: 2300 movs r3, #0
|
|
800712c: 73fb strb r3, [r7, #15]
|
|
800712e: e001 b.n 8007134 <USBD_RegisterClass+0x26>
|
|
else
|
|
{
|
|
#if (USBD_DEBUG_LEVEL > 1U)
|
|
USBD_ErrLog("Invalid Class handle");
|
|
#endif
|
|
status = USBD_FAIL;
|
|
8007130: 2302 movs r3, #2
|
|
8007132: 73fb strb r3, [r7, #15]
|
|
}
|
|
|
|
return status;
|
|
8007134: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8007136: 4618 mov r0, r3
|
|
8007138: 3714 adds r7, #20
|
|
800713a: 46bd mov sp, r7
|
|
800713c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007140: 4770 bx lr
|
|
|
|
08007142 <USBD_Start>:
|
|
* Start the USB Device Core.
|
|
* @param pdev: Device Handle
|
|
* @retval USBD Status
|
|
*/
|
|
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007142: b580 push {r7, lr}
|
|
8007144: b082 sub sp, #8
|
|
8007146: af00 add r7, sp, #0
|
|
8007148: 6078 str r0, [r7, #4]
|
|
/* Start the low level driver */
|
|
USBD_LL_Start(pdev);
|
|
800714a: 6878 ldr r0, [r7, #4]
|
|
800714c: f001 fb62 bl 8008814 <USBD_LL_Start>
|
|
|
|
return USBD_OK;
|
|
8007150: 2300 movs r3, #0
|
|
}
|
|
8007152: 4618 mov r0, r3
|
|
8007154: 3708 adds r7, #8
|
|
8007156: 46bd mov sp, r7
|
|
8007158: bd80 pop {r7, pc}
|
|
|
|
0800715a <USBD_RunTestMode>:
|
|
* Launch test mode process
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
|
|
{
|
|
800715a: b480 push {r7}
|
|
800715c: b083 sub sp, #12
|
|
800715e: af00 add r7, sp, #0
|
|
8007160: 6078 str r0, [r7, #4]
|
|
/* Prevent unused argument compilation warning */
|
|
UNUSED(pdev);
|
|
|
|
return USBD_OK;
|
|
8007162: 2300 movs r3, #0
|
|
}
|
|
8007164: 4618 mov r0, r3
|
|
8007166: 370c adds r7, #12
|
|
8007168: 46bd mov sp, r7
|
|
800716a: f85d 7b04 ldr.w r7, [sp], #4
|
|
800716e: 4770 bx lr
|
|
|
|
08007170 <USBD_SetClassConfig>:
|
|
* @param cfgidx: configuration index
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
8007170: b580 push {r7, lr}
|
|
8007172: b084 sub sp, #16
|
|
8007174: af00 add r7, sp, #0
|
|
8007176: 6078 str r0, [r7, #4]
|
|
8007178: 460b mov r3, r1
|
|
800717a: 70fb strb r3, [r7, #3]
|
|
USBD_StatusTypeDef ret = USBD_FAIL;
|
|
800717c: 2302 movs r3, #2
|
|
800717e: 73fb strb r3, [r7, #15]
|
|
|
|
if (pdev->pClass != NULL)
|
|
8007180: 687b ldr r3, [r7, #4]
|
|
8007182: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007186: 2b00 cmp r3, #0
|
|
8007188: d00c beq.n 80071a4 <USBD_SetClassConfig+0x34>
|
|
{
|
|
/* Set configuration and Start the Class*/
|
|
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
|
|
800718a: 687b ldr r3, [r7, #4]
|
|
800718c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007190: 681b ldr r3, [r3, #0]
|
|
8007192: 78fa ldrb r2, [r7, #3]
|
|
8007194: 4611 mov r1, r2
|
|
8007196: 6878 ldr r0, [r7, #4]
|
|
8007198: 4798 blx r3
|
|
800719a: 4603 mov r3, r0
|
|
800719c: 2b00 cmp r3, #0
|
|
800719e: d101 bne.n 80071a4 <USBD_SetClassConfig+0x34>
|
|
{
|
|
ret = USBD_OK;
|
|
80071a0: 2300 movs r3, #0
|
|
80071a2: 73fb strb r3, [r7, #15]
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
80071a4: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80071a6: 4618 mov r0, r3
|
|
80071a8: 3710 adds r7, #16
|
|
80071aa: 46bd mov sp, r7
|
|
80071ac: bd80 pop {r7, pc}
|
|
|
|
080071ae <USBD_ClrClassConfig>:
|
|
* @param pdev: device instance
|
|
* @param cfgidx: configuration index
|
|
* @retval status: USBD_StatusTypeDef
|
|
*/
|
|
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
|
|
{
|
|
80071ae: b580 push {r7, lr}
|
|
80071b0: b082 sub sp, #8
|
|
80071b2: af00 add r7, sp, #0
|
|
80071b4: 6078 str r0, [r7, #4]
|
|
80071b6: 460b mov r3, r1
|
|
80071b8: 70fb strb r3, [r7, #3]
|
|
/* Clear configuration and De-initialize the Class process*/
|
|
pdev->pClass->DeInit(pdev, cfgidx);
|
|
80071ba: 687b ldr r3, [r7, #4]
|
|
80071bc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
80071c0: 685b ldr r3, [r3, #4]
|
|
80071c2: 78fa ldrb r2, [r7, #3]
|
|
80071c4: 4611 mov r1, r2
|
|
80071c6: 6878 ldr r0, [r7, #4]
|
|
80071c8: 4798 blx r3
|
|
|
|
return USBD_OK;
|
|
80071ca: 2300 movs r3, #0
|
|
}
|
|
80071cc: 4618 mov r0, r3
|
|
80071ce: 3708 adds r7, #8
|
|
80071d0: 46bd mov sp, r7
|
|
80071d2: bd80 pop {r7, pc}
|
|
|
|
080071d4 <USBD_LL_SetupStage>:
|
|
* Handle the setup stage
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
|
|
{
|
|
80071d4: b580 push {r7, lr}
|
|
80071d6: b082 sub sp, #8
|
|
80071d8: af00 add r7, sp, #0
|
|
80071da: 6078 str r0, [r7, #4]
|
|
80071dc: 6039 str r1, [r7, #0]
|
|
USBD_ParseSetupRequest(&pdev->request, psetup);
|
|
80071de: 687b ldr r3, [r7, #4]
|
|
80071e0: f503 732a add.w r3, r3, #680 @ 0x2a8
|
|
80071e4: 6839 ldr r1, [r7, #0]
|
|
80071e6: 4618 mov r0, r3
|
|
80071e8: f000 fedb bl 8007fa2 <USBD_ParseSetupRequest>
|
|
|
|
pdev->ep0_state = USBD_EP0_SETUP;
|
|
80071ec: 687b ldr r3, [r7, #4]
|
|
80071ee: 2201 movs r2, #1
|
|
80071f0: f8c3 2294 str.w r2, [r3, #660] @ 0x294
|
|
|
|
pdev->ep0_data_len = pdev->request.wLength;
|
|
80071f4: 687b ldr r3, [r7, #4]
|
|
80071f6: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
|
|
80071fa: 461a mov r2, r3
|
|
80071fc: 687b ldr r3, [r7, #4]
|
|
80071fe: f8c3 2298 str.w r2, [r3, #664] @ 0x298
|
|
|
|
switch (pdev->request.bmRequest & 0x1FU)
|
|
8007202: 687b ldr r3, [r7, #4]
|
|
8007204: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
|
|
8007208: f003 031f and.w r3, r3, #31
|
|
800720c: 2b02 cmp r3, #2
|
|
800720e: d016 beq.n 800723e <USBD_LL_SetupStage+0x6a>
|
|
8007210: 2b02 cmp r3, #2
|
|
8007212: d81c bhi.n 800724e <USBD_LL_SetupStage+0x7a>
|
|
8007214: 2b00 cmp r3, #0
|
|
8007216: d002 beq.n 800721e <USBD_LL_SetupStage+0x4a>
|
|
8007218: 2b01 cmp r3, #1
|
|
800721a: d008 beq.n 800722e <USBD_LL_SetupStage+0x5a>
|
|
800721c: e017 b.n 800724e <USBD_LL_SetupStage+0x7a>
|
|
{
|
|
case USB_REQ_RECIPIENT_DEVICE:
|
|
USBD_StdDevReq(pdev, &pdev->request);
|
|
800721e: 687b ldr r3, [r7, #4]
|
|
8007220: f503 732a add.w r3, r3, #680 @ 0x2a8
|
|
8007224: 4619 mov r1, r3
|
|
8007226: 6878 ldr r0, [r7, #4]
|
|
8007228: f000 f9ce bl 80075c8 <USBD_StdDevReq>
|
|
break;
|
|
800722c: e01a b.n 8007264 <USBD_LL_SetupStage+0x90>
|
|
|
|
case USB_REQ_RECIPIENT_INTERFACE:
|
|
USBD_StdItfReq(pdev, &pdev->request);
|
|
800722e: 687b ldr r3, [r7, #4]
|
|
8007230: f503 732a add.w r3, r3, #680 @ 0x2a8
|
|
8007234: 4619 mov r1, r3
|
|
8007236: 6878 ldr r0, [r7, #4]
|
|
8007238: f000 fa30 bl 800769c <USBD_StdItfReq>
|
|
break;
|
|
800723c: e012 b.n 8007264 <USBD_LL_SetupStage+0x90>
|
|
|
|
case USB_REQ_RECIPIENT_ENDPOINT:
|
|
USBD_StdEPReq(pdev, &pdev->request);
|
|
800723e: 687b ldr r3, [r7, #4]
|
|
8007240: f503 732a add.w r3, r3, #680 @ 0x2a8
|
|
8007244: 4619 mov r1, r3
|
|
8007246: 6878 ldr r0, [r7, #4]
|
|
8007248: f000 fa70 bl 800772c <USBD_StdEPReq>
|
|
break;
|
|
800724c: e00a b.n 8007264 <USBD_LL_SetupStage+0x90>
|
|
|
|
default:
|
|
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
|
|
800724e: 687b ldr r3, [r7, #4]
|
|
8007250: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
|
|
8007254: f023 037f bic.w r3, r3, #127 @ 0x7f
|
|
8007258: b2db uxtb r3, r3
|
|
800725a: 4619 mov r1, r3
|
|
800725c: 6878 ldr r0, [r7, #4]
|
|
800725e: f001 fb39 bl 80088d4 <USBD_LL_StallEP>
|
|
break;
|
|
8007262: bf00 nop
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007264: 2300 movs r3, #0
|
|
}
|
|
8007266: 4618 mov r0, r3
|
|
8007268: 3708 adds r7, #8
|
|
800726a: 46bd mov sp, r7
|
|
800726c: bd80 pop {r7, pc}
|
|
|
|
0800726e <USBD_LL_DataOutStage>:
|
|
* @param epnum: endpoint index
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
|
|
uint8_t epnum, uint8_t *pdata)
|
|
{
|
|
800726e: b580 push {r7, lr}
|
|
8007270: b086 sub sp, #24
|
|
8007272: af00 add r7, sp, #0
|
|
8007274: 60f8 str r0, [r7, #12]
|
|
8007276: 460b mov r3, r1
|
|
8007278: 607a str r2, [r7, #4]
|
|
800727a: 72fb strb r3, [r7, #11]
|
|
USBD_EndpointTypeDef *pep;
|
|
|
|
if (epnum == 0U)
|
|
800727c: 7afb ldrb r3, [r7, #11]
|
|
800727e: 2b00 cmp r3, #0
|
|
8007280: d14b bne.n 800731a <USBD_LL_DataOutStage+0xac>
|
|
{
|
|
pep = &pdev->ep_out[0];
|
|
8007282: 68fb ldr r3, [r7, #12]
|
|
8007284: f503 73aa add.w r3, r3, #340 @ 0x154
|
|
8007288: 617b str r3, [r7, #20]
|
|
|
|
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
|
|
800728a: 68fb ldr r3, [r7, #12]
|
|
800728c: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
|
|
8007290: 2b03 cmp r3, #3
|
|
8007292: d134 bne.n 80072fe <USBD_LL_DataOutStage+0x90>
|
|
{
|
|
if (pep->rem_length > pep->maxpacket)
|
|
8007294: 697b ldr r3, [r7, #20]
|
|
8007296: 68da ldr r2, [r3, #12]
|
|
8007298: 697b ldr r3, [r7, #20]
|
|
800729a: 691b ldr r3, [r3, #16]
|
|
800729c: 429a cmp r2, r3
|
|
800729e: d919 bls.n 80072d4 <USBD_LL_DataOutStage+0x66>
|
|
{
|
|
pep->rem_length -= pep->maxpacket;
|
|
80072a0: 697b ldr r3, [r7, #20]
|
|
80072a2: 68da ldr r2, [r3, #12]
|
|
80072a4: 697b ldr r3, [r7, #20]
|
|
80072a6: 691b ldr r3, [r3, #16]
|
|
80072a8: 1ad2 subs r2, r2, r3
|
|
80072aa: 697b ldr r3, [r7, #20]
|
|
80072ac: 60da str r2, [r3, #12]
|
|
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
|
|
80072ae: 697b ldr r3, [r7, #20]
|
|
80072b0: 68da ldr r2, [r3, #12]
|
|
80072b2: 697b ldr r3, [r7, #20]
|
|
80072b4: 691b ldr r3, [r3, #16]
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
80072b6: 429a cmp r2, r3
|
|
80072b8: d203 bcs.n 80072c2 <USBD_LL_DataOutStage+0x54>
|
|
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
|
|
80072ba: 697b ldr r3, [r7, #20]
|
|
80072bc: 68db ldr r3, [r3, #12]
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
80072be: b29b uxth r3, r3
|
|
80072c0: e002 b.n 80072c8 <USBD_LL_DataOutStage+0x5a>
|
|
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
|
|
80072c2: 697b ldr r3, [r7, #20]
|
|
80072c4: 691b ldr r3, [r3, #16]
|
|
USBD_CtlContinueRx(pdev, pdata,
|
|
80072c6: b29b uxth r3, r3
|
|
80072c8: 461a mov r2, r3
|
|
80072ca: 6879 ldr r1, [r7, #4]
|
|
80072cc: 68f8 ldr r0, [r7, #12]
|
|
80072ce: f000 ff59 bl 8008184 <USBD_CtlContinueRx>
|
|
80072d2: e038 b.n 8007346 <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
else
|
|
{
|
|
if ((pdev->pClass->EP0_RxReady != NULL) &&
|
|
80072d4: 68fb ldr r3, [r7, #12]
|
|
80072d6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
80072da: 691b ldr r3, [r3, #16]
|
|
80072dc: 2b00 cmp r3, #0
|
|
80072de: d00a beq.n 80072f6 <USBD_LL_DataOutStage+0x88>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
80072e0: 68fb ldr r3, [r7, #12]
|
|
80072e2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
if ((pdev->pClass->EP0_RxReady != NULL) &&
|
|
80072e6: 2b03 cmp r3, #3
|
|
80072e8: d105 bne.n 80072f6 <USBD_LL_DataOutStage+0x88>
|
|
{
|
|
pdev->pClass->EP0_RxReady(pdev);
|
|
80072ea: 68fb ldr r3, [r7, #12]
|
|
80072ec: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
80072f0: 691b ldr r3, [r3, #16]
|
|
80072f2: 68f8 ldr r0, [r7, #12]
|
|
80072f4: 4798 blx r3
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
80072f6: 68f8 ldr r0, [r7, #12]
|
|
80072f8: f000 ff56 bl 80081a8 <USBD_CtlSendStatus>
|
|
80072fc: e023 b.n 8007346 <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
|
|
80072fe: 68fb ldr r3, [r7, #12]
|
|
8007300: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
|
|
8007304: 2b05 cmp r3, #5
|
|
8007306: d11e bne.n 8007346 <USBD_LL_DataOutStage+0xd8>
|
|
{
|
|
/*
|
|
* STATUS PHASE completed, update ep0_state to idle
|
|
*/
|
|
pdev->ep0_state = USBD_EP0_IDLE;
|
|
8007308: 68fb ldr r3, [r7, #12]
|
|
800730a: 2200 movs r2, #0
|
|
800730c: f8c3 2294 str.w r2, [r3, #660] @ 0x294
|
|
USBD_LL_StallEP(pdev, 0U);
|
|
8007310: 2100 movs r1, #0
|
|
8007312: 68f8 ldr r0, [r7, #12]
|
|
8007314: f001 fade bl 80088d4 <USBD_LL_StallEP>
|
|
8007318: e015 b.n 8007346 <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
}
|
|
}
|
|
else if ((pdev->pClass->DataOut != NULL) &&
|
|
800731a: 68fb ldr r3, [r7, #12]
|
|
800731c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007320: 699b ldr r3, [r3, #24]
|
|
8007322: 2b00 cmp r3, #0
|
|
8007324: d00d beq.n 8007342 <USBD_LL_DataOutStage+0xd4>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8007326: 68fb ldr r3, [r7, #12]
|
|
8007328: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
else if ((pdev->pClass->DataOut != NULL) &&
|
|
800732c: 2b03 cmp r3, #3
|
|
800732e: d108 bne.n 8007342 <USBD_LL_DataOutStage+0xd4>
|
|
{
|
|
pdev->pClass->DataOut(pdev, epnum);
|
|
8007330: 68fb ldr r3, [r7, #12]
|
|
8007332: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007336: 699b ldr r3, [r3, #24]
|
|
8007338: 7afa ldrb r2, [r7, #11]
|
|
800733a: 4611 mov r1, r2
|
|
800733c: 68f8 ldr r0, [r7, #12]
|
|
800733e: 4798 blx r3
|
|
8007340: e001 b.n 8007346 <USBD_LL_DataOutStage+0xd8>
|
|
}
|
|
else
|
|
{
|
|
/* should never be in this condition */
|
|
return USBD_FAIL;
|
|
8007342: 2302 movs r3, #2
|
|
8007344: e000 b.n 8007348 <USBD_LL_DataOutStage+0xda>
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007346: 2300 movs r3, #0
|
|
}
|
|
8007348: 4618 mov r0, r3
|
|
800734a: 3718 adds r7, #24
|
|
800734c: 46bd mov sp, r7
|
|
800734e: bd80 pop {r7, pc}
|
|
|
|
08007350 <USBD_LL_DataInStage>:
|
|
* @param epnum: endpoint index
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
|
|
uint8_t epnum, uint8_t *pdata)
|
|
{
|
|
8007350: b580 push {r7, lr}
|
|
8007352: b086 sub sp, #24
|
|
8007354: af00 add r7, sp, #0
|
|
8007356: 60f8 str r0, [r7, #12]
|
|
8007358: 460b mov r3, r1
|
|
800735a: 607a str r2, [r7, #4]
|
|
800735c: 72fb strb r3, [r7, #11]
|
|
USBD_EndpointTypeDef *pep;
|
|
|
|
if (epnum == 0U)
|
|
800735e: 7afb ldrb r3, [r7, #11]
|
|
8007360: 2b00 cmp r3, #0
|
|
8007362: d17f bne.n 8007464 <USBD_LL_DataInStage+0x114>
|
|
{
|
|
pep = &pdev->ep_in[0];
|
|
8007364: 68fb ldr r3, [r7, #12]
|
|
8007366: 3314 adds r3, #20
|
|
8007368: 617b str r3, [r7, #20]
|
|
|
|
if (pdev->ep0_state == USBD_EP0_DATA_IN)
|
|
800736a: 68fb ldr r3, [r7, #12]
|
|
800736c: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
|
|
8007370: 2b02 cmp r3, #2
|
|
8007372: d15c bne.n 800742e <USBD_LL_DataInStage+0xde>
|
|
{
|
|
if (pep->rem_length > pep->maxpacket)
|
|
8007374: 697b ldr r3, [r7, #20]
|
|
8007376: 68da ldr r2, [r3, #12]
|
|
8007378: 697b ldr r3, [r7, #20]
|
|
800737a: 691b ldr r3, [r3, #16]
|
|
800737c: 429a cmp r2, r3
|
|
800737e: d915 bls.n 80073ac <USBD_LL_DataInStage+0x5c>
|
|
{
|
|
pep->rem_length -= pep->maxpacket;
|
|
8007380: 697b ldr r3, [r7, #20]
|
|
8007382: 68da ldr r2, [r3, #12]
|
|
8007384: 697b ldr r3, [r7, #20]
|
|
8007386: 691b ldr r3, [r3, #16]
|
|
8007388: 1ad2 subs r2, r2, r3
|
|
800738a: 697b ldr r3, [r7, #20]
|
|
800738c: 60da str r2, [r3, #12]
|
|
|
|
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
|
|
800738e: 697b ldr r3, [r7, #20]
|
|
8007390: 68db ldr r3, [r3, #12]
|
|
8007392: b29b uxth r3, r3
|
|
8007394: 461a mov r2, r3
|
|
8007396: 6879 ldr r1, [r7, #4]
|
|
8007398: 68f8 ldr r0, [r7, #12]
|
|
800739a: f000 fec3 bl 8008124 <USBD_CtlContinueSendData>
|
|
|
|
/* Prepare endpoint for premature end of transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
|
|
800739e: 2300 movs r3, #0
|
|
80073a0: 2200 movs r2, #0
|
|
80073a2: 2100 movs r1, #0
|
|
80073a4: 68f8 ldr r0, [r7, #12]
|
|
80073a6: f001 fb42 bl 8008a2e <USBD_LL_PrepareReceive>
|
|
80073aa: e04e b.n 800744a <USBD_LL_DataInStage+0xfa>
|
|
}
|
|
else
|
|
{
|
|
/* last packet is MPS multiple, so send ZLP packet */
|
|
if ((pep->total_length % pep->maxpacket == 0U) &&
|
|
80073ac: 697b ldr r3, [r7, #20]
|
|
80073ae: 689b ldr r3, [r3, #8]
|
|
80073b0: 697a ldr r2, [r7, #20]
|
|
80073b2: 6912 ldr r2, [r2, #16]
|
|
80073b4: fbb3 f1f2 udiv r1, r3, r2
|
|
80073b8: fb01 f202 mul.w r2, r1, r2
|
|
80073bc: 1a9b subs r3, r3, r2
|
|
80073be: 2b00 cmp r3, #0
|
|
80073c0: d11c bne.n 80073fc <USBD_LL_DataInStage+0xac>
|
|
(pep->total_length >= pep->maxpacket) &&
|
|
80073c2: 697b ldr r3, [r7, #20]
|
|
80073c4: 689a ldr r2, [r3, #8]
|
|
80073c6: 697b ldr r3, [r7, #20]
|
|
80073c8: 691b ldr r3, [r3, #16]
|
|
if ((pep->total_length % pep->maxpacket == 0U) &&
|
|
80073ca: 429a cmp r2, r3
|
|
80073cc: d316 bcc.n 80073fc <USBD_LL_DataInStage+0xac>
|
|
(pep->total_length < pdev->ep0_data_len))
|
|
80073ce: 697b ldr r3, [r7, #20]
|
|
80073d0: 689a ldr r2, [r3, #8]
|
|
80073d2: 68fb ldr r3, [r7, #12]
|
|
80073d4: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
|
|
(pep->total_length >= pep->maxpacket) &&
|
|
80073d8: 429a cmp r2, r3
|
|
80073da: d20f bcs.n 80073fc <USBD_LL_DataInStage+0xac>
|
|
{
|
|
USBD_CtlContinueSendData(pdev, NULL, 0U);
|
|
80073dc: 2200 movs r2, #0
|
|
80073de: 2100 movs r1, #0
|
|
80073e0: 68f8 ldr r0, [r7, #12]
|
|
80073e2: f000 fe9f bl 8008124 <USBD_CtlContinueSendData>
|
|
pdev->ep0_data_len = 0U;
|
|
80073e6: 68fb ldr r3, [r7, #12]
|
|
80073e8: 2200 movs r2, #0
|
|
80073ea: f8c3 2298 str.w r2, [r3, #664] @ 0x298
|
|
|
|
/* Prepare endpoint for premature end of transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
|
|
80073ee: 2300 movs r3, #0
|
|
80073f0: 2200 movs r2, #0
|
|
80073f2: 2100 movs r1, #0
|
|
80073f4: 68f8 ldr r0, [r7, #12]
|
|
80073f6: f001 fb1a bl 8008a2e <USBD_LL_PrepareReceive>
|
|
80073fa: e026 b.n 800744a <USBD_LL_DataInStage+0xfa>
|
|
}
|
|
else
|
|
{
|
|
if ((pdev->pClass->EP0_TxSent != NULL) &&
|
|
80073fc: 68fb ldr r3, [r7, #12]
|
|
80073fe: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007402: 68db ldr r3, [r3, #12]
|
|
8007404: 2b00 cmp r3, #0
|
|
8007406: d00a beq.n 800741e <USBD_LL_DataInStage+0xce>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8007408: 68fb ldr r3, [r7, #12]
|
|
800740a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
if ((pdev->pClass->EP0_TxSent != NULL) &&
|
|
800740e: 2b03 cmp r3, #3
|
|
8007410: d105 bne.n 800741e <USBD_LL_DataInStage+0xce>
|
|
{
|
|
pdev->pClass->EP0_TxSent(pdev);
|
|
8007412: 68fb ldr r3, [r7, #12]
|
|
8007414: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007418: 68db ldr r3, [r3, #12]
|
|
800741a: 68f8 ldr r0, [r7, #12]
|
|
800741c: 4798 blx r3
|
|
}
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
800741e: 2180 movs r1, #128 @ 0x80
|
|
8007420: 68f8 ldr r0, [r7, #12]
|
|
8007422: f001 fa57 bl 80088d4 <USBD_LL_StallEP>
|
|
USBD_CtlReceiveStatus(pdev);
|
|
8007426: 68f8 ldr r0, [r7, #12]
|
|
8007428: f000 fed1 bl 80081ce <USBD_CtlReceiveStatus>
|
|
800742c: e00d b.n 800744a <USBD_LL_DataInStage+0xfa>
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
|
|
800742e: 68fb ldr r3, [r7, #12]
|
|
8007430: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
|
|
8007434: 2b04 cmp r3, #4
|
|
8007436: d004 beq.n 8007442 <USBD_LL_DataInStage+0xf2>
|
|
(pdev->ep0_state == USBD_EP0_IDLE))
|
|
8007438: 68fb ldr r3, [r7, #12]
|
|
800743a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
|
|
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
|
|
800743e: 2b00 cmp r3, #0
|
|
8007440: d103 bne.n 800744a <USBD_LL_DataInStage+0xfa>
|
|
{
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8007442: 2180 movs r1, #128 @ 0x80
|
|
8007444: 68f8 ldr r0, [r7, #12]
|
|
8007446: f001 fa45 bl 80088d4 <USBD_LL_StallEP>
|
|
}
|
|
}
|
|
|
|
if (pdev->dev_test_mode == 1U)
|
|
800744a: 68fb ldr r3, [r7, #12]
|
|
800744c: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
|
|
8007450: 2b01 cmp r3, #1
|
|
8007452: d11d bne.n 8007490 <USBD_LL_DataInStage+0x140>
|
|
{
|
|
USBD_RunTestMode(pdev);
|
|
8007454: 68f8 ldr r0, [r7, #12]
|
|
8007456: f7ff fe80 bl 800715a <USBD_RunTestMode>
|
|
pdev->dev_test_mode = 0U;
|
|
800745a: 68fb ldr r3, [r7, #12]
|
|
800745c: 2200 movs r2, #0
|
|
800745e: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
|
|
8007462: e015 b.n 8007490 <USBD_LL_DataInStage+0x140>
|
|
}
|
|
}
|
|
else if ((pdev->pClass->DataIn != NULL) &&
|
|
8007464: 68fb ldr r3, [r7, #12]
|
|
8007466: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
800746a: 695b ldr r3, [r3, #20]
|
|
800746c: 2b00 cmp r3, #0
|
|
800746e: d00d beq.n 800748c <USBD_LL_DataInStage+0x13c>
|
|
(pdev->dev_state == USBD_STATE_CONFIGURED))
|
|
8007470: 68fb ldr r3, [r7, #12]
|
|
8007472: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
else if ((pdev->pClass->DataIn != NULL) &&
|
|
8007476: 2b03 cmp r3, #3
|
|
8007478: d108 bne.n 800748c <USBD_LL_DataInStage+0x13c>
|
|
{
|
|
pdev->pClass->DataIn(pdev, epnum);
|
|
800747a: 68fb ldr r3, [r7, #12]
|
|
800747c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007480: 695b ldr r3, [r3, #20]
|
|
8007482: 7afa ldrb r2, [r7, #11]
|
|
8007484: 4611 mov r1, r2
|
|
8007486: 68f8 ldr r0, [r7, #12]
|
|
8007488: 4798 blx r3
|
|
800748a: e001 b.n 8007490 <USBD_LL_DataInStage+0x140>
|
|
}
|
|
else
|
|
{
|
|
/* should never be in this condition */
|
|
return USBD_FAIL;
|
|
800748c: 2302 movs r3, #2
|
|
800748e: e000 b.n 8007492 <USBD_LL_DataInStage+0x142>
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007490: 2300 movs r3, #0
|
|
}
|
|
8007492: 4618 mov r0, r3
|
|
8007494: 3718 adds r7, #24
|
|
8007496: 46bd mov sp, r7
|
|
8007498: bd80 pop {r7, pc}
|
|
|
|
0800749a <USBD_LL_Reset>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
|
|
{
|
|
800749a: b580 push {r7, lr}
|
|
800749c: b082 sub sp, #8
|
|
800749e: af00 add r7, sp, #0
|
|
80074a0: 6078 str r0, [r7, #4]
|
|
/* Open EP0 OUT */
|
|
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
|
|
80074a2: 2340 movs r3, #64 @ 0x40
|
|
80074a4: 2200 movs r2, #0
|
|
80074a6: 2100 movs r1, #0
|
|
80074a8: 6878 ldr r0, [r7, #4]
|
|
80074aa: f001 f9ce bl 800884a <USBD_LL_OpenEP>
|
|
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
|
|
80074ae: 687b ldr r3, [r7, #4]
|
|
80074b0: 2201 movs r2, #1
|
|
80074b2: f8c3 2158 str.w r2, [r3, #344] @ 0x158
|
|
|
|
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
|
|
80074b6: 687b ldr r3, [r7, #4]
|
|
80074b8: 2240 movs r2, #64 @ 0x40
|
|
80074ba: f8c3 2164 str.w r2, [r3, #356] @ 0x164
|
|
|
|
/* Open EP0 IN */
|
|
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
|
|
80074be: 2340 movs r3, #64 @ 0x40
|
|
80074c0: 2200 movs r2, #0
|
|
80074c2: 2180 movs r1, #128 @ 0x80
|
|
80074c4: 6878 ldr r0, [r7, #4]
|
|
80074c6: f001 f9c0 bl 800884a <USBD_LL_OpenEP>
|
|
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
|
|
80074ca: 687b ldr r3, [r7, #4]
|
|
80074cc: 2201 movs r2, #1
|
|
80074ce: 619a str r2, [r3, #24]
|
|
|
|
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
|
|
80074d0: 687b ldr r3, [r7, #4]
|
|
80074d2: 2240 movs r2, #64 @ 0x40
|
|
80074d4: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
/* Upon Reset call user call back */
|
|
pdev->dev_state = USBD_STATE_DEFAULT;
|
|
80074d6: 687b ldr r3, [r7, #4]
|
|
80074d8: 2201 movs r2, #1
|
|
80074da: f883 229c strb.w r2, [r3, #668] @ 0x29c
|
|
pdev->ep0_state = USBD_EP0_IDLE;
|
|
80074de: 687b ldr r3, [r7, #4]
|
|
80074e0: 2200 movs r2, #0
|
|
80074e2: f8c3 2294 str.w r2, [r3, #660] @ 0x294
|
|
pdev->dev_config = 0U;
|
|
80074e6: 687b ldr r3, [r7, #4]
|
|
80074e8: 2200 movs r2, #0
|
|
80074ea: 605a str r2, [r3, #4]
|
|
pdev->dev_remote_wakeup = 0U;
|
|
80074ec: 687b ldr r3, [r7, #4]
|
|
80074ee: 2200 movs r2, #0
|
|
80074f0: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
|
|
|
|
if (pdev->pClassData)
|
|
80074f4: 687b ldr r3, [r7, #4]
|
|
80074f6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
80074fa: 2b00 cmp r3, #0
|
|
80074fc: d009 beq.n 8007512 <USBD_LL_Reset+0x78>
|
|
{
|
|
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
|
|
80074fe: 687b ldr r3, [r7, #4]
|
|
8007500: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007504: 685b ldr r3, [r3, #4]
|
|
8007506: 687a ldr r2, [r7, #4]
|
|
8007508: 6852 ldr r2, [r2, #4]
|
|
800750a: b2d2 uxtb r2, r2
|
|
800750c: 4611 mov r1, r2
|
|
800750e: 6878 ldr r0, [r7, #4]
|
|
8007510: 4798 blx r3
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007512: 2300 movs r3, #0
|
|
}
|
|
8007514: 4618 mov r0, r3
|
|
8007516: 3708 adds r7, #8
|
|
8007518: 46bd mov sp, r7
|
|
800751a: bd80 pop {r7, pc}
|
|
|
|
0800751c <USBD_LL_SetSpeed>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
|
|
USBD_SpeedTypeDef speed)
|
|
{
|
|
800751c: b480 push {r7}
|
|
800751e: b083 sub sp, #12
|
|
8007520: af00 add r7, sp, #0
|
|
8007522: 6078 str r0, [r7, #4]
|
|
8007524: 460b mov r3, r1
|
|
8007526: 70fb strb r3, [r7, #3]
|
|
pdev->dev_speed = speed;
|
|
8007528: 687b ldr r3, [r7, #4]
|
|
800752a: 78fa ldrb r2, [r7, #3]
|
|
800752c: 741a strb r2, [r3, #16]
|
|
|
|
return USBD_OK;
|
|
800752e: 2300 movs r3, #0
|
|
}
|
|
8007530: 4618 mov r0, r3
|
|
8007532: 370c adds r7, #12
|
|
8007534: 46bd mov sp, r7
|
|
8007536: f85d 7b04 ldr.w r7, [sp], #4
|
|
800753a: 4770 bx lr
|
|
|
|
0800753c <USBD_LL_Suspend>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
|
|
{
|
|
800753c: b480 push {r7}
|
|
800753e: b083 sub sp, #12
|
|
8007540: af00 add r7, sp, #0
|
|
8007542: 6078 str r0, [r7, #4]
|
|
pdev->dev_old_state = pdev->dev_state;
|
|
8007544: 687b ldr r3, [r7, #4]
|
|
8007546: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
|
|
800754a: 687b ldr r3, [r7, #4]
|
|
800754c: f883 229d strb.w r2, [r3, #669] @ 0x29d
|
|
pdev->dev_state = USBD_STATE_SUSPENDED;
|
|
8007550: 687b ldr r3, [r7, #4]
|
|
8007552: 2204 movs r2, #4
|
|
8007554: f883 229c strb.w r2, [r3, #668] @ 0x29c
|
|
|
|
return USBD_OK;
|
|
8007558: 2300 movs r3, #0
|
|
}
|
|
800755a: 4618 mov r0, r3
|
|
800755c: 370c adds r7, #12
|
|
800755e: 46bd mov sp, r7
|
|
8007560: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007564: 4770 bx lr
|
|
|
|
08007566 <USBD_LL_Resume>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007566: b480 push {r7}
|
|
8007568: b083 sub sp, #12
|
|
800756a: af00 add r7, sp, #0
|
|
800756c: 6078 str r0, [r7, #4]
|
|
if (pdev->dev_state == USBD_STATE_SUSPENDED)
|
|
800756e: 687b ldr r3, [r7, #4]
|
|
8007570: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8007574: 2b04 cmp r3, #4
|
|
8007576: d105 bne.n 8007584 <USBD_LL_Resume+0x1e>
|
|
{
|
|
pdev->dev_state = pdev->dev_old_state;
|
|
8007578: 687b ldr r3, [r7, #4]
|
|
800757a: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
|
|
800757e: 687b ldr r3, [r7, #4]
|
|
8007580: f883 229c strb.w r2, [r3, #668] @ 0x29c
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007584: 2300 movs r3, #0
|
|
}
|
|
8007586: 4618 mov r0, r3
|
|
8007588: 370c adds r7, #12
|
|
800758a: 46bd mov sp, r7
|
|
800758c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007590: 4770 bx lr
|
|
|
|
08007592 <USBD_LL_SOF>:
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
|
|
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8007592: b580 push {r7, lr}
|
|
8007594: b082 sub sp, #8
|
|
8007596: af00 add r7, sp, #0
|
|
8007598: 6078 str r0, [r7, #4]
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
800759a: 687b ldr r3, [r7, #4]
|
|
800759c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
80075a0: 2b03 cmp r3, #3
|
|
80075a2: d10b bne.n 80075bc <USBD_LL_SOF+0x2a>
|
|
{
|
|
if (pdev->pClass->SOF != NULL)
|
|
80075a4: 687b ldr r3, [r7, #4]
|
|
80075a6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
80075aa: 69db ldr r3, [r3, #28]
|
|
80075ac: 2b00 cmp r3, #0
|
|
80075ae: d005 beq.n 80075bc <USBD_LL_SOF+0x2a>
|
|
{
|
|
pdev->pClass->SOF(pdev);
|
|
80075b0: 687b ldr r3, [r7, #4]
|
|
80075b2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
80075b6: 69db ldr r3, [r3, #28]
|
|
80075b8: 6878 ldr r0, [r7, #4]
|
|
80075ba: 4798 blx r3
|
|
}
|
|
}
|
|
|
|
return USBD_OK;
|
|
80075bc: 2300 movs r3, #0
|
|
}
|
|
80075be: 4618 mov r0, r3
|
|
80075c0: 3708 adds r7, #8
|
|
80075c2: 46bd mov sp, r7
|
|
80075c4: bd80 pop {r7, pc}
|
|
...
|
|
|
|
080075c8 <USBD_StdDevReq>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
80075c8: b580 push {r7, lr}
|
|
80075ca: b084 sub sp, #16
|
|
80075cc: af00 add r7, sp, #0
|
|
80075ce: 6078 str r0, [r7, #4]
|
|
80075d0: 6039 str r1, [r7, #0]
|
|
USBD_StatusTypeDef ret = USBD_OK;
|
|
80075d2: 2300 movs r3, #0
|
|
80075d4: 73fb strb r3, [r7, #15]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
80075d6: 683b ldr r3, [r7, #0]
|
|
80075d8: 781b ldrb r3, [r3, #0]
|
|
80075da: f003 0360 and.w r3, r3, #96 @ 0x60
|
|
80075de: 2b40 cmp r3, #64 @ 0x40
|
|
80075e0: d005 beq.n 80075ee <USBD_StdDevReq+0x26>
|
|
80075e2: 2b40 cmp r3, #64 @ 0x40
|
|
80075e4: d84f bhi.n 8007686 <USBD_StdDevReq+0xbe>
|
|
80075e6: 2b00 cmp r3, #0
|
|
80075e8: d009 beq.n 80075fe <USBD_StdDevReq+0x36>
|
|
80075ea: 2b20 cmp r3, #32
|
|
80075ec: d14b bne.n 8007686 <USBD_StdDevReq+0xbe>
|
|
{
|
|
case USB_REQ_TYPE_CLASS:
|
|
case USB_REQ_TYPE_VENDOR:
|
|
pdev->pClass->Setup(pdev, req);
|
|
80075ee: 687b ldr r3, [r7, #4]
|
|
80075f0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
80075f4: 689b ldr r3, [r3, #8]
|
|
80075f6: 6839 ldr r1, [r7, #0]
|
|
80075f8: 6878 ldr r0, [r7, #4]
|
|
80075fa: 4798 blx r3
|
|
break;
|
|
80075fc: e048 b.n 8007690 <USBD_StdDevReq+0xc8>
|
|
|
|
case USB_REQ_TYPE_STANDARD:
|
|
switch (req->bRequest)
|
|
80075fe: 683b ldr r3, [r7, #0]
|
|
8007600: 785b ldrb r3, [r3, #1]
|
|
8007602: 2b09 cmp r3, #9
|
|
8007604: d839 bhi.n 800767a <USBD_StdDevReq+0xb2>
|
|
8007606: a201 add r2, pc, #4 @ (adr r2, 800760c <USBD_StdDevReq+0x44>)
|
|
8007608: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
800760c: 0800765d .word 0x0800765d
|
|
8007610: 08007671 .word 0x08007671
|
|
8007614: 0800767b .word 0x0800767b
|
|
8007618: 08007667 .word 0x08007667
|
|
800761c: 0800767b .word 0x0800767b
|
|
8007620: 0800763f .word 0x0800763f
|
|
8007624: 08007635 .word 0x08007635
|
|
8007628: 0800767b .word 0x0800767b
|
|
800762c: 08007653 .word 0x08007653
|
|
8007630: 08007649 .word 0x08007649
|
|
{
|
|
case USB_REQ_GET_DESCRIPTOR:
|
|
USBD_GetDescriptor(pdev, req);
|
|
8007634: 6839 ldr r1, [r7, #0]
|
|
8007636: 6878 ldr r0, [r7, #4]
|
|
8007638: f000 f9dc bl 80079f4 <USBD_GetDescriptor>
|
|
break;
|
|
800763c: e022 b.n 8007684 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_SET_ADDRESS:
|
|
USBD_SetAddress(pdev, req);
|
|
800763e: 6839 ldr r1, [r7, #0]
|
|
8007640: 6878 ldr r0, [r7, #4]
|
|
8007642: f000 fb3f bl 8007cc4 <USBD_SetAddress>
|
|
break;
|
|
8007646: e01d b.n 8007684 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_SET_CONFIGURATION:
|
|
USBD_SetConfig(pdev, req);
|
|
8007648: 6839 ldr r1, [r7, #0]
|
|
800764a: 6878 ldr r0, [r7, #4]
|
|
800764c: f000 fb7e bl 8007d4c <USBD_SetConfig>
|
|
break;
|
|
8007650: e018 b.n 8007684 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_GET_CONFIGURATION:
|
|
USBD_GetConfig(pdev, req);
|
|
8007652: 6839 ldr r1, [r7, #0]
|
|
8007654: 6878 ldr r0, [r7, #4]
|
|
8007656: f000 fc07 bl 8007e68 <USBD_GetConfig>
|
|
break;
|
|
800765a: e013 b.n 8007684 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_GET_STATUS:
|
|
USBD_GetStatus(pdev, req);
|
|
800765c: 6839 ldr r1, [r7, #0]
|
|
800765e: 6878 ldr r0, [r7, #4]
|
|
8007660: f000 fc37 bl 8007ed2 <USBD_GetStatus>
|
|
break;
|
|
8007664: e00e b.n 8007684 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_SET_FEATURE:
|
|
USBD_SetFeature(pdev, req);
|
|
8007666: 6839 ldr r1, [r7, #0]
|
|
8007668: 6878 ldr r0, [r7, #4]
|
|
800766a: f000 fc65 bl 8007f38 <USBD_SetFeature>
|
|
break;
|
|
800766e: e009 b.n 8007684 <USBD_StdDevReq+0xbc>
|
|
|
|
case USB_REQ_CLEAR_FEATURE:
|
|
USBD_ClrFeature(pdev, req);
|
|
8007670: 6839 ldr r1, [r7, #0]
|
|
8007672: 6878 ldr r0, [r7, #4]
|
|
8007674: f000 fc74 bl 8007f60 <USBD_ClrFeature>
|
|
break;
|
|
8007678: e004 b.n 8007684 <USBD_StdDevReq+0xbc>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800767a: 6839 ldr r1, [r7, #0]
|
|
800767c: 6878 ldr r0, [r7, #4]
|
|
800767e: f000 fcca bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007682: bf00 nop
|
|
}
|
|
break;
|
|
8007684: e004 b.n 8007690 <USBD_StdDevReq+0xc8>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007686: 6839 ldr r1, [r7, #0]
|
|
8007688: 6878 ldr r0, [r7, #4]
|
|
800768a: f000 fcc4 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
800768e: bf00 nop
|
|
}
|
|
|
|
return ret;
|
|
8007690: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8007692: 4618 mov r0, r3
|
|
8007694: 3710 adds r7, #16
|
|
8007696: 46bd mov sp, r7
|
|
8007698: bd80 pop {r7, pc}
|
|
800769a: bf00 nop
|
|
|
|
0800769c <USBD_StdItfReq>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
800769c: b580 push {r7, lr}
|
|
800769e: b084 sub sp, #16
|
|
80076a0: af00 add r7, sp, #0
|
|
80076a2: 6078 str r0, [r7, #4]
|
|
80076a4: 6039 str r1, [r7, #0]
|
|
USBD_StatusTypeDef ret = USBD_OK;
|
|
80076a6: 2300 movs r3, #0
|
|
80076a8: 73fb strb r3, [r7, #15]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
80076aa: 683b ldr r3, [r7, #0]
|
|
80076ac: 781b ldrb r3, [r3, #0]
|
|
80076ae: f003 0360 and.w r3, r3, #96 @ 0x60
|
|
80076b2: 2b40 cmp r3, #64 @ 0x40
|
|
80076b4: d005 beq.n 80076c2 <USBD_StdItfReq+0x26>
|
|
80076b6: 2b40 cmp r3, #64 @ 0x40
|
|
80076b8: d82e bhi.n 8007718 <USBD_StdItfReq+0x7c>
|
|
80076ba: 2b00 cmp r3, #0
|
|
80076bc: d001 beq.n 80076c2 <USBD_StdItfReq+0x26>
|
|
80076be: 2b20 cmp r3, #32
|
|
80076c0: d12a bne.n 8007718 <USBD_StdItfReq+0x7c>
|
|
{
|
|
case USB_REQ_TYPE_CLASS:
|
|
case USB_REQ_TYPE_VENDOR:
|
|
case USB_REQ_TYPE_STANDARD:
|
|
switch (pdev->dev_state)
|
|
80076c2: 687b ldr r3, [r7, #4]
|
|
80076c4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
80076c8: 3b01 subs r3, #1
|
|
80076ca: 2b02 cmp r3, #2
|
|
80076cc: d81d bhi.n 800770a <USBD_StdItfReq+0x6e>
|
|
{
|
|
case USBD_STATE_DEFAULT:
|
|
case USBD_STATE_ADDRESSED:
|
|
case USBD_STATE_CONFIGURED:
|
|
|
|
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
|
|
80076ce: 683b ldr r3, [r7, #0]
|
|
80076d0: 889b ldrh r3, [r3, #4]
|
|
80076d2: b2db uxtb r3, r3
|
|
80076d4: 2b01 cmp r3, #1
|
|
80076d6: d813 bhi.n 8007700 <USBD_StdItfReq+0x64>
|
|
{
|
|
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
|
|
80076d8: 687b ldr r3, [r7, #4]
|
|
80076da: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
80076de: 689b ldr r3, [r3, #8]
|
|
80076e0: 6839 ldr r1, [r7, #0]
|
|
80076e2: 6878 ldr r0, [r7, #4]
|
|
80076e4: 4798 blx r3
|
|
80076e6: 4603 mov r3, r0
|
|
80076e8: 73fb strb r3, [r7, #15]
|
|
|
|
if ((req->wLength == 0U) && (ret == USBD_OK))
|
|
80076ea: 683b ldr r3, [r7, #0]
|
|
80076ec: 88db ldrh r3, [r3, #6]
|
|
80076ee: 2b00 cmp r3, #0
|
|
80076f0: d110 bne.n 8007714 <USBD_StdItfReq+0x78>
|
|
80076f2: 7bfb ldrb r3, [r7, #15]
|
|
80076f4: 2b00 cmp r3, #0
|
|
80076f6: d10d bne.n 8007714 <USBD_StdItfReq+0x78>
|
|
{
|
|
USBD_CtlSendStatus(pdev);
|
|
80076f8: 6878 ldr r0, [r7, #4]
|
|
80076fa: f000 fd55 bl 80081a8 <USBD_CtlSendStatus>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
}
|
|
break;
|
|
80076fe: e009 b.n 8007714 <USBD_StdItfReq+0x78>
|
|
USBD_CtlError(pdev, req);
|
|
8007700: 6839 ldr r1, [r7, #0]
|
|
8007702: 6878 ldr r0, [r7, #4]
|
|
8007704: f000 fc87 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007708: e004 b.n 8007714 <USBD_StdItfReq+0x78>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800770a: 6839 ldr r1, [r7, #0]
|
|
800770c: 6878 ldr r0, [r7, #4]
|
|
800770e: f000 fc82 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007712: e000 b.n 8007716 <USBD_StdItfReq+0x7a>
|
|
break;
|
|
8007714: bf00 nop
|
|
}
|
|
break;
|
|
8007716: e004 b.n 8007722 <USBD_StdItfReq+0x86>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007718: 6839 ldr r1, [r7, #0]
|
|
800771a: 6878 ldr r0, [r7, #4]
|
|
800771c: f000 fc7b bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007720: bf00 nop
|
|
}
|
|
|
|
return USBD_OK;
|
|
8007722: 2300 movs r3, #0
|
|
}
|
|
8007724: 4618 mov r0, r3
|
|
8007726: 3710 adds r7, #16
|
|
8007728: 46bd mov sp, r7
|
|
800772a: bd80 pop {r7, pc}
|
|
|
|
0800772c <USBD_StdEPReq>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
800772c: b580 push {r7, lr}
|
|
800772e: b084 sub sp, #16
|
|
8007730: af00 add r7, sp, #0
|
|
8007732: 6078 str r0, [r7, #4]
|
|
8007734: 6039 str r1, [r7, #0]
|
|
USBD_EndpointTypeDef *pep;
|
|
uint8_t ep_addr;
|
|
USBD_StatusTypeDef ret = USBD_OK;
|
|
8007736: 2300 movs r3, #0
|
|
8007738: 73fb strb r3, [r7, #15]
|
|
ep_addr = LOBYTE(req->wIndex);
|
|
800773a: 683b ldr r3, [r7, #0]
|
|
800773c: 889b ldrh r3, [r3, #4]
|
|
800773e: 73bb strb r3, [r7, #14]
|
|
|
|
switch (req->bmRequest & USB_REQ_TYPE_MASK)
|
|
8007740: 683b ldr r3, [r7, #0]
|
|
8007742: 781b ldrb r3, [r3, #0]
|
|
8007744: f003 0360 and.w r3, r3, #96 @ 0x60
|
|
8007748: 2b40 cmp r3, #64 @ 0x40
|
|
800774a: d007 beq.n 800775c <USBD_StdEPReq+0x30>
|
|
800774c: 2b40 cmp r3, #64 @ 0x40
|
|
800774e: f200 8146 bhi.w 80079de <USBD_StdEPReq+0x2b2>
|
|
8007752: 2b00 cmp r3, #0
|
|
8007754: d00a beq.n 800776c <USBD_StdEPReq+0x40>
|
|
8007756: 2b20 cmp r3, #32
|
|
8007758: f040 8141 bne.w 80079de <USBD_StdEPReq+0x2b2>
|
|
{
|
|
case USB_REQ_TYPE_CLASS:
|
|
case USB_REQ_TYPE_VENDOR:
|
|
pdev->pClass->Setup(pdev, req);
|
|
800775c: 687b ldr r3, [r7, #4]
|
|
800775e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007762: 689b ldr r3, [r3, #8]
|
|
8007764: 6839 ldr r1, [r7, #0]
|
|
8007766: 6878 ldr r0, [r7, #4]
|
|
8007768: 4798 blx r3
|
|
break;
|
|
800776a: e13d b.n 80079e8 <USBD_StdEPReq+0x2bc>
|
|
|
|
case USB_REQ_TYPE_STANDARD:
|
|
/* Check if it is a class request */
|
|
if ((req->bmRequest & 0x60U) == 0x20U)
|
|
800776c: 683b ldr r3, [r7, #0]
|
|
800776e: 781b ldrb r3, [r3, #0]
|
|
8007770: f003 0360 and.w r3, r3, #96 @ 0x60
|
|
8007774: 2b20 cmp r3, #32
|
|
8007776: d10a bne.n 800778e <USBD_StdEPReq+0x62>
|
|
{
|
|
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
|
|
8007778: 687b ldr r3, [r7, #4]
|
|
800777a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
800777e: 689b ldr r3, [r3, #8]
|
|
8007780: 6839 ldr r1, [r7, #0]
|
|
8007782: 6878 ldr r0, [r7, #4]
|
|
8007784: 4798 blx r3
|
|
8007786: 4603 mov r3, r0
|
|
8007788: 73fb strb r3, [r7, #15]
|
|
|
|
return ret;
|
|
800778a: 7bfb ldrb r3, [r7, #15]
|
|
800778c: e12d b.n 80079ea <USBD_StdEPReq+0x2be>
|
|
}
|
|
|
|
switch (req->bRequest)
|
|
800778e: 683b ldr r3, [r7, #0]
|
|
8007790: 785b ldrb r3, [r3, #1]
|
|
8007792: 2b03 cmp r3, #3
|
|
8007794: d007 beq.n 80077a6 <USBD_StdEPReq+0x7a>
|
|
8007796: 2b03 cmp r3, #3
|
|
8007798: f300 811b bgt.w 80079d2 <USBD_StdEPReq+0x2a6>
|
|
800779c: 2b00 cmp r3, #0
|
|
800779e: d072 beq.n 8007886 <USBD_StdEPReq+0x15a>
|
|
80077a0: 2b01 cmp r3, #1
|
|
80077a2: d03a beq.n 800781a <USBD_StdEPReq+0xee>
|
|
80077a4: e115 b.n 80079d2 <USBD_StdEPReq+0x2a6>
|
|
{
|
|
case USB_REQ_SET_FEATURE:
|
|
switch (pdev->dev_state)
|
|
80077a6: 687b ldr r3, [r7, #4]
|
|
80077a8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
80077ac: 2b02 cmp r3, #2
|
|
80077ae: d002 beq.n 80077b6 <USBD_StdEPReq+0x8a>
|
|
80077b0: 2b03 cmp r3, #3
|
|
80077b2: d015 beq.n 80077e0 <USBD_StdEPReq+0xb4>
|
|
80077b4: e02b b.n 800780e <USBD_StdEPReq+0xe2>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
|
|
80077b6: 7bbb ldrb r3, [r7, #14]
|
|
80077b8: 2b00 cmp r3, #0
|
|
80077ba: d00c beq.n 80077d6 <USBD_StdEPReq+0xaa>
|
|
80077bc: 7bbb ldrb r3, [r7, #14]
|
|
80077be: 2b80 cmp r3, #128 @ 0x80
|
|
80077c0: d009 beq.n 80077d6 <USBD_StdEPReq+0xaa>
|
|
{
|
|
USBD_LL_StallEP(pdev, ep_addr);
|
|
80077c2: 7bbb ldrb r3, [r7, #14]
|
|
80077c4: 4619 mov r1, r3
|
|
80077c6: 6878 ldr r0, [r7, #4]
|
|
80077c8: f001 f884 bl 80088d4 <USBD_LL_StallEP>
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
80077cc: 2180 movs r1, #128 @ 0x80
|
|
80077ce: 6878 ldr r0, [r7, #4]
|
|
80077d0: f001 f880 bl 80088d4 <USBD_LL_StallEP>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
}
|
|
break;
|
|
80077d4: e020 b.n 8007818 <USBD_StdEPReq+0xec>
|
|
USBD_CtlError(pdev, req);
|
|
80077d6: 6839 ldr r1, [r7, #0]
|
|
80077d8: 6878 ldr r0, [r7, #4]
|
|
80077da: f000 fc1c bl 8008016 <USBD_CtlError>
|
|
break;
|
|
80077de: e01b b.n 8007818 <USBD_StdEPReq+0xec>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wValue == USB_FEATURE_EP_HALT)
|
|
80077e0: 683b ldr r3, [r7, #0]
|
|
80077e2: 885b ldrh r3, [r3, #2]
|
|
80077e4: 2b00 cmp r3, #0
|
|
80077e6: d10e bne.n 8007806 <USBD_StdEPReq+0xda>
|
|
{
|
|
if ((ep_addr != 0x00U) &&
|
|
80077e8: 7bbb ldrb r3, [r7, #14]
|
|
80077ea: 2b00 cmp r3, #0
|
|
80077ec: d00b beq.n 8007806 <USBD_StdEPReq+0xda>
|
|
80077ee: 7bbb ldrb r3, [r7, #14]
|
|
80077f0: 2b80 cmp r3, #128 @ 0x80
|
|
80077f2: d008 beq.n 8007806 <USBD_StdEPReq+0xda>
|
|
(ep_addr != 0x80U) && (req->wLength == 0x00U))
|
|
80077f4: 683b ldr r3, [r7, #0]
|
|
80077f6: 88db ldrh r3, [r3, #6]
|
|
80077f8: 2b00 cmp r3, #0
|
|
80077fa: d104 bne.n 8007806 <USBD_StdEPReq+0xda>
|
|
{
|
|
USBD_LL_StallEP(pdev, ep_addr);
|
|
80077fc: 7bbb ldrb r3, [r7, #14]
|
|
80077fe: 4619 mov r1, r3
|
|
8007800: 6878 ldr r0, [r7, #4]
|
|
8007802: f001 f867 bl 80088d4 <USBD_LL_StallEP>
|
|
}
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
8007806: 6878 ldr r0, [r7, #4]
|
|
8007808: f000 fcce bl 80081a8 <USBD_CtlSendStatus>
|
|
|
|
break;
|
|
800780c: e004 b.n 8007818 <USBD_StdEPReq+0xec>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
800780e: 6839 ldr r1, [r7, #0]
|
|
8007810: 6878 ldr r0, [r7, #4]
|
|
8007812: f000 fc00 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007816: bf00 nop
|
|
}
|
|
break;
|
|
8007818: e0e0 b.n 80079dc <USBD_StdEPReq+0x2b0>
|
|
|
|
case USB_REQ_CLEAR_FEATURE:
|
|
|
|
switch (pdev->dev_state)
|
|
800781a: 687b ldr r3, [r7, #4]
|
|
800781c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8007820: 2b02 cmp r3, #2
|
|
8007822: d002 beq.n 800782a <USBD_StdEPReq+0xfe>
|
|
8007824: 2b03 cmp r3, #3
|
|
8007826: d015 beq.n 8007854 <USBD_StdEPReq+0x128>
|
|
8007828: e026 b.n 8007878 <USBD_StdEPReq+0x14c>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
|
|
800782a: 7bbb ldrb r3, [r7, #14]
|
|
800782c: 2b00 cmp r3, #0
|
|
800782e: d00c beq.n 800784a <USBD_StdEPReq+0x11e>
|
|
8007830: 7bbb ldrb r3, [r7, #14]
|
|
8007832: 2b80 cmp r3, #128 @ 0x80
|
|
8007834: d009 beq.n 800784a <USBD_StdEPReq+0x11e>
|
|
{
|
|
USBD_LL_StallEP(pdev, ep_addr);
|
|
8007836: 7bbb ldrb r3, [r7, #14]
|
|
8007838: 4619 mov r1, r3
|
|
800783a: 6878 ldr r0, [r7, #4]
|
|
800783c: f001 f84a bl 80088d4 <USBD_LL_StallEP>
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8007840: 2180 movs r1, #128 @ 0x80
|
|
8007842: 6878 ldr r0, [r7, #4]
|
|
8007844: f001 f846 bl 80088d4 <USBD_LL_StallEP>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
}
|
|
break;
|
|
8007848: e01c b.n 8007884 <USBD_StdEPReq+0x158>
|
|
USBD_CtlError(pdev, req);
|
|
800784a: 6839 ldr r1, [r7, #0]
|
|
800784c: 6878 ldr r0, [r7, #4]
|
|
800784e: f000 fbe2 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007852: e017 b.n 8007884 <USBD_StdEPReq+0x158>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wValue == USB_FEATURE_EP_HALT)
|
|
8007854: 683b ldr r3, [r7, #0]
|
|
8007856: 885b ldrh r3, [r3, #2]
|
|
8007858: 2b00 cmp r3, #0
|
|
800785a: d112 bne.n 8007882 <USBD_StdEPReq+0x156>
|
|
{
|
|
if ((ep_addr & 0x7FU) != 0x00U)
|
|
800785c: 7bbb ldrb r3, [r7, #14]
|
|
800785e: f003 037f and.w r3, r3, #127 @ 0x7f
|
|
8007862: 2b00 cmp r3, #0
|
|
8007864: d004 beq.n 8007870 <USBD_StdEPReq+0x144>
|
|
{
|
|
USBD_LL_ClearStallEP(pdev, ep_addr);
|
|
8007866: 7bbb ldrb r3, [r7, #14]
|
|
8007868: 4619 mov r1, r3
|
|
800786a: 6878 ldr r0, [r7, #4]
|
|
800786c: f001 f851 bl 8008912 <USBD_LL_ClearStallEP>
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
8007870: 6878 ldr r0, [r7, #4]
|
|
8007872: f000 fc99 bl 80081a8 <USBD_CtlSendStatus>
|
|
}
|
|
break;
|
|
8007876: e004 b.n 8007882 <USBD_StdEPReq+0x156>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007878: 6839 ldr r1, [r7, #0]
|
|
800787a: 6878 ldr r0, [r7, #4]
|
|
800787c: f000 fbcb bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007880: e000 b.n 8007884 <USBD_StdEPReq+0x158>
|
|
break;
|
|
8007882: bf00 nop
|
|
}
|
|
break;
|
|
8007884: e0aa b.n 80079dc <USBD_StdEPReq+0x2b0>
|
|
|
|
case USB_REQ_GET_STATUS:
|
|
switch (pdev->dev_state)
|
|
8007886: 687b ldr r3, [r7, #4]
|
|
8007888: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
800788c: 2b02 cmp r3, #2
|
|
800788e: d002 beq.n 8007896 <USBD_StdEPReq+0x16a>
|
|
8007890: 2b03 cmp r3, #3
|
|
8007892: d032 beq.n 80078fa <USBD_StdEPReq+0x1ce>
|
|
8007894: e097 b.n 80079c6 <USBD_StdEPReq+0x29a>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
|
|
8007896: 7bbb ldrb r3, [r7, #14]
|
|
8007898: 2b00 cmp r3, #0
|
|
800789a: d007 beq.n 80078ac <USBD_StdEPReq+0x180>
|
|
800789c: 7bbb ldrb r3, [r7, #14]
|
|
800789e: 2b80 cmp r3, #128 @ 0x80
|
|
80078a0: d004 beq.n 80078ac <USBD_StdEPReq+0x180>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
80078a2: 6839 ldr r1, [r7, #0]
|
|
80078a4: 6878 ldr r0, [r7, #4]
|
|
80078a6: f000 fbb6 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
80078aa: e091 b.n 80079d0 <USBD_StdEPReq+0x2a4>
|
|
}
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
80078ac: f997 300e ldrsb.w r3, [r7, #14]
|
|
80078b0: 2b00 cmp r3, #0
|
|
80078b2: da0b bge.n 80078cc <USBD_StdEPReq+0x1a0>
|
|
80078b4: 7bbb ldrb r3, [r7, #14]
|
|
80078b6: f003 027f and.w r2, r3, #127 @ 0x7f
|
|
80078ba: 4613 mov r3, r2
|
|
80078bc: 009b lsls r3, r3, #2
|
|
80078be: 4413 add r3, r2
|
|
80078c0: 009b lsls r3, r3, #2
|
|
80078c2: 3310 adds r3, #16
|
|
80078c4: 687a ldr r2, [r7, #4]
|
|
80078c6: 4413 add r3, r2
|
|
80078c8: 3304 adds r3, #4
|
|
80078ca: e00b b.n 80078e4 <USBD_StdEPReq+0x1b8>
|
|
&pdev->ep_out[ep_addr & 0x7FU];
|
|
80078cc: 7bbb ldrb r3, [r7, #14]
|
|
80078ce: f003 027f and.w r2, r3, #127 @ 0x7f
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
80078d2: 4613 mov r3, r2
|
|
80078d4: 009b lsls r3, r3, #2
|
|
80078d6: 4413 add r3, r2
|
|
80078d8: 009b lsls r3, r3, #2
|
|
80078da: f503 73a8 add.w r3, r3, #336 @ 0x150
|
|
80078de: 687a ldr r2, [r7, #4]
|
|
80078e0: 4413 add r3, r2
|
|
80078e2: 3304 adds r3, #4
|
|
80078e4: 60bb str r3, [r7, #8]
|
|
|
|
pep->status = 0x0000U;
|
|
80078e6: 68bb ldr r3, [r7, #8]
|
|
80078e8: 2200 movs r2, #0
|
|
80078ea: 601a str r2, [r3, #0]
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
|
|
80078ec: 68bb ldr r3, [r7, #8]
|
|
80078ee: 2202 movs r2, #2
|
|
80078f0: 4619 mov r1, r3
|
|
80078f2: 6878 ldr r0, [r7, #4]
|
|
80078f4: f000 fbfa bl 80080ec <USBD_CtlSendData>
|
|
break;
|
|
80078f8: e06a b.n 80079d0 <USBD_StdEPReq+0x2a4>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if ((ep_addr & 0x80U) == 0x80U)
|
|
80078fa: f997 300e ldrsb.w r3, [r7, #14]
|
|
80078fe: 2b00 cmp r3, #0
|
|
8007900: da11 bge.n 8007926 <USBD_StdEPReq+0x1fa>
|
|
{
|
|
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
|
|
8007902: 7bbb ldrb r3, [r7, #14]
|
|
8007904: f003 020f and.w r2, r3, #15
|
|
8007908: 6879 ldr r1, [r7, #4]
|
|
800790a: 4613 mov r3, r2
|
|
800790c: 009b lsls r3, r3, #2
|
|
800790e: 4413 add r3, r2
|
|
8007910: 009b lsls r3, r3, #2
|
|
8007912: 440b add r3, r1
|
|
8007914: 3318 adds r3, #24
|
|
8007916: 681b ldr r3, [r3, #0]
|
|
8007918: 2b00 cmp r3, #0
|
|
800791a: d117 bne.n 800794c <USBD_StdEPReq+0x220>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
800791c: 6839 ldr r1, [r7, #0]
|
|
800791e: 6878 ldr r0, [r7, #4]
|
|
8007920: f000 fb79 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007924: e054 b.n 80079d0 <USBD_StdEPReq+0x2a4>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
|
|
8007926: 7bbb ldrb r3, [r7, #14]
|
|
8007928: f003 020f and.w r2, r3, #15
|
|
800792c: 6879 ldr r1, [r7, #4]
|
|
800792e: 4613 mov r3, r2
|
|
8007930: 009b lsls r3, r3, #2
|
|
8007932: 4413 add r3, r2
|
|
8007934: 009b lsls r3, r3, #2
|
|
8007936: 440b add r3, r1
|
|
8007938: f503 73ac add.w r3, r3, #344 @ 0x158
|
|
800793c: 681b ldr r3, [r3, #0]
|
|
800793e: 2b00 cmp r3, #0
|
|
8007940: d104 bne.n 800794c <USBD_StdEPReq+0x220>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007942: 6839 ldr r1, [r7, #0]
|
|
8007944: 6878 ldr r0, [r7, #4]
|
|
8007946: f000 fb66 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
800794a: e041 b.n 80079d0 <USBD_StdEPReq+0x2a4>
|
|
}
|
|
}
|
|
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
800794c: f997 300e ldrsb.w r3, [r7, #14]
|
|
8007950: 2b00 cmp r3, #0
|
|
8007952: da0b bge.n 800796c <USBD_StdEPReq+0x240>
|
|
8007954: 7bbb ldrb r3, [r7, #14]
|
|
8007956: f003 027f and.w r2, r3, #127 @ 0x7f
|
|
800795a: 4613 mov r3, r2
|
|
800795c: 009b lsls r3, r3, #2
|
|
800795e: 4413 add r3, r2
|
|
8007960: 009b lsls r3, r3, #2
|
|
8007962: 3310 adds r3, #16
|
|
8007964: 687a ldr r2, [r7, #4]
|
|
8007966: 4413 add r3, r2
|
|
8007968: 3304 adds r3, #4
|
|
800796a: e00b b.n 8007984 <USBD_StdEPReq+0x258>
|
|
&pdev->ep_out[ep_addr & 0x7FU];
|
|
800796c: 7bbb ldrb r3, [r7, #14]
|
|
800796e: f003 027f and.w r2, r3, #127 @ 0x7f
|
|
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
|
|
8007972: 4613 mov r3, r2
|
|
8007974: 009b lsls r3, r3, #2
|
|
8007976: 4413 add r3, r2
|
|
8007978: 009b lsls r3, r3, #2
|
|
800797a: f503 73a8 add.w r3, r3, #336 @ 0x150
|
|
800797e: 687a ldr r2, [r7, #4]
|
|
8007980: 4413 add r3, r2
|
|
8007982: 3304 adds r3, #4
|
|
8007984: 60bb str r3, [r7, #8]
|
|
|
|
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
|
|
8007986: 7bbb ldrb r3, [r7, #14]
|
|
8007988: 2b00 cmp r3, #0
|
|
800798a: d002 beq.n 8007992 <USBD_StdEPReq+0x266>
|
|
800798c: 7bbb ldrb r3, [r7, #14]
|
|
800798e: 2b80 cmp r3, #128 @ 0x80
|
|
8007990: d103 bne.n 800799a <USBD_StdEPReq+0x26e>
|
|
{
|
|
pep->status = 0x0000U;
|
|
8007992: 68bb ldr r3, [r7, #8]
|
|
8007994: 2200 movs r2, #0
|
|
8007996: 601a str r2, [r3, #0]
|
|
8007998: e00e b.n 80079b8 <USBD_StdEPReq+0x28c>
|
|
}
|
|
else if (USBD_LL_IsStallEP(pdev, ep_addr))
|
|
800799a: 7bbb ldrb r3, [r7, #14]
|
|
800799c: 4619 mov r1, r3
|
|
800799e: 6878 ldr r0, [r7, #4]
|
|
80079a0: f000 ffd6 bl 8008950 <USBD_LL_IsStallEP>
|
|
80079a4: 4603 mov r3, r0
|
|
80079a6: 2b00 cmp r3, #0
|
|
80079a8: d003 beq.n 80079b2 <USBD_StdEPReq+0x286>
|
|
{
|
|
pep->status = 0x0001U;
|
|
80079aa: 68bb ldr r3, [r7, #8]
|
|
80079ac: 2201 movs r2, #1
|
|
80079ae: 601a str r2, [r3, #0]
|
|
80079b0: e002 b.n 80079b8 <USBD_StdEPReq+0x28c>
|
|
}
|
|
else
|
|
{
|
|
pep->status = 0x0000U;
|
|
80079b2: 68bb ldr r3, [r7, #8]
|
|
80079b4: 2200 movs r2, #0
|
|
80079b6: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
|
|
80079b8: 68bb ldr r3, [r7, #8]
|
|
80079ba: 2202 movs r2, #2
|
|
80079bc: 4619 mov r1, r3
|
|
80079be: 6878 ldr r0, [r7, #4]
|
|
80079c0: f000 fb94 bl 80080ec <USBD_CtlSendData>
|
|
break;
|
|
80079c4: e004 b.n 80079d0 <USBD_StdEPReq+0x2a4>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80079c6: 6839 ldr r1, [r7, #0]
|
|
80079c8: 6878 ldr r0, [r7, #4]
|
|
80079ca: f000 fb24 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
80079ce: bf00 nop
|
|
}
|
|
break;
|
|
80079d0: e004 b.n 80079dc <USBD_StdEPReq+0x2b0>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80079d2: 6839 ldr r1, [r7, #0]
|
|
80079d4: 6878 ldr r0, [r7, #4]
|
|
80079d6: f000 fb1e bl 8008016 <USBD_CtlError>
|
|
break;
|
|
80079da: bf00 nop
|
|
}
|
|
break;
|
|
80079dc: e004 b.n 80079e8 <USBD_StdEPReq+0x2bc>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
80079de: 6839 ldr r1, [r7, #0]
|
|
80079e0: 6878 ldr r0, [r7, #4]
|
|
80079e2: f000 fb18 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
80079e6: bf00 nop
|
|
}
|
|
|
|
return ret;
|
|
80079e8: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80079ea: 4618 mov r0, r3
|
|
80079ec: 3710 adds r7, #16
|
|
80079ee: 46bd mov sp, r7
|
|
80079f0: bd80 pop {r7, pc}
|
|
...
|
|
|
|
080079f4 <USBD_GetDescriptor>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
80079f4: b580 push {r7, lr}
|
|
80079f6: b084 sub sp, #16
|
|
80079f8: af00 add r7, sp, #0
|
|
80079fa: 6078 str r0, [r7, #4]
|
|
80079fc: 6039 str r1, [r7, #0]
|
|
uint16_t len = 0U;
|
|
80079fe: 2300 movs r3, #0
|
|
8007a00: 813b strh r3, [r7, #8]
|
|
uint8_t *pbuf = NULL;
|
|
8007a02: 2300 movs r3, #0
|
|
8007a04: 60fb str r3, [r7, #12]
|
|
uint8_t err = 0U;
|
|
8007a06: 2300 movs r3, #0
|
|
8007a08: 72fb strb r3, [r7, #11]
|
|
|
|
switch (req->wValue >> 8)
|
|
8007a0a: 683b ldr r3, [r7, #0]
|
|
8007a0c: 885b ldrh r3, [r3, #2]
|
|
8007a0e: 0a1b lsrs r3, r3, #8
|
|
8007a10: b29b uxth r3, r3
|
|
8007a12: 3b01 subs r3, #1
|
|
8007a14: 2b06 cmp r3, #6
|
|
8007a16: f200 8128 bhi.w 8007c6a <USBD_GetDescriptor+0x276>
|
|
8007a1a: a201 add r2, pc, #4 @ (adr r2, 8007a20 <USBD_GetDescriptor+0x2c>)
|
|
8007a1c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8007a20: 08007a3d .word 0x08007a3d
|
|
8007a24: 08007a55 .word 0x08007a55
|
|
8007a28: 08007a95 .word 0x08007a95
|
|
8007a2c: 08007c6b .word 0x08007c6b
|
|
8007a30: 08007c6b .word 0x08007c6b
|
|
8007a34: 08007c0b .word 0x08007c0b
|
|
8007a38: 08007c37 .word 0x08007c37
|
|
err++;
|
|
}
|
|
break;
|
|
#endif
|
|
case USB_DESC_TYPE_DEVICE:
|
|
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
|
|
8007a3c: 687b ldr r3, [r7, #4]
|
|
8007a3e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007a42: 681b ldr r3, [r3, #0]
|
|
8007a44: 687a ldr r2, [r7, #4]
|
|
8007a46: 7c12 ldrb r2, [r2, #16]
|
|
8007a48: f107 0108 add.w r1, r7, #8
|
|
8007a4c: 4610 mov r0, r2
|
|
8007a4e: 4798 blx r3
|
|
8007a50: 60f8 str r0, [r7, #12]
|
|
break;
|
|
8007a52: e112 b.n 8007c7a <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_CONFIGURATION:
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8007a54: 687b ldr r3, [r7, #4]
|
|
8007a56: 7c1b ldrb r3, [r3, #16]
|
|
8007a58: 2b00 cmp r3, #0
|
|
8007a5a: d10d bne.n 8007a78 <USBD_GetDescriptor+0x84>
|
|
{
|
|
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
|
|
8007a5c: 687b ldr r3, [r7, #4]
|
|
8007a5e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007a62: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
8007a64: f107 0208 add.w r2, r7, #8
|
|
8007a68: 4610 mov r0, r2
|
|
8007a6a: 4798 blx r3
|
|
8007a6c: 60f8 str r0, [r7, #12]
|
|
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
|
|
8007a6e: 68fb ldr r3, [r7, #12]
|
|
8007a70: 3301 adds r3, #1
|
|
8007a72: 2202 movs r2, #2
|
|
8007a74: 701a strb r2, [r3, #0]
|
|
else
|
|
{
|
|
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
|
|
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
|
|
}
|
|
break;
|
|
8007a76: e100 b.n 8007c7a <USBD_GetDescriptor+0x286>
|
|
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
|
|
8007a78: 687b ldr r3, [r7, #4]
|
|
8007a7a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007a7e: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8007a80: f107 0208 add.w r2, r7, #8
|
|
8007a84: 4610 mov r0, r2
|
|
8007a86: 4798 blx r3
|
|
8007a88: 60f8 str r0, [r7, #12]
|
|
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
|
|
8007a8a: 68fb ldr r3, [r7, #12]
|
|
8007a8c: 3301 adds r3, #1
|
|
8007a8e: 2202 movs r2, #2
|
|
8007a90: 701a strb r2, [r3, #0]
|
|
break;
|
|
8007a92: e0f2 b.n 8007c7a <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_STRING:
|
|
switch ((uint8_t)(req->wValue))
|
|
8007a94: 683b ldr r3, [r7, #0]
|
|
8007a96: 885b ldrh r3, [r3, #2]
|
|
8007a98: b2db uxtb r3, r3
|
|
8007a9a: 2b05 cmp r3, #5
|
|
8007a9c: f200 80ac bhi.w 8007bf8 <USBD_GetDescriptor+0x204>
|
|
8007aa0: a201 add r2, pc, #4 @ (adr r2, 8007aa8 <USBD_GetDescriptor+0xb4>)
|
|
8007aa2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8007aa6: bf00 nop
|
|
8007aa8: 08007ac1 .word 0x08007ac1
|
|
8007aac: 08007af5 .word 0x08007af5
|
|
8007ab0: 08007b29 .word 0x08007b29
|
|
8007ab4: 08007b5d .word 0x08007b5d
|
|
8007ab8: 08007b91 .word 0x08007b91
|
|
8007abc: 08007bc5 .word 0x08007bc5
|
|
{
|
|
case USBD_IDX_LANGID_STR:
|
|
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
|
|
8007ac0: 687b ldr r3, [r7, #4]
|
|
8007ac2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007ac6: 685b ldr r3, [r3, #4]
|
|
8007ac8: 2b00 cmp r3, #0
|
|
8007aca: d00b beq.n 8007ae4 <USBD_GetDescriptor+0xf0>
|
|
{
|
|
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
|
|
8007acc: 687b ldr r3, [r7, #4]
|
|
8007ace: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007ad2: 685b ldr r3, [r3, #4]
|
|
8007ad4: 687a ldr r2, [r7, #4]
|
|
8007ad6: 7c12 ldrb r2, [r2, #16]
|
|
8007ad8: f107 0108 add.w r1, r7, #8
|
|
8007adc: 4610 mov r0, r2
|
|
8007ade: 4798 blx r3
|
|
8007ae0: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8007ae2: e091 b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8007ae4: 6839 ldr r1, [r7, #0]
|
|
8007ae6: 6878 ldr r0, [r7, #4]
|
|
8007ae8: f000 fa95 bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007aec: 7afb ldrb r3, [r7, #11]
|
|
8007aee: 3301 adds r3, #1
|
|
8007af0: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8007af2: e089 b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_MFC_STR:
|
|
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
|
|
8007af4: 687b ldr r3, [r7, #4]
|
|
8007af6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007afa: 689b ldr r3, [r3, #8]
|
|
8007afc: 2b00 cmp r3, #0
|
|
8007afe: d00b beq.n 8007b18 <USBD_GetDescriptor+0x124>
|
|
{
|
|
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
|
|
8007b00: 687b ldr r3, [r7, #4]
|
|
8007b02: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007b06: 689b ldr r3, [r3, #8]
|
|
8007b08: 687a ldr r2, [r7, #4]
|
|
8007b0a: 7c12 ldrb r2, [r2, #16]
|
|
8007b0c: f107 0108 add.w r1, r7, #8
|
|
8007b10: 4610 mov r0, r2
|
|
8007b12: 4798 blx r3
|
|
8007b14: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8007b16: e077 b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8007b18: 6839 ldr r1, [r7, #0]
|
|
8007b1a: 6878 ldr r0, [r7, #4]
|
|
8007b1c: f000 fa7b bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007b20: 7afb ldrb r3, [r7, #11]
|
|
8007b22: 3301 adds r3, #1
|
|
8007b24: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8007b26: e06f b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_PRODUCT_STR:
|
|
if (pdev->pDesc->GetProductStrDescriptor != NULL)
|
|
8007b28: 687b ldr r3, [r7, #4]
|
|
8007b2a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007b2e: 68db ldr r3, [r3, #12]
|
|
8007b30: 2b00 cmp r3, #0
|
|
8007b32: d00b beq.n 8007b4c <USBD_GetDescriptor+0x158>
|
|
{
|
|
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
|
|
8007b34: 687b ldr r3, [r7, #4]
|
|
8007b36: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007b3a: 68db ldr r3, [r3, #12]
|
|
8007b3c: 687a ldr r2, [r7, #4]
|
|
8007b3e: 7c12 ldrb r2, [r2, #16]
|
|
8007b40: f107 0108 add.w r1, r7, #8
|
|
8007b44: 4610 mov r0, r2
|
|
8007b46: 4798 blx r3
|
|
8007b48: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8007b4a: e05d b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8007b4c: 6839 ldr r1, [r7, #0]
|
|
8007b4e: 6878 ldr r0, [r7, #4]
|
|
8007b50: f000 fa61 bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007b54: 7afb ldrb r3, [r7, #11]
|
|
8007b56: 3301 adds r3, #1
|
|
8007b58: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8007b5a: e055 b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_SERIAL_STR:
|
|
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
|
|
8007b5c: 687b ldr r3, [r7, #4]
|
|
8007b5e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007b62: 691b ldr r3, [r3, #16]
|
|
8007b64: 2b00 cmp r3, #0
|
|
8007b66: d00b beq.n 8007b80 <USBD_GetDescriptor+0x18c>
|
|
{
|
|
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
|
|
8007b68: 687b ldr r3, [r7, #4]
|
|
8007b6a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007b6e: 691b ldr r3, [r3, #16]
|
|
8007b70: 687a ldr r2, [r7, #4]
|
|
8007b72: 7c12 ldrb r2, [r2, #16]
|
|
8007b74: f107 0108 add.w r1, r7, #8
|
|
8007b78: 4610 mov r0, r2
|
|
8007b7a: 4798 blx r3
|
|
8007b7c: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8007b7e: e043 b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8007b80: 6839 ldr r1, [r7, #0]
|
|
8007b82: 6878 ldr r0, [r7, #4]
|
|
8007b84: f000 fa47 bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007b88: 7afb ldrb r3, [r7, #11]
|
|
8007b8a: 3301 adds r3, #1
|
|
8007b8c: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8007b8e: e03b b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_CONFIG_STR:
|
|
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
|
|
8007b90: 687b ldr r3, [r7, #4]
|
|
8007b92: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007b96: 695b ldr r3, [r3, #20]
|
|
8007b98: 2b00 cmp r3, #0
|
|
8007b9a: d00b beq.n 8007bb4 <USBD_GetDescriptor+0x1c0>
|
|
{
|
|
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
|
|
8007b9c: 687b ldr r3, [r7, #4]
|
|
8007b9e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007ba2: 695b ldr r3, [r3, #20]
|
|
8007ba4: 687a ldr r2, [r7, #4]
|
|
8007ba6: 7c12 ldrb r2, [r2, #16]
|
|
8007ba8: f107 0108 add.w r1, r7, #8
|
|
8007bac: 4610 mov r0, r2
|
|
8007bae: 4798 blx r3
|
|
8007bb0: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8007bb2: e029 b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8007bb4: 6839 ldr r1, [r7, #0]
|
|
8007bb6: 6878 ldr r0, [r7, #4]
|
|
8007bb8: f000 fa2d bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007bbc: 7afb ldrb r3, [r7, #11]
|
|
8007bbe: 3301 adds r3, #1
|
|
8007bc0: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8007bc2: e021 b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
|
|
case USBD_IDX_INTERFACE_STR:
|
|
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
|
|
8007bc4: 687b ldr r3, [r7, #4]
|
|
8007bc6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007bca: 699b ldr r3, [r3, #24]
|
|
8007bcc: 2b00 cmp r3, #0
|
|
8007bce: d00b beq.n 8007be8 <USBD_GetDescriptor+0x1f4>
|
|
{
|
|
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
|
|
8007bd0: 687b ldr r3, [r7, #4]
|
|
8007bd2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
|
|
8007bd6: 699b ldr r3, [r3, #24]
|
|
8007bd8: 687a ldr r2, [r7, #4]
|
|
8007bda: 7c12 ldrb r2, [r2, #16]
|
|
8007bdc: f107 0108 add.w r1, r7, #8
|
|
8007be0: 4610 mov r0, r2
|
|
8007be2: 4798 blx r3
|
|
8007be4: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8007be6: e00f b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
8007be8: 6839 ldr r1, [r7, #0]
|
|
8007bea: 6878 ldr r0, [r7, #4]
|
|
8007bec: f000 fa13 bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007bf0: 7afb ldrb r3, [r7, #11]
|
|
8007bf2: 3301 adds r3, #1
|
|
8007bf4: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8007bf6: e007 b.n 8007c08 <USBD_GetDescriptor+0x214>
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
#else
|
|
USBD_CtlError(pdev, req);
|
|
8007bf8: 6839 ldr r1, [r7, #0]
|
|
8007bfa: 6878 ldr r0, [r7, #4]
|
|
8007bfc: f000 fa0b bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007c00: 7afb ldrb r3, [r7, #11]
|
|
8007c02: 3301 adds r3, #1
|
|
8007c04: 72fb strb r3, [r7, #11]
|
|
#endif
|
|
}
|
|
break;
|
|
8007c06: e038 b.n 8007c7a <USBD_GetDescriptor+0x286>
|
|
8007c08: e037 b.n 8007c7a <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_DEVICE_QUALIFIER:
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8007c0a: 687b ldr r3, [r7, #4]
|
|
8007c0c: 7c1b ldrb r3, [r3, #16]
|
|
8007c0e: 2b00 cmp r3, #0
|
|
8007c10: d109 bne.n 8007c26 <USBD_GetDescriptor+0x232>
|
|
{
|
|
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
|
|
8007c12: 687b ldr r3, [r7, #4]
|
|
8007c14: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007c18: 6b5b ldr r3, [r3, #52] @ 0x34
|
|
8007c1a: f107 0208 add.w r2, r7, #8
|
|
8007c1e: 4610 mov r0, r2
|
|
8007c20: 4798 blx r3
|
|
8007c22: 60f8 str r0, [r7, #12]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8007c24: e029 b.n 8007c7a <USBD_GetDescriptor+0x286>
|
|
USBD_CtlError(pdev, req);
|
|
8007c26: 6839 ldr r1, [r7, #0]
|
|
8007c28: 6878 ldr r0, [r7, #4]
|
|
8007c2a: f000 f9f4 bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007c2e: 7afb ldrb r3, [r7, #11]
|
|
8007c30: 3301 adds r3, #1
|
|
8007c32: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8007c34: e021 b.n 8007c7a <USBD_GetDescriptor+0x286>
|
|
|
|
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
|
|
if (pdev->dev_speed == USBD_SPEED_HIGH)
|
|
8007c36: 687b ldr r3, [r7, #4]
|
|
8007c38: 7c1b ldrb r3, [r3, #16]
|
|
8007c3a: 2b00 cmp r3, #0
|
|
8007c3c: d10d bne.n 8007c5a <USBD_GetDescriptor+0x266>
|
|
{
|
|
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
|
|
8007c3e: 687b ldr r3, [r7, #4]
|
|
8007c40: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
|
|
8007c44: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8007c46: f107 0208 add.w r2, r7, #8
|
|
8007c4a: 4610 mov r0, r2
|
|
8007c4c: 4798 blx r3
|
|
8007c4e: 60f8 str r0, [r7, #12]
|
|
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
|
|
8007c50: 68fb ldr r3, [r7, #12]
|
|
8007c52: 3301 adds r3, #1
|
|
8007c54: 2207 movs r2, #7
|
|
8007c56: 701a strb r2, [r3, #0]
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
err++;
|
|
}
|
|
break;
|
|
8007c58: e00f b.n 8007c7a <USBD_GetDescriptor+0x286>
|
|
USBD_CtlError(pdev, req);
|
|
8007c5a: 6839 ldr r1, [r7, #0]
|
|
8007c5c: 6878 ldr r0, [r7, #4]
|
|
8007c5e: f000 f9da bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007c62: 7afb ldrb r3, [r7, #11]
|
|
8007c64: 3301 adds r3, #1
|
|
8007c66: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8007c68: e007 b.n 8007c7a <USBD_GetDescriptor+0x286>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007c6a: 6839 ldr r1, [r7, #0]
|
|
8007c6c: 6878 ldr r0, [r7, #4]
|
|
8007c6e: f000 f9d2 bl 8008016 <USBD_CtlError>
|
|
err++;
|
|
8007c72: 7afb ldrb r3, [r7, #11]
|
|
8007c74: 3301 adds r3, #1
|
|
8007c76: 72fb strb r3, [r7, #11]
|
|
break;
|
|
8007c78: bf00 nop
|
|
}
|
|
|
|
if (err != 0U)
|
|
8007c7a: 7afb ldrb r3, [r7, #11]
|
|
8007c7c: 2b00 cmp r3, #0
|
|
8007c7e: d11c bne.n 8007cba <USBD_GetDescriptor+0x2c6>
|
|
{
|
|
return;
|
|
}
|
|
else
|
|
{
|
|
if ((len != 0U) && (req->wLength != 0U))
|
|
8007c80: 893b ldrh r3, [r7, #8]
|
|
8007c82: 2b00 cmp r3, #0
|
|
8007c84: d011 beq.n 8007caa <USBD_GetDescriptor+0x2b6>
|
|
8007c86: 683b ldr r3, [r7, #0]
|
|
8007c88: 88db ldrh r3, [r3, #6]
|
|
8007c8a: 2b00 cmp r3, #0
|
|
8007c8c: d00d beq.n 8007caa <USBD_GetDescriptor+0x2b6>
|
|
{
|
|
len = MIN(len, req->wLength);
|
|
8007c8e: 683b ldr r3, [r7, #0]
|
|
8007c90: 88da ldrh r2, [r3, #6]
|
|
8007c92: 893b ldrh r3, [r7, #8]
|
|
8007c94: 4293 cmp r3, r2
|
|
8007c96: bf28 it cs
|
|
8007c98: 4613 movcs r3, r2
|
|
8007c9a: b29b uxth r3, r3
|
|
8007c9c: 813b strh r3, [r7, #8]
|
|
(void)USBD_CtlSendData(pdev, pbuf, len);
|
|
8007c9e: 893b ldrh r3, [r7, #8]
|
|
8007ca0: 461a mov r2, r3
|
|
8007ca2: 68f9 ldr r1, [r7, #12]
|
|
8007ca4: 6878 ldr r0, [r7, #4]
|
|
8007ca6: f000 fa21 bl 80080ec <USBD_CtlSendData>
|
|
}
|
|
|
|
if (req->wLength == 0U)
|
|
8007caa: 683b ldr r3, [r7, #0]
|
|
8007cac: 88db ldrh r3, [r3, #6]
|
|
8007cae: 2b00 cmp r3, #0
|
|
8007cb0: d104 bne.n 8007cbc <USBD_GetDescriptor+0x2c8>
|
|
{
|
|
(void)USBD_CtlSendStatus(pdev);
|
|
8007cb2: 6878 ldr r0, [r7, #4]
|
|
8007cb4: f000 fa78 bl 80081a8 <USBD_CtlSendStatus>
|
|
8007cb8: e000 b.n 8007cbc <USBD_GetDescriptor+0x2c8>
|
|
return;
|
|
8007cba: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
8007cbc: 3710 adds r7, #16
|
|
8007cbe: 46bd mov sp, r7
|
|
8007cc0: bd80 pop {r7, pc}
|
|
8007cc2: bf00 nop
|
|
|
|
08007cc4 <USBD_SetAddress>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8007cc4: b580 push {r7, lr}
|
|
8007cc6: b084 sub sp, #16
|
|
8007cc8: af00 add r7, sp, #0
|
|
8007cca: 6078 str r0, [r7, #4]
|
|
8007ccc: 6039 str r1, [r7, #0]
|
|
uint8_t dev_addr;
|
|
|
|
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
|
|
8007cce: 683b ldr r3, [r7, #0]
|
|
8007cd0: 889b ldrh r3, [r3, #4]
|
|
8007cd2: 2b00 cmp r3, #0
|
|
8007cd4: d130 bne.n 8007d38 <USBD_SetAddress+0x74>
|
|
8007cd6: 683b ldr r3, [r7, #0]
|
|
8007cd8: 88db ldrh r3, [r3, #6]
|
|
8007cda: 2b00 cmp r3, #0
|
|
8007cdc: d12c bne.n 8007d38 <USBD_SetAddress+0x74>
|
|
8007cde: 683b ldr r3, [r7, #0]
|
|
8007ce0: 885b ldrh r3, [r3, #2]
|
|
8007ce2: 2b7f cmp r3, #127 @ 0x7f
|
|
8007ce4: d828 bhi.n 8007d38 <USBD_SetAddress+0x74>
|
|
{
|
|
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
|
|
8007ce6: 683b ldr r3, [r7, #0]
|
|
8007ce8: 885b ldrh r3, [r3, #2]
|
|
8007cea: b2db uxtb r3, r3
|
|
8007cec: f003 037f and.w r3, r3, #127 @ 0x7f
|
|
8007cf0: 73fb strb r3, [r7, #15]
|
|
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8007cf2: 687b ldr r3, [r7, #4]
|
|
8007cf4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8007cf8: 2b03 cmp r3, #3
|
|
8007cfa: d104 bne.n 8007d06 <USBD_SetAddress+0x42>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007cfc: 6839 ldr r1, [r7, #0]
|
|
8007cfe: 6878 ldr r0, [r7, #4]
|
|
8007d00: f000 f989 bl 8008016 <USBD_CtlError>
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8007d04: e01d b.n 8007d42 <USBD_SetAddress+0x7e>
|
|
}
|
|
else
|
|
{
|
|
pdev->dev_address = dev_addr;
|
|
8007d06: 687b ldr r3, [r7, #4]
|
|
8007d08: 7bfa ldrb r2, [r7, #15]
|
|
8007d0a: f883 229e strb.w r2, [r3, #670] @ 0x29e
|
|
USBD_LL_SetUSBAddress(pdev, dev_addr);
|
|
8007d0e: 7bfb ldrb r3, [r7, #15]
|
|
8007d10: 4619 mov r1, r3
|
|
8007d12: 6878 ldr r0, [r7, #4]
|
|
8007d14: f000 fe49 bl 80089aa <USBD_LL_SetUSBAddress>
|
|
USBD_CtlSendStatus(pdev);
|
|
8007d18: 6878 ldr r0, [r7, #4]
|
|
8007d1a: f000 fa45 bl 80081a8 <USBD_CtlSendStatus>
|
|
|
|
if (dev_addr != 0U)
|
|
8007d1e: 7bfb ldrb r3, [r7, #15]
|
|
8007d20: 2b00 cmp r3, #0
|
|
8007d22: d004 beq.n 8007d2e <USBD_SetAddress+0x6a>
|
|
{
|
|
pdev->dev_state = USBD_STATE_ADDRESSED;
|
|
8007d24: 687b ldr r3, [r7, #4]
|
|
8007d26: 2202 movs r2, #2
|
|
8007d28: f883 229c strb.w r2, [r3, #668] @ 0x29c
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8007d2c: e009 b.n 8007d42 <USBD_SetAddress+0x7e>
|
|
}
|
|
else
|
|
{
|
|
pdev->dev_state = USBD_STATE_DEFAULT;
|
|
8007d2e: 687b ldr r3, [r7, #4]
|
|
8007d30: 2201 movs r2, #1
|
|
8007d32: f883 229c strb.w r2, [r3, #668] @ 0x29c
|
|
if (pdev->dev_state == USBD_STATE_CONFIGURED)
|
|
8007d36: e004 b.n 8007d42 <USBD_SetAddress+0x7e>
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007d38: 6839 ldr r1, [r7, #0]
|
|
8007d3a: 6878 ldr r0, [r7, #4]
|
|
8007d3c: f000 f96b bl 8008016 <USBD_CtlError>
|
|
}
|
|
}
|
|
8007d40: bf00 nop
|
|
8007d42: bf00 nop
|
|
8007d44: 3710 adds r7, #16
|
|
8007d46: 46bd mov sp, r7
|
|
8007d48: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08007d4c <USBD_SetConfig>:
|
|
* @param pdev: device instance
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
8007d4c: b580 push {r7, lr}
|
|
8007d4e: b082 sub sp, #8
|
|
8007d50: af00 add r7, sp, #0
|
|
8007d52: 6078 str r0, [r7, #4]
|
|
8007d54: 6039 str r1, [r7, #0]
|
|
static uint8_t cfgidx;
|
|
|
|
cfgidx = (uint8_t)(req->wValue);
|
|
8007d56: 683b ldr r3, [r7, #0]
|
|
8007d58: 885b ldrh r3, [r3, #2]
|
|
8007d5a: b2da uxtb r2, r3
|
|
8007d5c: 4b41 ldr r3, [pc, #260] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007d5e: 701a strb r2, [r3, #0]
|
|
|
|
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
|
|
8007d60: 4b40 ldr r3, [pc, #256] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007d62: 781b ldrb r3, [r3, #0]
|
|
8007d64: 2b01 cmp r3, #1
|
|
8007d66: d904 bls.n 8007d72 <USBD_SetConfig+0x26>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007d68: 6839 ldr r1, [r7, #0]
|
|
8007d6a: 6878 ldr r0, [r7, #4]
|
|
8007d6c: f000 f953 bl 8008016 <USBD_CtlError>
|
|
8007d70: e075 b.n 8007e5e <USBD_SetConfig+0x112>
|
|
}
|
|
else
|
|
{
|
|
switch (pdev->dev_state)
|
|
8007d72: 687b ldr r3, [r7, #4]
|
|
8007d74: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8007d78: 2b02 cmp r3, #2
|
|
8007d7a: d002 beq.n 8007d82 <USBD_SetConfig+0x36>
|
|
8007d7c: 2b03 cmp r3, #3
|
|
8007d7e: d023 beq.n 8007dc8 <USBD_SetConfig+0x7c>
|
|
8007d80: e062 b.n 8007e48 <USBD_SetConfig+0xfc>
|
|
{
|
|
case USBD_STATE_ADDRESSED:
|
|
if (cfgidx)
|
|
8007d82: 4b38 ldr r3, [pc, #224] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007d84: 781b ldrb r3, [r3, #0]
|
|
8007d86: 2b00 cmp r3, #0
|
|
8007d88: d01a beq.n 8007dc0 <USBD_SetConfig+0x74>
|
|
{
|
|
pdev->dev_config = cfgidx;
|
|
8007d8a: 4b36 ldr r3, [pc, #216] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007d8c: 781b ldrb r3, [r3, #0]
|
|
8007d8e: 461a mov r2, r3
|
|
8007d90: 687b ldr r3, [r7, #4]
|
|
8007d92: 605a str r2, [r3, #4]
|
|
pdev->dev_state = USBD_STATE_CONFIGURED;
|
|
8007d94: 687b ldr r3, [r7, #4]
|
|
8007d96: 2203 movs r2, #3
|
|
8007d98: f883 229c strb.w r2, [r3, #668] @ 0x29c
|
|
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
|
|
8007d9c: 4b31 ldr r3, [pc, #196] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007d9e: 781b ldrb r3, [r3, #0]
|
|
8007da0: 4619 mov r1, r3
|
|
8007da2: 6878 ldr r0, [r7, #4]
|
|
8007da4: f7ff f9e4 bl 8007170 <USBD_SetClassConfig>
|
|
8007da8: 4603 mov r3, r0
|
|
8007daa: 2b02 cmp r3, #2
|
|
8007dac: d104 bne.n 8007db8 <USBD_SetConfig+0x6c>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007dae: 6839 ldr r1, [r7, #0]
|
|
8007db0: 6878 ldr r0, [r7, #4]
|
|
8007db2: f000 f930 bl 8008016 <USBD_CtlError>
|
|
return;
|
|
8007db6: e052 b.n 8007e5e <USBD_SetConfig+0x112>
|
|
}
|
|
USBD_CtlSendStatus(pdev);
|
|
8007db8: 6878 ldr r0, [r7, #4]
|
|
8007dba: f000 f9f5 bl 80081a8 <USBD_CtlSendStatus>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlSendStatus(pdev);
|
|
}
|
|
break;
|
|
8007dbe: e04e b.n 8007e5e <USBD_SetConfig+0x112>
|
|
USBD_CtlSendStatus(pdev);
|
|
8007dc0: 6878 ldr r0, [r7, #4]
|
|
8007dc2: f000 f9f1 bl 80081a8 <USBD_CtlSendStatus>
|
|
break;
|
|
8007dc6: e04a b.n 8007e5e <USBD_SetConfig+0x112>
|
|
|
|
case USBD_STATE_CONFIGURED:
|
|
if (cfgidx == 0U)
|
|
8007dc8: 4b26 ldr r3, [pc, #152] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007dca: 781b ldrb r3, [r3, #0]
|
|
8007dcc: 2b00 cmp r3, #0
|
|
8007dce: d112 bne.n 8007df6 <USBD_SetConfig+0xaa>
|
|
{
|
|
pdev->dev_state = USBD_STATE_ADDRESSED;
|
|
8007dd0: 687b ldr r3, [r7, #4]
|
|
8007dd2: 2202 movs r2, #2
|
|
8007dd4: f883 229c strb.w r2, [r3, #668] @ 0x29c
|
|
pdev->dev_config = cfgidx;
|
|
8007dd8: 4b22 ldr r3, [pc, #136] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007dda: 781b ldrb r3, [r3, #0]
|
|
8007ddc: 461a mov r2, r3
|
|
8007dde: 687b ldr r3, [r7, #4]
|
|
8007de0: 605a str r2, [r3, #4]
|
|
USBD_ClrClassConfig(pdev, cfgidx);
|
|
8007de2: 4b20 ldr r3, [pc, #128] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007de4: 781b ldrb r3, [r3, #0]
|
|
8007de6: 4619 mov r1, r3
|
|
8007de8: 6878 ldr r0, [r7, #4]
|
|
8007dea: f7ff f9e0 bl 80071ae <USBD_ClrClassConfig>
|
|
USBD_CtlSendStatus(pdev);
|
|
8007dee: 6878 ldr r0, [r7, #4]
|
|
8007df0: f000 f9da bl 80081a8 <USBD_CtlSendStatus>
|
|
}
|
|
else
|
|
{
|
|
USBD_CtlSendStatus(pdev);
|
|
}
|
|
break;
|
|
8007df4: e033 b.n 8007e5e <USBD_SetConfig+0x112>
|
|
else if (cfgidx != pdev->dev_config)
|
|
8007df6: 4b1b ldr r3, [pc, #108] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007df8: 781b ldrb r3, [r3, #0]
|
|
8007dfa: 461a mov r2, r3
|
|
8007dfc: 687b ldr r3, [r7, #4]
|
|
8007dfe: 685b ldr r3, [r3, #4]
|
|
8007e00: 429a cmp r2, r3
|
|
8007e02: d01d beq.n 8007e40 <USBD_SetConfig+0xf4>
|
|
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
|
|
8007e04: 687b ldr r3, [r7, #4]
|
|
8007e06: 685b ldr r3, [r3, #4]
|
|
8007e08: b2db uxtb r3, r3
|
|
8007e0a: 4619 mov r1, r3
|
|
8007e0c: 6878 ldr r0, [r7, #4]
|
|
8007e0e: f7ff f9ce bl 80071ae <USBD_ClrClassConfig>
|
|
pdev->dev_config = cfgidx;
|
|
8007e12: 4b14 ldr r3, [pc, #80] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007e14: 781b ldrb r3, [r3, #0]
|
|
8007e16: 461a mov r2, r3
|
|
8007e18: 687b ldr r3, [r7, #4]
|
|
8007e1a: 605a str r2, [r3, #4]
|
|
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
|
|
8007e1c: 4b11 ldr r3, [pc, #68] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007e1e: 781b ldrb r3, [r3, #0]
|
|
8007e20: 4619 mov r1, r3
|
|
8007e22: 6878 ldr r0, [r7, #4]
|
|
8007e24: f7ff f9a4 bl 8007170 <USBD_SetClassConfig>
|
|
8007e28: 4603 mov r3, r0
|
|
8007e2a: 2b02 cmp r3, #2
|
|
8007e2c: d104 bne.n 8007e38 <USBD_SetConfig+0xec>
|
|
USBD_CtlError(pdev, req);
|
|
8007e2e: 6839 ldr r1, [r7, #0]
|
|
8007e30: 6878 ldr r0, [r7, #4]
|
|
8007e32: f000 f8f0 bl 8008016 <USBD_CtlError>
|
|
return;
|
|
8007e36: e012 b.n 8007e5e <USBD_SetConfig+0x112>
|
|
USBD_CtlSendStatus(pdev);
|
|
8007e38: 6878 ldr r0, [r7, #4]
|
|
8007e3a: f000 f9b5 bl 80081a8 <USBD_CtlSendStatus>
|
|
break;
|
|
8007e3e: e00e b.n 8007e5e <USBD_SetConfig+0x112>
|
|
USBD_CtlSendStatus(pdev);
|
|
8007e40: 6878 ldr r0, [r7, #4]
|
|
8007e42: f000 f9b1 bl 80081a8 <USBD_CtlSendStatus>
|
|
break;
|
|
8007e46: e00a b.n 8007e5e <USBD_SetConfig+0x112>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007e48: 6839 ldr r1, [r7, #0]
|
|
8007e4a: 6878 ldr r0, [r7, #4]
|
|
8007e4c: f000 f8e3 bl 8008016 <USBD_CtlError>
|
|
USBD_ClrClassConfig(pdev, cfgidx);
|
|
8007e50: 4b04 ldr r3, [pc, #16] @ (8007e64 <USBD_SetConfig+0x118>)
|
|
8007e52: 781b ldrb r3, [r3, #0]
|
|
8007e54: 4619 mov r1, r3
|
|
8007e56: 6878 ldr r0, [r7, #4]
|
|
8007e58: f7ff f9a9 bl 80071ae <USBD_ClrClassConfig>
|
|
break;
|
|
8007e5c: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
8007e5e: 3708 adds r7, #8
|
|
8007e60: 46bd mov sp, r7
|
|
8007e62: bd80 pop {r7, pc}
|
|
8007e64: 20000224 .word 0x20000224
|
|
|
|
08007e68 <USBD_GetConfig>:
|
|
* @param pdev: device instance
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
8007e68: b580 push {r7, lr}
|
|
8007e6a: b082 sub sp, #8
|
|
8007e6c: af00 add r7, sp, #0
|
|
8007e6e: 6078 str r0, [r7, #4]
|
|
8007e70: 6039 str r1, [r7, #0]
|
|
if (req->wLength != 1U)
|
|
8007e72: 683b ldr r3, [r7, #0]
|
|
8007e74: 88db ldrh r3, [r3, #6]
|
|
8007e76: 2b01 cmp r3, #1
|
|
8007e78: d004 beq.n 8007e84 <USBD_GetConfig+0x1c>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007e7a: 6839 ldr r1, [r7, #0]
|
|
8007e7c: 6878 ldr r0, [r7, #4]
|
|
8007e7e: f000 f8ca bl 8008016 <USBD_CtlError>
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
8007e82: e022 b.n 8007eca <USBD_GetConfig+0x62>
|
|
switch (pdev->dev_state)
|
|
8007e84: 687b ldr r3, [r7, #4]
|
|
8007e86: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8007e8a: 2b02 cmp r3, #2
|
|
8007e8c: dc02 bgt.n 8007e94 <USBD_GetConfig+0x2c>
|
|
8007e8e: 2b00 cmp r3, #0
|
|
8007e90: dc03 bgt.n 8007e9a <USBD_GetConfig+0x32>
|
|
8007e92: e015 b.n 8007ec0 <USBD_GetConfig+0x58>
|
|
8007e94: 2b03 cmp r3, #3
|
|
8007e96: d00b beq.n 8007eb0 <USBD_GetConfig+0x48>
|
|
8007e98: e012 b.n 8007ec0 <USBD_GetConfig+0x58>
|
|
pdev->dev_default_config = 0U;
|
|
8007e9a: 687b ldr r3, [r7, #4]
|
|
8007e9c: 2200 movs r2, #0
|
|
8007e9e: 609a str r2, [r3, #8]
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
|
|
8007ea0: 687b ldr r3, [r7, #4]
|
|
8007ea2: 3308 adds r3, #8
|
|
8007ea4: 2201 movs r2, #1
|
|
8007ea6: 4619 mov r1, r3
|
|
8007ea8: 6878 ldr r0, [r7, #4]
|
|
8007eaa: f000 f91f bl 80080ec <USBD_CtlSendData>
|
|
break;
|
|
8007eae: e00c b.n 8007eca <USBD_GetConfig+0x62>
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
|
|
8007eb0: 687b ldr r3, [r7, #4]
|
|
8007eb2: 3304 adds r3, #4
|
|
8007eb4: 2201 movs r2, #1
|
|
8007eb6: 4619 mov r1, r3
|
|
8007eb8: 6878 ldr r0, [r7, #4]
|
|
8007eba: f000 f917 bl 80080ec <USBD_CtlSendData>
|
|
break;
|
|
8007ebe: e004 b.n 8007eca <USBD_GetConfig+0x62>
|
|
USBD_CtlError(pdev, req);
|
|
8007ec0: 6839 ldr r1, [r7, #0]
|
|
8007ec2: 6878 ldr r0, [r7, #4]
|
|
8007ec4: f000 f8a7 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007ec8: bf00 nop
|
|
}
|
|
8007eca: bf00 nop
|
|
8007ecc: 3708 adds r7, #8
|
|
8007ece: 46bd mov sp, r7
|
|
8007ed0: bd80 pop {r7, pc}
|
|
|
|
08007ed2 <USBD_GetStatus>:
|
|
* @param pdev: device instance
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
|
|
{
|
|
8007ed2: b580 push {r7, lr}
|
|
8007ed4: b082 sub sp, #8
|
|
8007ed6: af00 add r7, sp, #0
|
|
8007ed8: 6078 str r0, [r7, #4]
|
|
8007eda: 6039 str r1, [r7, #0]
|
|
switch (pdev->dev_state)
|
|
8007edc: 687b ldr r3, [r7, #4]
|
|
8007ede: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8007ee2: 3b01 subs r3, #1
|
|
8007ee4: 2b02 cmp r3, #2
|
|
8007ee6: d81e bhi.n 8007f26 <USBD_GetStatus+0x54>
|
|
{
|
|
case USBD_STATE_DEFAULT:
|
|
case USBD_STATE_ADDRESSED:
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wLength != 0x2U)
|
|
8007ee8: 683b ldr r3, [r7, #0]
|
|
8007eea: 88db ldrh r3, [r3, #6]
|
|
8007eec: 2b02 cmp r3, #2
|
|
8007eee: d004 beq.n 8007efa <USBD_GetStatus+0x28>
|
|
{
|
|
USBD_CtlError(pdev, req);
|
|
8007ef0: 6839 ldr r1, [r7, #0]
|
|
8007ef2: 6878 ldr r0, [r7, #4]
|
|
8007ef4: f000 f88f bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007ef8: e01a b.n 8007f30 <USBD_GetStatus+0x5e>
|
|
}
|
|
|
|
#if (USBD_SELF_POWERED == 1U)
|
|
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
|
|
8007efa: 687b ldr r3, [r7, #4]
|
|
8007efc: 2201 movs r2, #1
|
|
8007efe: 60da str r2, [r3, #12]
|
|
#else
|
|
pdev->dev_config_status = 0U;
|
|
#endif
|
|
|
|
if (pdev->dev_remote_wakeup)
|
|
8007f00: 687b ldr r3, [r7, #4]
|
|
8007f02: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
|
|
8007f06: 2b00 cmp r3, #0
|
|
8007f08: d005 beq.n 8007f16 <USBD_GetStatus+0x44>
|
|
{
|
|
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
|
|
8007f0a: 687b ldr r3, [r7, #4]
|
|
8007f0c: 68db ldr r3, [r3, #12]
|
|
8007f0e: f043 0202 orr.w r2, r3, #2
|
|
8007f12: 687b ldr r3, [r7, #4]
|
|
8007f14: 60da str r2, [r3, #12]
|
|
}
|
|
|
|
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
|
|
8007f16: 687b ldr r3, [r7, #4]
|
|
8007f18: 330c adds r3, #12
|
|
8007f1a: 2202 movs r2, #2
|
|
8007f1c: 4619 mov r1, r3
|
|
8007f1e: 6878 ldr r0, [r7, #4]
|
|
8007f20: f000 f8e4 bl 80080ec <USBD_CtlSendData>
|
|
break;
|
|
8007f24: e004 b.n 8007f30 <USBD_GetStatus+0x5e>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007f26: 6839 ldr r1, [r7, #0]
|
|
8007f28: 6878 ldr r0, [r7, #4]
|
|
8007f2a: f000 f874 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007f2e: bf00 nop
|
|
}
|
|
}
|
|
8007f30: bf00 nop
|
|
8007f32: 3708 adds r7, #8
|
|
8007f34: 46bd mov sp, r7
|
|
8007f36: bd80 pop {r7, pc}
|
|
|
|
08007f38 <USBD_SetFeature>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8007f38: b580 push {r7, lr}
|
|
8007f3a: b082 sub sp, #8
|
|
8007f3c: af00 add r7, sp, #0
|
|
8007f3e: 6078 str r0, [r7, #4]
|
|
8007f40: 6039 str r1, [r7, #0]
|
|
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
|
|
8007f42: 683b ldr r3, [r7, #0]
|
|
8007f44: 885b ldrh r3, [r3, #2]
|
|
8007f46: 2b01 cmp r3, #1
|
|
8007f48: d106 bne.n 8007f58 <USBD_SetFeature+0x20>
|
|
{
|
|
pdev->dev_remote_wakeup = 1U;
|
|
8007f4a: 687b ldr r3, [r7, #4]
|
|
8007f4c: 2201 movs r2, #1
|
|
8007f4e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
|
|
USBD_CtlSendStatus(pdev);
|
|
8007f52: 6878 ldr r0, [r7, #4]
|
|
8007f54: f000 f928 bl 80081a8 <USBD_CtlSendStatus>
|
|
}
|
|
}
|
|
8007f58: bf00 nop
|
|
8007f5a: 3708 adds r7, #8
|
|
8007f5c: 46bd mov sp, r7
|
|
8007f5e: bd80 pop {r7, pc}
|
|
|
|
08007f60 <USBD_ClrFeature>:
|
|
* @param req: usb request
|
|
* @retval status
|
|
*/
|
|
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8007f60: b580 push {r7, lr}
|
|
8007f62: b082 sub sp, #8
|
|
8007f64: af00 add r7, sp, #0
|
|
8007f66: 6078 str r0, [r7, #4]
|
|
8007f68: 6039 str r1, [r7, #0]
|
|
switch (pdev->dev_state)
|
|
8007f6a: 687b ldr r3, [r7, #4]
|
|
8007f6c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
|
|
8007f70: 3b01 subs r3, #1
|
|
8007f72: 2b02 cmp r3, #2
|
|
8007f74: d80b bhi.n 8007f8e <USBD_ClrFeature+0x2e>
|
|
{
|
|
case USBD_STATE_DEFAULT:
|
|
case USBD_STATE_ADDRESSED:
|
|
case USBD_STATE_CONFIGURED:
|
|
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
|
|
8007f76: 683b ldr r3, [r7, #0]
|
|
8007f78: 885b ldrh r3, [r3, #2]
|
|
8007f7a: 2b01 cmp r3, #1
|
|
8007f7c: d10c bne.n 8007f98 <USBD_ClrFeature+0x38>
|
|
{
|
|
pdev->dev_remote_wakeup = 0U;
|
|
8007f7e: 687b ldr r3, [r7, #4]
|
|
8007f80: 2200 movs r2, #0
|
|
8007f82: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
|
|
USBD_CtlSendStatus(pdev);
|
|
8007f86: 6878 ldr r0, [r7, #4]
|
|
8007f88: f000 f90e bl 80081a8 <USBD_CtlSendStatus>
|
|
}
|
|
break;
|
|
8007f8c: e004 b.n 8007f98 <USBD_ClrFeature+0x38>
|
|
|
|
default:
|
|
USBD_CtlError(pdev, req);
|
|
8007f8e: 6839 ldr r1, [r7, #0]
|
|
8007f90: 6878 ldr r0, [r7, #4]
|
|
8007f92: f000 f840 bl 8008016 <USBD_CtlError>
|
|
break;
|
|
8007f96: e000 b.n 8007f9a <USBD_ClrFeature+0x3a>
|
|
break;
|
|
8007f98: bf00 nop
|
|
}
|
|
}
|
|
8007f9a: bf00 nop
|
|
8007f9c: 3708 adds r7, #8
|
|
8007f9e: 46bd mov sp, r7
|
|
8007fa0: bd80 pop {r7, pc}
|
|
|
|
08007fa2 <USBD_ParseSetupRequest>:
|
|
* @param req: usb request
|
|
* @retval None
|
|
*/
|
|
|
|
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
|
|
{
|
|
8007fa2: b480 push {r7}
|
|
8007fa4: b083 sub sp, #12
|
|
8007fa6: af00 add r7, sp, #0
|
|
8007fa8: 6078 str r0, [r7, #4]
|
|
8007faa: 6039 str r1, [r7, #0]
|
|
req->bmRequest = *(uint8_t *)(pdata);
|
|
8007fac: 683b ldr r3, [r7, #0]
|
|
8007fae: 781a ldrb r2, [r3, #0]
|
|
8007fb0: 687b ldr r3, [r7, #4]
|
|
8007fb2: 701a strb r2, [r3, #0]
|
|
req->bRequest = *(uint8_t *)(pdata + 1U);
|
|
8007fb4: 683b ldr r3, [r7, #0]
|
|
8007fb6: 785a ldrb r2, [r3, #1]
|
|
8007fb8: 687b ldr r3, [r7, #4]
|
|
8007fba: 705a strb r2, [r3, #1]
|
|
req->wValue = SWAPBYTE(pdata + 2U);
|
|
8007fbc: 683b ldr r3, [r7, #0]
|
|
8007fbe: 3302 adds r3, #2
|
|
8007fc0: 781b ldrb r3, [r3, #0]
|
|
8007fc2: 461a mov r2, r3
|
|
8007fc4: 683b ldr r3, [r7, #0]
|
|
8007fc6: 3303 adds r3, #3
|
|
8007fc8: 781b ldrb r3, [r3, #0]
|
|
8007fca: 021b lsls r3, r3, #8
|
|
8007fcc: b29b uxth r3, r3
|
|
8007fce: 4413 add r3, r2
|
|
8007fd0: b29a uxth r2, r3
|
|
8007fd2: 687b ldr r3, [r7, #4]
|
|
8007fd4: 805a strh r2, [r3, #2]
|
|
req->wIndex = SWAPBYTE(pdata + 4U);
|
|
8007fd6: 683b ldr r3, [r7, #0]
|
|
8007fd8: 3304 adds r3, #4
|
|
8007fda: 781b ldrb r3, [r3, #0]
|
|
8007fdc: 461a mov r2, r3
|
|
8007fde: 683b ldr r3, [r7, #0]
|
|
8007fe0: 3305 adds r3, #5
|
|
8007fe2: 781b ldrb r3, [r3, #0]
|
|
8007fe4: 021b lsls r3, r3, #8
|
|
8007fe6: b29b uxth r3, r3
|
|
8007fe8: 4413 add r3, r2
|
|
8007fea: b29a uxth r2, r3
|
|
8007fec: 687b ldr r3, [r7, #4]
|
|
8007fee: 809a strh r2, [r3, #4]
|
|
req->wLength = SWAPBYTE(pdata + 6U);
|
|
8007ff0: 683b ldr r3, [r7, #0]
|
|
8007ff2: 3306 adds r3, #6
|
|
8007ff4: 781b ldrb r3, [r3, #0]
|
|
8007ff6: 461a mov r2, r3
|
|
8007ff8: 683b ldr r3, [r7, #0]
|
|
8007ffa: 3307 adds r3, #7
|
|
8007ffc: 781b ldrb r3, [r3, #0]
|
|
8007ffe: 021b lsls r3, r3, #8
|
|
8008000: b29b uxth r3, r3
|
|
8008002: 4413 add r3, r2
|
|
8008004: b29a uxth r2, r3
|
|
8008006: 687b ldr r3, [r7, #4]
|
|
8008008: 80da strh r2, [r3, #6]
|
|
|
|
}
|
|
800800a: bf00 nop
|
|
800800c: 370c adds r7, #12
|
|
800800e: 46bd mov sp, r7
|
|
8008010: f85d 7b04 ldr.w r7, [sp], #4
|
|
8008014: 4770 bx lr
|
|
|
|
08008016 <USBD_CtlError>:
|
|
* @retval None
|
|
*/
|
|
|
|
void USBD_CtlError(USBD_HandleTypeDef *pdev,
|
|
USBD_SetupReqTypedef *req)
|
|
{
|
|
8008016: b580 push {r7, lr}
|
|
8008018: b082 sub sp, #8
|
|
800801a: af00 add r7, sp, #0
|
|
800801c: 6078 str r0, [r7, #4]
|
|
800801e: 6039 str r1, [r7, #0]
|
|
USBD_LL_StallEP(pdev, 0x80U);
|
|
8008020: 2180 movs r1, #128 @ 0x80
|
|
8008022: 6878 ldr r0, [r7, #4]
|
|
8008024: f000 fc56 bl 80088d4 <USBD_LL_StallEP>
|
|
USBD_LL_StallEP(pdev, 0U);
|
|
8008028: 2100 movs r1, #0
|
|
800802a: 6878 ldr r0, [r7, #4]
|
|
800802c: f000 fc52 bl 80088d4 <USBD_LL_StallEP>
|
|
}
|
|
8008030: bf00 nop
|
|
8008032: 3708 adds r7, #8
|
|
8008034: 46bd mov sp, r7
|
|
8008036: bd80 pop {r7, pc}
|
|
|
|
08008038 <USBD_GetString>:
|
|
* @param unicode : Formatted string buffer (unicode)
|
|
* @param len : descriptor length
|
|
* @retval None
|
|
*/
|
|
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
|
|
{
|
|
8008038: b580 push {r7, lr}
|
|
800803a: b086 sub sp, #24
|
|
800803c: af00 add r7, sp, #0
|
|
800803e: 60f8 str r0, [r7, #12]
|
|
8008040: 60b9 str r1, [r7, #8]
|
|
8008042: 607a str r2, [r7, #4]
|
|
uint8_t idx = 0U;
|
|
8008044: 2300 movs r3, #0
|
|
8008046: 75fb strb r3, [r7, #23]
|
|
|
|
if (desc != NULL)
|
|
8008048: 68fb ldr r3, [r7, #12]
|
|
800804a: 2b00 cmp r3, #0
|
|
800804c: d032 beq.n 80080b4 <USBD_GetString+0x7c>
|
|
{
|
|
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
|
|
800804e: 68f8 ldr r0, [r7, #12]
|
|
8008050: f000 f834 bl 80080bc <USBD_GetLen>
|
|
8008054: 4603 mov r3, r0
|
|
8008056: 3301 adds r3, #1
|
|
8008058: b29b uxth r3, r3
|
|
800805a: 005b lsls r3, r3, #1
|
|
800805c: b29a uxth r2, r3
|
|
800805e: 687b ldr r3, [r7, #4]
|
|
8008060: 801a strh r2, [r3, #0]
|
|
unicode[idx++] = *(uint8_t *)(void *)len;
|
|
8008062: 7dfb ldrb r3, [r7, #23]
|
|
8008064: 1c5a adds r2, r3, #1
|
|
8008066: 75fa strb r2, [r7, #23]
|
|
8008068: 461a mov r2, r3
|
|
800806a: 68bb ldr r3, [r7, #8]
|
|
800806c: 4413 add r3, r2
|
|
800806e: 687a ldr r2, [r7, #4]
|
|
8008070: 7812 ldrb r2, [r2, #0]
|
|
8008072: 701a strb r2, [r3, #0]
|
|
unicode[idx++] = USB_DESC_TYPE_STRING;
|
|
8008074: 7dfb ldrb r3, [r7, #23]
|
|
8008076: 1c5a adds r2, r3, #1
|
|
8008078: 75fa strb r2, [r7, #23]
|
|
800807a: 461a mov r2, r3
|
|
800807c: 68bb ldr r3, [r7, #8]
|
|
800807e: 4413 add r3, r2
|
|
8008080: 2203 movs r2, #3
|
|
8008082: 701a strb r2, [r3, #0]
|
|
|
|
while (*desc != '\0')
|
|
8008084: e012 b.n 80080ac <USBD_GetString+0x74>
|
|
{
|
|
unicode[idx++] = *desc++;
|
|
8008086: 68fb ldr r3, [r7, #12]
|
|
8008088: 1c5a adds r2, r3, #1
|
|
800808a: 60fa str r2, [r7, #12]
|
|
800808c: 7dfa ldrb r2, [r7, #23]
|
|
800808e: 1c51 adds r1, r2, #1
|
|
8008090: 75f9 strb r1, [r7, #23]
|
|
8008092: 4611 mov r1, r2
|
|
8008094: 68ba ldr r2, [r7, #8]
|
|
8008096: 440a add r2, r1
|
|
8008098: 781b ldrb r3, [r3, #0]
|
|
800809a: 7013 strb r3, [r2, #0]
|
|
unicode[idx++] = 0U;
|
|
800809c: 7dfb ldrb r3, [r7, #23]
|
|
800809e: 1c5a adds r2, r3, #1
|
|
80080a0: 75fa strb r2, [r7, #23]
|
|
80080a2: 461a mov r2, r3
|
|
80080a4: 68bb ldr r3, [r7, #8]
|
|
80080a6: 4413 add r3, r2
|
|
80080a8: 2200 movs r2, #0
|
|
80080aa: 701a strb r2, [r3, #0]
|
|
while (*desc != '\0')
|
|
80080ac: 68fb ldr r3, [r7, #12]
|
|
80080ae: 781b ldrb r3, [r3, #0]
|
|
80080b0: 2b00 cmp r3, #0
|
|
80080b2: d1e8 bne.n 8008086 <USBD_GetString+0x4e>
|
|
}
|
|
}
|
|
}
|
|
80080b4: bf00 nop
|
|
80080b6: 3718 adds r7, #24
|
|
80080b8: 46bd mov sp, r7
|
|
80080ba: bd80 pop {r7, pc}
|
|
|
|
080080bc <USBD_GetLen>:
|
|
* return the string length
|
|
* @param buf : pointer to the ascii string buffer
|
|
* @retval string length
|
|
*/
|
|
static uint8_t USBD_GetLen(uint8_t *buf)
|
|
{
|
|
80080bc: b480 push {r7}
|
|
80080be: b085 sub sp, #20
|
|
80080c0: af00 add r7, sp, #0
|
|
80080c2: 6078 str r0, [r7, #4]
|
|
uint8_t len = 0U;
|
|
80080c4: 2300 movs r3, #0
|
|
80080c6: 73fb strb r3, [r7, #15]
|
|
|
|
while (*buf != '\0')
|
|
80080c8: e005 b.n 80080d6 <USBD_GetLen+0x1a>
|
|
{
|
|
len++;
|
|
80080ca: 7bfb ldrb r3, [r7, #15]
|
|
80080cc: 3301 adds r3, #1
|
|
80080ce: 73fb strb r3, [r7, #15]
|
|
buf++;
|
|
80080d0: 687b ldr r3, [r7, #4]
|
|
80080d2: 3301 adds r3, #1
|
|
80080d4: 607b str r3, [r7, #4]
|
|
while (*buf != '\0')
|
|
80080d6: 687b ldr r3, [r7, #4]
|
|
80080d8: 781b ldrb r3, [r3, #0]
|
|
80080da: 2b00 cmp r3, #0
|
|
80080dc: d1f5 bne.n 80080ca <USBD_GetLen+0xe>
|
|
}
|
|
|
|
return len;
|
|
80080de: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80080e0: 4618 mov r0, r3
|
|
80080e2: 3714 adds r7, #20
|
|
80080e4: 46bd mov sp, r7
|
|
80080e6: f85d 7b04 ldr.w r7, [sp], #4
|
|
80080ea: 4770 bx lr
|
|
|
|
080080ec <USBD_CtlSendData>:
|
|
* @param len: length of data to be sent
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
80080ec: b580 push {r7, lr}
|
|
80080ee: b084 sub sp, #16
|
|
80080f0: af00 add r7, sp, #0
|
|
80080f2: 60f8 str r0, [r7, #12]
|
|
80080f4: 60b9 str r1, [r7, #8]
|
|
80080f6: 4613 mov r3, r2
|
|
80080f8: 80fb strh r3, [r7, #6]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_DATA_IN;
|
|
80080fa: 68fb ldr r3, [r7, #12]
|
|
80080fc: 2202 movs r2, #2
|
|
80080fe: f8c3 2294 str.w r2, [r3, #660] @ 0x294
|
|
pdev->ep_in[0].total_length = len;
|
|
8008102: 88fa ldrh r2, [r7, #6]
|
|
8008104: 68fb ldr r3, [r7, #12]
|
|
8008106: 61da str r2, [r3, #28]
|
|
pdev->ep_in[0].rem_length = len;
|
|
8008108: 88fa ldrh r2, [r7, #6]
|
|
800810a: 68fb ldr r3, [r7, #12]
|
|
800810c: 621a str r2, [r3, #32]
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
|
|
800810e: 88fb ldrh r3, [r7, #6]
|
|
8008110: 68ba ldr r2, [r7, #8]
|
|
8008112: 2100 movs r1, #0
|
|
8008114: 68f8 ldr r0, [r7, #12]
|
|
8008116: f000 fc67 bl 80089e8 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
800811a: 2300 movs r3, #0
|
|
}
|
|
800811c: 4618 mov r0, r3
|
|
800811e: 3710 adds r7, #16
|
|
8008120: 46bd mov sp, r7
|
|
8008122: bd80 pop {r7, pc}
|
|
|
|
08008124 <USBD_CtlContinueSendData>:
|
|
* @param len: length of data to be sent
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8008124: b580 push {r7, lr}
|
|
8008126: b084 sub sp, #16
|
|
8008128: af00 add r7, sp, #0
|
|
800812a: 60f8 str r0, [r7, #12]
|
|
800812c: 60b9 str r1, [r7, #8]
|
|
800812e: 4613 mov r3, r2
|
|
8008130: 80fb strh r3, [r7, #6]
|
|
/* Start the next transfer */
|
|
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
|
|
8008132: 88fb ldrh r3, [r7, #6]
|
|
8008134: 68ba ldr r2, [r7, #8]
|
|
8008136: 2100 movs r1, #0
|
|
8008138: 68f8 ldr r0, [r7, #12]
|
|
800813a: f000 fc55 bl 80089e8 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
800813e: 2300 movs r3, #0
|
|
}
|
|
8008140: 4618 mov r0, r3
|
|
8008142: 3710 adds r7, #16
|
|
8008144: 46bd mov sp, r7
|
|
8008146: bd80 pop {r7, pc}
|
|
|
|
08008148 <USBD_CtlPrepareRx>:
|
|
* @param len: length of data to be received
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8008148: b580 push {r7, lr}
|
|
800814a: b084 sub sp, #16
|
|
800814c: af00 add r7, sp, #0
|
|
800814e: 60f8 str r0, [r7, #12]
|
|
8008150: 60b9 str r1, [r7, #8]
|
|
8008152: 4613 mov r3, r2
|
|
8008154: 80fb strh r3, [r7, #6]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_DATA_OUT;
|
|
8008156: 68fb ldr r3, [r7, #12]
|
|
8008158: 2203 movs r2, #3
|
|
800815a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
|
|
pdev->ep_out[0].total_length = len;
|
|
800815e: 88fa ldrh r2, [r7, #6]
|
|
8008160: 68fb ldr r3, [r7, #12]
|
|
8008162: f8c3 215c str.w r2, [r3, #348] @ 0x15c
|
|
pdev->ep_out[0].rem_length = len;
|
|
8008166: 88fa ldrh r2, [r7, #6]
|
|
8008168: 68fb ldr r3, [r7, #12]
|
|
800816a: f8c3 2160 str.w r2, [r3, #352] @ 0x160
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
|
|
800816e: 88fb ldrh r3, [r7, #6]
|
|
8008170: 68ba ldr r2, [r7, #8]
|
|
8008172: 2100 movs r1, #0
|
|
8008174: 68f8 ldr r0, [r7, #12]
|
|
8008176: f000 fc5a bl 8008a2e <USBD_LL_PrepareReceive>
|
|
|
|
return USBD_OK;
|
|
800817a: 2300 movs r3, #0
|
|
}
|
|
800817c: 4618 mov r0, r3
|
|
800817e: 3710 adds r7, #16
|
|
8008180: 46bd mov sp, r7
|
|
8008182: bd80 pop {r7, pc}
|
|
|
|
08008184 <USBD_CtlContinueRx>:
|
|
* @param len: length of data to be received
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
|
|
uint8_t *pbuf, uint16_t len)
|
|
{
|
|
8008184: b580 push {r7, lr}
|
|
8008186: b084 sub sp, #16
|
|
8008188: af00 add r7, sp, #0
|
|
800818a: 60f8 str r0, [r7, #12]
|
|
800818c: 60b9 str r1, [r7, #8]
|
|
800818e: 4613 mov r3, r2
|
|
8008190: 80fb strh r3, [r7, #6]
|
|
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
|
|
8008192: 88fb ldrh r3, [r7, #6]
|
|
8008194: 68ba ldr r2, [r7, #8]
|
|
8008196: 2100 movs r1, #0
|
|
8008198: 68f8 ldr r0, [r7, #12]
|
|
800819a: f000 fc48 bl 8008a2e <USBD_LL_PrepareReceive>
|
|
|
|
return USBD_OK;
|
|
800819e: 2300 movs r3, #0
|
|
}
|
|
80081a0: 4618 mov r0, r3
|
|
80081a2: 3710 adds r7, #16
|
|
80081a4: 46bd mov sp, r7
|
|
80081a6: bd80 pop {r7, pc}
|
|
|
|
080081a8 <USBD_CtlSendStatus>:
|
|
* send zero lzngth packet on the ctl pipe
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
|
|
{
|
|
80081a8: b580 push {r7, lr}
|
|
80081aa: b082 sub sp, #8
|
|
80081ac: af00 add r7, sp, #0
|
|
80081ae: 6078 str r0, [r7, #4]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_STATUS_IN;
|
|
80081b0: 687b ldr r3, [r7, #4]
|
|
80081b2: 2204 movs r2, #4
|
|
80081b4: f8c3 2294 str.w r2, [r3, #660] @ 0x294
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
|
|
80081b8: 2300 movs r3, #0
|
|
80081ba: 2200 movs r2, #0
|
|
80081bc: 2100 movs r1, #0
|
|
80081be: 6878 ldr r0, [r7, #4]
|
|
80081c0: f000 fc12 bl 80089e8 <USBD_LL_Transmit>
|
|
|
|
return USBD_OK;
|
|
80081c4: 2300 movs r3, #0
|
|
}
|
|
80081c6: 4618 mov r0, r3
|
|
80081c8: 3708 adds r7, #8
|
|
80081ca: 46bd mov sp, r7
|
|
80081cc: bd80 pop {r7, pc}
|
|
|
|
080081ce <USBD_CtlReceiveStatus>:
|
|
* receive zero lzngth packet on the ctl pipe
|
|
* @param pdev: device instance
|
|
* @retval status
|
|
*/
|
|
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
|
|
{
|
|
80081ce: b580 push {r7, lr}
|
|
80081d0: b082 sub sp, #8
|
|
80081d2: af00 add r7, sp, #0
|
|
80081d4: 6078 str r0, [r7, #4]
|
|
/* Set EP0 State */
|
|
pdev->ep0_state = USBD_EP0_STATUS_OUT;
|
|
80081d6: 687b ldr r3, [r7, #4]
|
|
80081d8: 2205 movs r2, #5
|
|
80081da: f8c3 2294 str.w r2, [r3, #660] @ 0x294
|
|
|
|
/* Start the transfer */
|
|
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
|
|
80081de: 2300 movs r3, #0
|
|
80081e0: 2200 movs r2, #0
|
|
80081e2: 2100 movs r1, #0
|
|
80081e4: 6878 ldr r0, [r7, #4]
|
|
80081e6: f000 fc22 bl 8008a2e <USBD_LL_PrepareReceive>
|
|
|
|
return USBD_OK;
|
|
80081ea: 2300 movs r3, #0
|
|
}
|
|
80081ec: 4618 mov r0, r3
|
|
80081ee: 3708 adds r7, #8
|
|
80081f0: 46bd mov sp, r7
|
|
80081f2: bd80 pop {r7, pc}
|
|
|
|
080081f4 <MX_USB_DEVICE_Init>:
|
|
/**
|
|
* Init USB device Library, add supported class and start the library
|
|
* @retval None
|
|
*/
|
|
void MX_USB_DEVICE_Init(void)
|
|
{
|
|
80081f4: b580 push {r7, lr}
|
|
80081f6: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
|
|
|
|
/* USER CODE END USB_DEVICE_Init_PreTreatment */
|
|
|
|
/* Init Device Library, add supported class and start the library. */
|
|
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
|
|
80081f8: 2200 movs r2, #0
|
|
80081fa: 4912 ldr r1, [pc, #72] @ (8008244 <MX_USB_DEVICE_Init+0x50>)
|
|
80081fc: 4812 ldr r0, [pc, #72] @ (8008248 <MX_USB_DEVICE_Init+0x54>)
|
|
80081fe: f7fe ff5b bl 80070b8 <USBD_Init>
|
|
8008202: 4603 mov r3, r0
|
|
8008204: 2b00 cmp r3, #0
|
|
8008206: d001 beq.n 800820c <MX_USB_DEVICE_Init+0x18>
|
|
{
|
|
Error_Handler();
|
|
8008208: f7f8 f8b8 bl 800037c <Error_Handler>
|
|
}
|
|
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
|
|
800820c: 490f ldr r1, [pc, #60] @ (800824c <MX_USB_DEVICE_Init+0x58>)
|
|
800820e: 480e ldr r0, [pc, #56] @ (8008248 <MX_USB_DEVICE_Init+0x54>)
|
|
8008210: f7fe ff7d bl 800710e <USBD_RegisterClass>
|
|
8008214: 4603 mov r3, r0
|
|
8008216: 2b00 cmp r3, #0
|
|
8008218: d001 beq.n 800821e <MX_USB_DEVICE_Init+0x2a>
|
|
{
|
|
Error_Handler();
|
|
800821a: f7f8 f8af bl 800037c <Error_Handler>
|
|
}
|
|
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
|
|
800821e: 490c ldr r1, [pc, #48] @ (8008250 <MX_USB_DEVICE_Init+0x5c>)
|
|
8008220: 4809 ldr r0, [pc, #36] @ (8008248 <MX_USB_DEVICE_Init+0x54>)
|
|
8008222: f7fe feab bl 8006f7c <USBD_CDC_RegisterInterface>
|
|
8008226: 4603 mov r3, r0
|
|
8008228: 2b00 cmp r3, #0
|
|
800822a: d001 beq.n 8008230 <MX_USB_DEVICE_Init+0x3c>
|
|
{
|
|
Error_Handler();
|
|
800822c: f7f8 f8a6 bl 800037c <Error_Handler>
|
|
}
|
|
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
|
|
8008230: 4805 ldr r0, [pc, #20] @ (8008248 <MX_USB_DEVICE_Init+0x54>)
|
|
8008232: f7fe ff86 bl 8007142 <USBD_Start>
|
|
8008236: 4603 mov r3, r0
|
|
8008238: 2b00 cmp r3, #0
|
|
800823a: d001 beq.n 8008240 <MX_USB_DEVICE_Init+0x4c>
|
|
{
|
|
Error_Handler();
|
|
800823c: f7f8 f89e bl 800037c <Error_Handler>
|
|
}
|
|
|
|
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
|
|
|
|
/* USER CODE END USB_DEVICE_Init_PostTreatment */
|
|
}
|
|
8008240: bf00 nop
|
|
8008242: bd80 pop {r7, pc}
|
|
8008244: 2000012c .word 0x2000012c
|
|
8008248: 20000228 .word 0x20000228
|
|
800824c: 20000018 .word 0x20000018
|
|
8008250: 2000011c .word 0x2000011c
|
|
|
|
08008254 <CDC_Init_FS>:
|
|
/**
|
|
* @brief Initializes the CDC media low layer over the FS USB IP
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
static int8_t CDC_Init_FS(void)
|
|
{
|
|
8008254: b580 push {r7, lr}
|
|
8008256: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN 3 */
|
|
/* Set Application Buffers */
|
|
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
|
|
8008258: 2200 movs r2, #0
|
|
800825a: 4905 ldr r1, [pc, #20] @ (8008270 <CDC_Init_FS+0x1c>)
|
|
800825c: 4805 ldr r0, [pc, #20] @ (8008274 <CDC_Init_FS+0x20>)
|
|
800825e: f7fe fea4 bl 8006faa <USBD_CDC_SetTxBuffer>
|
|
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
|
|
8008262: 4905 ldr r1, [pc, #20] @ (8008278 <CDC_Init_FS+0x24>)
|
|
8008264: 4803 ldr r0, [pc, #12] @ (8008274 <CDC_Init_FS+0x20>)
|
|
8008266: f7fe feba bl 8006fde <USBD_CDC_SetRxBuffer>
|
|
return (USBD_OK);
|
|
800826a: 2300 movs r3, #0
|
|
/* USER CODE END 3 */
|
|
}
|
|
800826c: 4618 mov r0, r3
|
|
800826e: bd80 pop {r7, pc}
|
|
8008270: 200008ec .word 0x200008ec
|
|
8008274: 20000228 .word 0x20000228
|
|
8008278: 200004ec .word 0x200004ec
|
|
|
|
0800827c <CDC_DeInit_FS>:
|
|
/**
|
|
* @brief DeInitializes the CDC media low layer
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
static int8_t CDC_DeInit_FS(void)
|
|
{
|
|
800827c: b480 push {r7}
|
|
800827e: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN 4 */
|
|
return (USBD_OK);
|
|
8008280: 2300 movs r3, #0
|
|
/* USER CODE END 4 */
|
|
}
|
|
8008282: 4618 mov r0, r3
|
|
8008284: 46bd mov sp, r7
|
|
8008286: f85d 7b04 ldr.w r7, [sp], #4
|
|
800828a: 4770 bx lr
|
|
|
|
0800828c <CDC_Control_FS>:
|
|
* @param pbuf: Buffer containing command data (request parameters)
|
|
* @param length: Number of data to be sent (in bytes)
|
|
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
|
|
{
|
|
800828c: b480 push {r7}
|
|
800828e: b083 sub sp, #12
|
|
8008290: af00 add r7, sp, #0
|
|
8008292: 4603 mov r3, r0
|
|
8008294: 6039 str r1, [r7, #0]
|
|
8008296: 71fb strb r3, [r7, #7]
|
|
8008298: 4613 mov r3, r2
|
|
800829a: 80bb strh r3, [r7, #4]
|
|
/* USER CODE BEGIN 5 */
|
|
switch(cmd)
|
|
800829c: 79fb ldrb r3, [r7, #7]
|
|
800829e: 2b23 cmp r3, #35 @ 0x23
|
|
80082a0: d84a bhi.n 8008338 <CDC_Control_FS+0xac>
|
|
80082a2: a201 add r2, pc, #4 @ (adr r2, 80082a8 <CDC_Control_FS+0x1c>)
|
|
80082a4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
80082a8: 08008339 .word 0x08008339
|
|
80082ac: 08008339 .word 0x08008339
|
|
80082b0: 08008339 .word 0x08008339
|
|
80082b4: 08008339 .word 0x08008339
|
|
80082b8: 08008339 .word 0x08008339
|
|
80082bc: 08008339 .word 0x08008339
|
|
80082c0: 08008339 .word 0x08008339
|
|
80082c4: 08008339 .word 0x08008339
|
|
80082c8: 08008339 .word 0x08008339
|
|
80082cc: 08008339 .word 0x08008339
|
|
80082d0: 08008339 .word 0x08008339
|
|
80082d4: 08008339 .word 0x08008339
|
|
80082d8: 08008339 .word 0x08008339
|
|
80082dc: 08008339 .word 0x08008339
|
|
80082e0: 08008339 .word 0x08008339
|
|
80082e4: 08008339 .word 0x08008339
|
|
80082e8: 08008339 .word 0x08008339
|
|
80082ec: 08008339 .word 0x08008339
|
|
80082f0: 08008339 .word 0x08008339
|
|
80082f4: 08008339 .word 0x08008339
|
|
80082f8: 08008339 .word 0x08008339
|
|
80082fc: 08008339 .word 0x08008339
|
|
8008300: 08008339 .word 0x08008339
|
|
8008304: 08008339 .word 0x08008339
|
|
8008308: 08008339 .word 0x08008339
|
|
800830c: 08008339 .word 0x08008339
|
|
8008310: 08008339 .word 0x08008339
|
|
8008314: 08008339 .word 0x08008339
|
|
8008318: 08008339 .word 0x08008339
|
|
800831c: 08008339 .word 0x08008339
|
|
8008320: 08008339 .word 0x08008339
|
|
8008324: 08008339 .word 0x08008339
|
|
8008328: 08008339 .word 0x08008339
|
|
800832c: 08008339 .word 0x08008339
|
|
8008330: 08008339 .word 0x08008339
|
|
8008334: 08008339 .word 0x08008339
|
|
case CDC_SEND_BREAK:
|
|
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
8008338: bf00 nop
|
|
}
|
|
|
|
return (USBD_OK);
|
|
800833a: 2300 movs r3, #0
|
|
/* USER CODE END 5 */
|
|
}
|
|
800833c: 4618 mov r0, r3
|
|
800833e: 370c adds r7, #12
|
|
8008340: 46bd mov sp, r7
|
|
8008342: f85d 7b04 ldr.w r7, [sp], #4
|
|
8008346: 4770 bx lr
|
|
|
|
08008348 <CDC_Receive_FS>:
|
|
* @param Buf: Buffer of data to be received
|
|
* @param Len: Number of data received (in bytes)
|
|
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
|
|
*/
|
|
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
|
|
{
|
|
8008348: b580 push {r7, lr}
|
|
800834a: b082 sub sp, #8
|
|
800834c: af00 add r7, sp, #0
|
|
800834e: 6078 str r0, [r7, #4]
|
|
8008350: 6039 str r1, [r7, #0]
|
|
/* USER CODE BEGIN 6 */
|
|
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
|
|
8008352: 6879 ldr r1, [r7, #4]
|
|
8008354: 4805 ldr r0, [pc, #20] @ (800836c <CDC_Receive_FS+0x24>)
|
|
8008356: f7fe fe42 bl 8006fde <USBD_CDC_SetRxBuffer>
|
|
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
|
|
800835a: 4804 ldr r0, [pc, #16] @ (800836c <CDC_Receive_FS+0x24>)
|
|
800835c: f7fe fe82 bl 8007064 <USBD_CDC_ReceivePacket>
|
|
return (USBD_OK);
|
|
8008360: 2300 movs r3, #0
|
|
/* USER CODE END 6 */
|
|
}
|
|
8008362: 4618 mov r0, r3
|
|
8008364: 3708 adds r7, #8
|
|
8008366: 46bd mov sp, r7
|
|
8008368: bd80 pop {r7, pc}
|
|
800836a: bf00 nop
|
|
800836c: 20000228 .word 0x20000228
|
|
|
|
08008370 <CDC_Transmit_FS>:
|
|
* @param Buf: Buffer of data to be sent
|
|
* @param Len: Number of data to be sent (in bytes)
|
|
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
|
|
*/
|
|
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
|
|
{
|
|
8008370: b580 push {r7, lr}
|
|
8008372: b084 sub sp, #16
|
|
8008374: af00 add r7, sp, #0
|
|
8008376: 6078 str r0, [r7, #4]
|
|
8008378: 460b mov r3, r1
|
|
800837a: 807b strh r3, [r7, #2]
|
|
uint8_t result = USBD_OK;
|
|
800837c: 2300 movs r3, #0
|
|
800837e: 73fb strb r3, [r7, #15]
|
|
/* USER CODE BEGIN 7 */
|
|
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
|
|
8008380: 4b0d ldr r3, [pc, #52] @ (80083b8 <CDC_Transmit_FS+0x48>)
|
|
8008382: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
|
|
8008386: 60bb str r3, [r7, #8]
|
|
if (hcdc->TxState != 0){
|
|
8008388: 68bb ldr r3, [r7, #8]
|
|
800838a: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
|
|
800838e: 2b00 cmp r3, #0
|
|
8008390: d001 beq.n 8008396 <CDC_Transmit_FS+0x26>
|
|
return USBD_BUSY;
|
|
8008392: 2301 movs r3, #1
|
|
8008394: e00b b.n 80083ae <CDC_Transmit_FS+0x3e>
|
|
}
|
|
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
|
|
8008396: 887b ldrh r3, [r7, #2]
|
|
8008398: 461a mov r2, r3
|
|
800839a: 6879 ldr r1, [r7, #4]
|
|
800839c: 4806 ldr r0, [pc, #24] @ (80083b8 <CDC_Transmit_FS+0x48>)
|
|
800839e: f7fe fe04 bl 8006faa <USBD_CDC_SetTxBuffer>
|
|
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
|
|
80083a2: 4805 ldr r0, [pc, #20] @ (80083b8 <CDC_Transmit_FS+0x48>)
|
|
80083a4: f7fe fe2f bl 8007006 <USBD_CDC_TransmitPacket>
|
|
80083a8: 4603 mov r3, r0
|
|
80083aa: 73fb strb r3, [r7, #15]
|
|
/* USER CODE END 7 */
|
|
return result;
|
|
80083ac: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80083ae: 4618 mov r0, r3
|
|
80083b0: 3710 adds r7, #16
|
|
80083b2: 46bd mov sp, r7
|
|
80083b4: bd80 pop {r7, pc}
|
|
80083b6: bf00 nop
|
|
80083b8: 20000228 .word 0x20000228
|
|
|
|
080083bc <USBD_FS_DeviceDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
80083bc: b480 push {r7}
|
|
80083be: b083 sub sp, #12
|
|
80083c0: af00 add r7, sp, #0
|
|
80083c2: 4603 mov r3, r0
|
|
80083c4: 6039 str r1, [r7, #0]
|
|
80083c6: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
*length = sizeof(USBD_FS_DeviceDesc);
|
|
80083c8: 683b ldr r3, [r7, #0]
|
|
80083ca: 2212 movs r2, #18
|
|
80083cc: 801a strh r2, [r3, #0]
|
|
return USBD_FS_DeviceDesc;
|
|
80083ce: 4b03 ldr r3, [pc, #12] @ (80083dc <USBD_FS_DeviceDescriptor+0x20>)
|
|
}
|
|
80083d0: 4618 mov r0, r3
|
|
80083d2: 370c adds r7, #12
|
|
80083d4: 46bd mov sp, r7
|
|
80083d6: f85d 7b04 ldr.w r7, [sp], #4
|
|
80083da: 4770 bx lr
|
|
80083dc: 20000148 .word 0x20000148
|
|
|
|
080083e0 <USBD_FS_LangIDStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
80083e0: b480 push {r7}
|
|
80083e2: b083 sub sp, #12
|
|
80083e4: af00 add r7, sp, #0
|
|
80083e6: 4603 mov r3, r0
|
|
80083e8: 6039 str r1, [r7, #0]
|
|
80083ea: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
*length = sizeof(USBD_LangIDDesc);
|
|
80083ec: 683b ldr r3, [r7, #0]
|
|
80083ee: 2204 movs r2, #4
|
|
80083f0: 801a strh r2, [r3, #0]
|
|
return USBD_LangIDDesc;
|
|
80083f2: 4b03 ldr r3, [pc, #12] @ (8008400 <USBD_FS_LangIDStrDescriptor+0x20>)
|
|
}
|
|
80083f4: 4618 mov r0, r3
|
|
80083f6: 370c adds r7, #12
|
|
80083f8: 46bd mov sp, r7
|
|
80083fa: f85d 7b04 ldr.w r7, [sp], #4
|
|
80083fe: 4770 bx lr
|
|
8008400: 2000015c .word 0x2000015c
|
|
|
|
08008404 <USBD_FS_ProductStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8008404: b580 push {r7, lr}
|
|
8008406: b082 sub sp, #8
|
|
8008408: af00 add r7, sp, #0
|
|
800840a: 4603 mov r3, r0
|
|
800840c: 6039 str r1, [r7, #0]
|
|
800840e: 71fb strb r3, [r7, #7]
|
|
if(speed == 0)
|
|
8008410: 79fb ldrb r3, [r7, #7]
|
|
8008412: 2b00 cmp r3, #0
|
|
8008414: d105 bne.n 8008422 <USBD_FS_ProductStrDescriptor+0x1e>
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
|
|
8008416: 683a ldr r2, [r7, #0]
|
|
8008418: 4907 ldr r1, [pc, #28] @ (8008438 <USBD_FS_ProductStrDescriptor+0x34>)
|
|
800841a: 4808 ldr r0, [pc, #32] @ (800843c <USBD_FS_ProductStrDescriptor+0x38>)
|
|
800841c: f7ff fe0c bl 8008038 <USBD_GetString>
|
|
8008420: e004 b.n 800842c <USBD_FS_ProductStrDescriptor+0x28>
|
|
}
|
|
else
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
|
|
8008422: 683a ldr r2, [r7, #0]
|
|
8008424: 4904 ldr r1, [pc, #16] @ (8008438 <USBD_FS_ProductStrDescriptor+0x34>)
|
|
8008426: 4805 ldr r0, [pc, #20] @ (800843c <USBD_FS_ProductStrDescriptor+0x38>)
|
|
8008428: f7ff fe06 bl 8008038 <USBD_GetString>
|
|
}
|
|
return USBD_StrDesc;
|
|
800842c: 4b02 ldr r3, [pc, #8] @ (8008438 <USBD_FS_ProductStrDescriptor+0x34>)
|
|
}
|
|
800842e: 4618 mov r0, r3
|
|
8008430: 3708 adds r7, #8
|
|
8008432: 46bd mov sp, r7
|
|
8008434: bd80 pop {r7, pc}
|
|
8008436: bf00 nop
|
|
8008438: 20000cec .word 0x20000cec
|
|
800843c: 08008bb8 .word 0x08008bb8
|
|
|
|
08008440 <USBD_FS_ManufacturerStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8008440: b580 push {r7, lr}
|
|
8008442: b082 sub sp, #8
|
|
8008444: af00 add r7, sp, #0
|
|
8008446: 4603 mov r3, r0
|
|
8008448: 6039 str r1, [r7, #0]
|
|
800844a: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
|
|
800844c: 683a ldr r2, [r7, #0]
|
|
800844e: 4904 ldr r1, [pc, #16] @ (8008460 <USBD_FS_ManufacturerStrDescriptor+0x20>)
|
|
8008450: 4804 ldr r0, [pc, #16] @ (8008464 <USBD_FS_ManufacturerStrDescriptor+0x24>)
|
|
8008452: f7ff fdf1 bl 8008038 <USBD_GetString>
|
|
return USBD_StrDesc;
|
|
8008456: 4b02 ldr r3, [pc, #8] @ (8008460 <USBD_FS_ManufacturerStrDescriptor+0x20>)
|
|
}
|
|
8008458: 4618 mov r0, r3
|
|
800845a: 3708 adds r7, #8
|
|
800845c: 46bd mov sp, r7
|
|
800845e: bd80 pop {r7, pc}
|
|
8008460: 20000cec .word 0x20000cec
|
|
8008464: 08008bd0 .word 0x08008bd0
|
|
|
|
08008468 <USBD_FS_SerialStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
8008468: b580 push {r7, lr}
|
|
800846a: b082 sub sp, #8
|
|
800846c: af00 add r7, sp, #0
|
|
800846e: 4603 mov r3, r0
|
|
8008470: 6039 str r1, [r7, #0]
|
|
8008472: 71fb strb r3, [r7, #7]
|
|
UNUSED(speed);
|
|
*length = USB_SIZ_STRING_SERIAL;
|
|
8008474: 683b ldr r3, [r7, #0]
|
|
8008476: 221a movs r2, #26
|
|
8008478: 801a strh r2, [r3, #0]
|
|
|
|
/* Update the serial number string descriptor with the data from the unique
|
|
* ID */
|
|
Get_SerialNum();
|
|
800847a: f000 f843 bl 8008504 <Get_SerialNum>
|
|
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
|
|
|
|
/* USER CODE END USBD_FS_SerialStrDescriptor */
|
|
return (uint8_t *) USBD_StringSerial;
|
|
800847e: 4b02 ldr r3, [pc, #8] @ (8008488 <USBD_FS_SerialStrDescriptor+0x20>)
|
|
}
|
|
8008480: 4618 mov r0, r3
|
|
8008482: 3708 adds r7, #8
|
|
8008484: 46bd mov sp, r7
|
|
8008486: bd80 pop {r7, pc}
|
|
8008488: 20000160 .word 0x20000160
|
|
|
|
0800848c <USBD_FS_ConfigStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
800848c: b580 push {r7, lr}
|
|
800848e: b082 sub sp, #8
|
|
8008490: af00 add r7, sp, #0
|
|
8008492: 4603 mov r3, r0
|
|
8008494: 6039 str r1, [r7, #0]
|
|
8008496: 71fb strb r3, [r7, #7]
|
|
if(speed == USBD_SPEED_HIGH)
|
|
8008498: 79fb ldrb r3, [r7, #7]
|
|
800849a: 2b00 cmp r3, #0
|
|
800849c: d105 bne.n 80084aa <USBD_FS_ConfigStrDescriptor+0x1e>
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
|
|
800849e: 683a ldr r2, [r7, #0]
|
|
80084a0: 4907 ldr r1, [pc, #28] @ (80084c0 <USBD_FS_ConfigStrDescriptor+0x34>)
|
|
80084a2: 4808 ldr r0, [pc, #32] @ (80084c4 <USBD_FS_ConfigStrDescriptor+0x38>)
|
|
80084a4: f7ff fdc8 bl 8008038 <USBD_GetString>
|
|
80084a8: e004 b.n 80084b4 <USBD_FS_ConfigStrDescriptor+0x28>
|
|
}
|
|
else
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
|
|
80084aa: 683a ldr r2, [r7, #0]
|
|
80084ac: 4904 ldr r1, [pc, #16] @ (80084c0 <USBD_FS_ConfigStrDescriptor+0x34>)
|
|
80084ae: 4805 ldr r0, [pc, #20] @ (80084c4 <USBD_FS_ConfigStrDescriptor+0x38>)
|
|
80084b0: f7ff fdc2 bl 8008038 <USBD_GetString>
|
|
}
|
|
return USBD_StrDesc;
|
|
80084b4: 4b02 ldr r3, [pc, #8] @ (80084c0 <USBD_FS_ConfigStrDescriptor+0x34>)
|
|
}
|
|
80084b6: 4618 mov r0, r3
|
|
80084b8: 3708 adds r7, #8
|
|
80084ba: 46bd mov sp, r7
|
|
80084bc: bd80 pop {r7, pc}
|
|
80084be: bf00 nop
|
|
80084c0: 20000cec .word 0x20000cec
|
|
80084c4: 08008be4 .word 0x08008be4
|
|
|
|
080084c8 <USBD_FS_InterfaceStrDescriptor>:
|
|
* @param speed : Current device speed
|
|
* @param length : Pointer to data length variable
|
|
* @retval Pointer to descriptor buffer
|
|
*/
|
|
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
|
|
{
|
|
80084c8: b580 push {r7, lr}
|
|
80084ca: b082 sub sp, #8
|
|
80084cc: af00 add r7, sp, #0
|
|
80084ce: 4603 mov r3, r0
|
|
80084d0: 6039 str r1, [r7, #0]
|
|
80084d2: 71fb strb r3, [r7, #7]
|
|
if(speed == 0)
|
|
80084d4: 79fb ldrb r3, [r7, #7]
|
|
80084d6: 2b00 cmp r3, #0
|
|
80084d8: d105 bne.n 80084e6 <USBD_FS_InterfaceStrDescriptor+0x1e>
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
|
|
80084da: 683a ldr r2, [r7, #0]
|
|
80084dc: 4907 ldr r1, [pc, #28] @ (80084fc <USBD_FS_InterfaceStrDescriptor+0x34>)
|
|
80084de: 4808 ldr r0, [pc, #32] @ (8008500 <USBD_FS_InterfaceStrDescriptor+0x38>)
|
|
80084e0: f7ff fdaa bl 8008038 <USBD_GetString>
|
|
80084e4: e004 b.n 80084f0 <USBD_FS_InterfaceStrDescriptor+0x28>
|
|
}
|
|
else
|
|
{
|
|
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
|
|
80084e6: 683a ldr r2, [r7, #0]
|
|
80084e8: 4904 ldr r1, [pc, #16] @ (80084fc <USBD_FS_InterfaceStrDescriptor+0x34>)
|
|
80084ea: 4805 ldr r0, [pc, #20] @ (8008500 <USBD_FS_InterfaceStrDescriptor+0x38>)
|
|
80084ec: f7ff fda4 bl 8008038 <USBD_GetString>
|
|
}
|
|
return USBD_StrDesc;
|
|
80084f0: 4b02 ldr r3, [pc, #8] @ (80084fc <USBD_FS_InterfaceStrDescriptor+0x34>)
|
|
}
|
|
80084f2: 4618 mov r0, r3
|
|
80084f4: 3708 adds r7, #8
|
|
80084f6: 46bd mov sp, r7
|
|
80084f8: bd80 pop {r7, pc}
|
|
80084fa: bf00 nop
|
|
80084fc: 20000cec .word 0x20000cec
|
|
8008500: 08008bf0 .word 0x08008bf0
|
|
|
|
08008504 <Get_SerialNum>:
|
|
* @brief Create the serial number string descriptor
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void Get_SerialNum(void)
|
|
{
|
|
8008504: b580 push {r7, lr}
|
|
8008506: b084 sub sp, #16
|
|
8008508: af00 add r7, sp, #0
|
|
uint32_t deviceserial0;
|
|
uint32_t deviceserial1;
|
|
uint32_t deviceserial2;
|
|
|
|
deviceserial0 = *(uint32_t *) DEVICE_ID1;
|
|
800850a: 4b0f ldr r3, [pc, #60] @ (8008548 <Get_SerialNum+0x44>)
|
|
800850c: 681b ldr r3, [r3, #0]
|
|
800850e: 60fb str r3, [r7, #12]
|
|
deviceserial1 = *(uint32_t *) DEVICE_ID2;
|
|
8008510: 4b0e ldr r3, [pc, #56] @ (800854c <Get_SerialNum+0x48>)
|
|
8008512: 681b ldr r3, [r3, #0]
|
|
8008514: 60bb str r3, [r7, #8]
|
|
deviceserial2 = *(uint32_t *) DEVICE_ID3;
|
|
8008516: 4b0e ldr r3, [pc, #56] @ (8008550 <Get_SerialNum+0x4c>)
|
|
8008518: 681b ldr r3, [r3, #0]
|
|
800851a: 607b str r3, [r7, #4]
|
|
|
|
deviceserial0 += deviceserial2;
|
|
800851c: 68fa ldr r2, [r7, #12]
|
|
800851e: 687b ldr r3, [r7, #4]
|
|
8008520: 4413 add r3, r2
|
|
8008522: 60fb str r3, [r7, #12]
|
|
|
|
if (deviceserial0 != 0)
|
|
8008524: 68fb ldr r3, [r7, #12]
|
|
8008526: 2b00 cmp r3, #0
|
|
8008528: d009 beq.n 800853e <Get_SerialNum+0x3a>
|
|
{
|
|
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
|
|
800852a: 2208 movs r2, #8
|
|
800852c: 4909 ldr r1, [pc, #36] @ (8008554 <Get_SerialNum+0x50>)
|
|
800852e: 68f8 ldr r0, [r7, #12]
|
|
8008530: f000 f814 bl 800855c <IntToUnicode>
|
|
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
|
|
8008534: 2204 movs r2, #4
|
|
8008536: 4908 ldr r1, [pc, #32] @ (8008558 <Get_SerialNum+0x54>)
|
|
8008538: 68b8 ldr r0, [r7, #8]
|
|
800853a: f000 f80f bl 800855c <IntToUnicode>
|
|
}
|
|
}
|
|
800853e: bf00 nop
|
|
8008540: 3710 adds r7, #16
|
|
8008542: 46bd mov sp, r7
|
|
8008544: bd80 pop {r7, pc}
|
|
8008546: bf00 nop
|
|
8008548: 1ffff7ac .word 0x1ffff7ac
|
|
800854c: 1ffff7b0 .word 0x1ffff7b0
|
|
8008550: 1ffff7b4 .word 0x1ffff7b4
|
|
8008554: 20000162 .word 0x20000162
|
|
8008558: 20000172 .word 0x20000172
|
|
|
|
0800855c <IntToUnicode>:
|
|
* @param pbuf: pointer to the buffer
|
|
* @param len: buffer length
|
|
* @retval None
|
|
*/
|
|
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
|
|
{
|
|
800855c: b480 push {r7}
|
|
800855e: b087 sub sp, #28
|
|
8008560: af00 add r7, sp, #0
|
|
8008562: 60f8 str r0, [r7, #12]
|
|
8008564: 60b9 str r1, [r7, #8]
|
|
8008566: 4613 mov r3, r2
|
|
8008568: 71fb strb r3, [r7, #7]
|
|
uint8_t idx = 0;
|
|
800856a: 2300 movs r3, #0
|
|
800856c: 75fb strb r3, [r7, #23]
|
|
|
|
for (idx = 0; idx < len; idx++)
|
|
800856e: 2300 movs r3, #0
|
|
8008570: 75fb strb r3, [r7, #23]
|
|
8008572: e027 b.n 80085c4 <IntToUnicode+0x68>
|
|
{
|
|
if (((value >> 28)) < 0xA)
|
|
8008574: 68fb ldr r3, [r7, #12]
|
|
8008576: 0f1b lsrs r3, r3, #28
|
|
8008578: 2b09 cmp r3, #9
|
|
800857a: d80b bhi.n 8008594 <IntToUnicode+0x38>
|
|
{
|
|
pbuf[2 * idx] = (value >> 28) + '0';
|
|
800857c: 68fb ldr r3, [r7, #12]
|
|
800857e: 0f1b lsrs r3, r3, #28
|
|
8008580: b2da uxtb r2, r3
|
|
8008582: 7dfb ldrb r3, [r7, #23]
|
|
8008584: 005b lsls r3, r3, #1
|
|
8008586: 4619 mov r1, r3
|
|
8008588: 68bb ldr r3, [r7, #8]
|
|
800858a: 440b add r3, r1
|
|
800858c: 3230 adds r2, #48 @ 0x30
|
|
800858e: b2d2 uxtb r2, r2
|
|
8008590: 701a strb r2, [r3, #0]
|
|
8008592: e00a b.n 80085aa <IntToUnicode+0x4e>
|
|
}
|
|
else
|
|
{
|
|
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
|
|
8008594: 68fb ldr r3, [r7, #12]
|
|
8008596: 0f1b lsrs r3, r3, #28
|
|
8008598: b2da uxtb r2, r3
|
|
800859a: 7dfb ldrb r3, [r7, #23]
|
|
800859c: 005b lsls r3, r3, #1
|
|
800859e: 4619 mov r1, r3
|
|
80085a0: 68bb ldr r3, [r7, #8]
|
|
80085a2: 440b add r3, r1
|
|
80085a4: 3237 adds r2, #55 @ 0x37
|
|
80085a6: b2d2 uxtb r2, r2
|
|
80085a8: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
value = value << 4;
|
|
80085aa: 68fb ldr r3, [r7, #12]
|
|
80085ac: 011b lsls r3, r3, #4
|
|
80085ae: 60fb str r3, [r7, #12]
|
|
|
|
pbuf[2 * idx + 1] = 0;
|
|
80085b0: 7dfb ldrb r3, [r7, #23]
|
|
80085b2: 005b lsls r3, r3, #1
|
|
80085b4: 3301 adds r3, #1
|
|
80085b6: 68ba ldr r2, [r7, #8]
|
|
80085b8: 4413 add r3, r2
|
|
80085ba: 2200 movs r2, #0
|
|
80085bc: 701a strb r2, [r3, #0]
|
|
for (idx = 0; idx < len; idx++)
|
|
80085be: 7dfb ldrb r3, [r7, #23]
|
|
80085c0: 3301 adds r3, #1
|
|
80085c2: 75fb strb r3, [r7, #23]
|
|
80085c4: 7dfa ldrb r2, [r7, #23]
|
|
80085c6: 79fb ldrb r3, [r7, #7]
|
|
80085c8: 429a cmp r2, r3
|
|
80085ca: d3d3 bcc.n 8008574 <IntToUnicode+0x18>
|
|
}
|
|
}
|
|
80085cc: bf00 nop
|
|
80085ce: bf00 nop
|
|
80085d0: 371c adds r7, #28
|
|
80085d2: 46bd mov sp, r7
|
|
80085d4: f85d 7b04 ldr.w r7, [sp], #4
|
|
80085d8: 4770 bx lr
|
|
...
|
|
|
|
080085dc <HAL_PCD_MspInit>:
|
|
LL Driver Callbacks (PCD -> USB Device Library)
|
|
*******************************************************************************/
|
|
/* MSP Init */
|
|
|
|
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
|
|
{
|
|
80085dc: b580 push {r7, lr}
|
|
80085de: b084 sub sp, #16
|
|
80085e0: af00 add r7, sp, #0
|
|
80085e2: 6078 str r0, [r7, #4]
|
|
if(pcdHandle->Instance==USB)
|
|
80085e4: 687b ldr r3, [r7, #4]
|
|
80085e6: 681b ldr r3, [r3, #0]
|
|
80085e8: 4a0d ldr r2, [pc, #52] @ (8008620 <HAL_PCD_MspInit+0x44>)
|
|
80085ea: 4293 cmp r3, r2
|
|
80085ec: d113 bne.n 8008616 <HAL_PCD_MspInit+0x3a>
|
|
{
|
|
/* USER CODE BEGIN USB_MspInit 0 */
|
|
|
|
/* USER CODE END USB_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_USB_CLK_ENABLE();
|
|
80085ee: 4b0d ldr r3, [pc, #52] @ (8008624 <HAL_PCD_MspInit+0x48>)
|
|
80085f0: 69db ldr r3, [r3, #28]
|
|
80085f2: 4a0c ldr r2, [pc, #48] @ (8008624 <HAL_PCD_MspInit+0x48>)
|
|
80085f4: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
|
|
80085f8: 61d3 str r3, [r2, #28]
|
|
80085fa: 4b0a ldr r3, [pc, #40] @ (8008624 <HAL_PCD_MspInit+0x48>)
|
|
80085fc: 69db ldr r3, [r3, #28]
|
|
80085fe: f403 0300 and.w r3, r3, #8388608 @ 0x800000
|
|
8008602: 60fb str r3, [r7, #12]
|
|
8008604: 68fb ldr r3, [r7, #12]
|
|
|
|
/* Peripheral interrupt init */
|
|
HAL_NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0, 0);
|
|
8008606: 2200 movs r2, #0
|
|
8008608: 2100 movs r1, #0
|
|
800860a: 2014 movs r0, #20
|
|
800860c: f7f8 f8ff bl 800080e <HAL_NVIC_SetPriority>
|
|
HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
|
|
8008610: 2014 movs r0, #20
|
|
8008612: f7f8 f918 bl 8000846 <HAL_NVIC_EnableIRQ>
|
|
/* USER CODE BEGIN USB_MspInit 1 */
|
|
|
|
/* USER CODE END USB_MspInit 1 */
|
|
}
|
|
}
|
|
8008616: bf00 nop
|
|
8008618: 3710 adds r7, #16
|
|
800861a: 46bd mov sp, r7
|
|
800861c: bd80 pop {r7, pc}
|
|
800861e: bf00 nop
|
|
8008620: 40005c00 .word 0x40005c00
|
|
8008624: 40021000 .word 0x40021000
|
|
|
|
08008628 <HAL_PCD_SetupStageCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
8008628: b580 push {r7, lr}
|
|
800862a: b082 sub sp, #8
|
|
800862c: af00 add r7, sp, #0
|
|
800862e: 6078 str r0, [r7, #4]
|
|
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
|
|
8008630: 687b ldr r3, [r7, #4]
|
|
8008632: f8d3 22e8 ldr.w r2, [r3, #744] @ 0x2e8
|
|
8008636: 687b ldr r3, [r7, #4]
|
|
8008638: f503 732c add.w r3, r3, #688 @ 0x2b0
|
|
800863c: 4619 mov r1, r3
|
|
800863e: 4610 mov r0, r2
|
|
8008640: f7fe fdc8 bl 80071d4 <USBD_LL_SetupStage>
|
|
}
|
|
8008644: bf00 nop
|
|
8008646: 3708 adds r7, #8
|
|
8008648: 46bd mov sp, r7
|
|
800864a: bd80 pop {r7, pc}
|
|
|
|
0800864c <HAL_PCD_DataOutStageCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#else
|
|
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
800864c: b580 push {r7, lr}
|
|
800864e: b082 sub sp, #8
|
|
8008650: af00 add r7, sp, #0
|
|
8008652: 6078 str r0, [r7, #4]
|
|
8008654: 460b mov r3, r1
|
|
8008656: 70fb strb r3, [r7, #3]
|
|
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
|
|
8008658: 687b ldr r3, [r7, #4]
|
|
800865a: f8d3 02e8 ldr.w r0, [r3, #744] @ 0x2e8
|
|
800865e: 78fa ldrb r2, [r7, #3]
|
|
8008660: 6879 ldr r1, [r7, #4]
|
|
8008662: 4613 mov r3, r2
|
|
8008664: 009b lsls r3, r3, #2
|
|
8008666: 4413 add r3, r2
|
|
8008668: 00db lsls r3, r3, #3
|
|
800866a: 440b add r3, r1
|
|
800866c: f503 73be add.w r3, r3, #380 @ 0x17c
|
|
8008670: 681a ldr r2, [r3, #0]
|
|
8008672: 78fb ldrb r3, [r7, #3]
|
|
8008674: 4619 mov r1, r3
|
|
8008676: f7fe fdfa bl 800726e <USBD_LL_DataOutStage>
|
|
}
|
|
800867a: bf00 nop
|
|
800867c: 3708 adds r7, #8
|
|
800867e: 46bd mov sp, r7
|
|
8008680: bd80 pop {r7, pc}
|
|
|
|
08008682 <HAL_PCD_DataInStageCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#else
|
|
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
8008682: b580 push {r7, lr}
|
|
8008684: b082 sub sp, #8
|
|
8008686: af00 add r7, sp, #0
|
|
8008688: 6078 str r0, [r7, #4]
|
|
800868a: 460b mov r3, r1
|
|
800868c: 70fb strb r3, [r7, #3]
|
|
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
|
|
800868e: 687b ldr r3, [r7, #4]
|
|
8008690: f8d3 02e8 ldr.w r0, [r3, #744] @ 0x2e8
|
|
8008694: 78fa ldrb r2, [r7, #3]
|
|
8008696: 6879 ldr r1, [r7, #4]
|
|
8008698: 4613 mov r3, r2
|
|
800869a: 009b lsls r3, r3, #2
|
|
800869c: 4413 add r3, r2
|
|
800869e: 00db lsls r3, r3, #3
|
|
80086a0: 440b add r3, r1
|
|
80086a2: 333c adds r3, #60 @ 0x3c
|
|
80086a4: 681a ldr r2, [r3, #0]
|
|
80086a6: 78fb ldrb r3, [r7, #3]
|
|
80086a8: 4619 mov r1, r3
|
|
80086aa: f7fe fe51 bl 8007350 <USBD_LL_DataInStage>
|
|
}
|
|
80086ae: bf00 nop
|
|
80086b0: 3708 adds r7, #8
|
|
80086b2: 46bd mov sp, r7
|
|
80086b4: bd80 pop {r7, pc}
|
|
|
|
080086b6 <HAL_PCD_SOFCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
80086b6: b580 push {r7, lr}
|
|
80086b8: b082 sub sp, #8
|
|
80086ba: af00 add r7, sp, #0
|
|
80086bc: 6078 str r0, [r7, #4]
|
|
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
|
|
80086be: 687b ldr r3, [r7, #4]
|
|
80086c0: f8d3 32e8 ldr.w r3, [r3, #744] @ 0x2e8
|
|
80086c4: 4618 mov r0, r3
|
|
80086c6: f7fe ff64 bl 8007592 <USBD_LL_SOF>
|
|
}
|
|
80086ca: bf00 nop
|
|
80086cc: 3708 adds r7, #8
|
|
80086ce: 46bd mov sp, r7
|
|
80086d0: bd80 pop {r7, pc}
|
|
|
|
080086d2 <HAL_PCD_ResetCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
80086d2: b580 push {r7, lr}
|
|
80086d4: b084 sub sp, #16
|
|
80086d6: af00 add r7, sp, #0
|
|
80086d8: 6078 str r0, [r7, #4]
|
|
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
|
|
80086da: 2301 movs r3, #1
|
|
80086dc: 73fb strb r3, [r7, #15]
|
|
|
|
if ( hpcd->Init.speed != PCD_SPEED_FULL)
|
|
80086de: 687b ldr r3, [r7, #4]
|
|
80086e0: 689b ldr r3, [r3, #8]
|
|
80086e2: 2b02 cmp r3, #2
|
|
80086e4: d001 beq.n 80086ea <HAL_PCD_ResetCallback+0x18>
|
|
{
|
|
Error_Handler();
|
|
80086e6: f7f7 fe49 bl 800037c <Error_Handler>
|
|
}
|
|
/* Set Speed. */
|
|
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
|
|
80086ea: 687b ldr r3, [r7, #4]
|
|
80086ec: f8d3 32e8 ldr.w r3, [r3, #744] @ 0x2e8
|
|
80086f0: 7bfa ldrb r2, [r7, #15]
|
|
80086f2: 4611 mov r1, r2
|
|
80086f4: 4618 mov r0, r3
|
|
80086f6: f7fe ff11 bl 800751c <USBD_LL_SetSpeed>
|
|
|
|
/* Reset Device. */
|
|
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
|
|
80086fa: 687b ldr r3, [r7, #4]
|
|
80086fc: f8d3 32e8 ldr.w r3, [r3, #744] @ 0x2e8
|
|
8008700: 4618 mov r0, r3
|
|
8008702: f7fe feca bl 800749a <USBD_LL_Reset>
|
|
}
|
|
8008706: bf00 nop
|
|
8008708: 3710 adds r7, #16
|
|
800870a: 46bd mov sp, r7
|
|
800870c: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08008710 <HAL_PCD_SuspendCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
8008710: b580 push {r7, lr}
|
|
8008712: b082 sub sp, #8
|
|
8008714: af00 add r7, sp, #0
|
|
8008716: 6078 str r0, [r7, #4]
|
|
/* Inform USB library that core enters in suspend Mode. */
|
|
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
|
|
8008718: 687b ldr r3, [r7, #4]
|
|
800871a: f8d3 32e8 ldr.w r3, [r3, #744] @ 0x2e8
|
|
800871e: 4618 mov r0, r3
|
|
8008720: f7fe ff0c bl 800753c <USBD_LL_Suspend>
|
|
/* Enter in STOP mode. */
|
|
/* USER CODE BEGIN 2 */
|
|
if (hpcd->Init.low_power_enable)
|
|
8008724: 687b ldr r3, [r7, #4]
|
|
8008726: 699b ldr r3, [r3, #24]
|
|
8008728: 2b00 cmp r3, #0
|
|
800872a: d005 beq.n 8008738 <HAL_PCD_SuspendCallback+0x28>
|
|
{
|
|
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
|
|
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
|
|
800872c: 4b04 ldr r3, [pc, #16] @ (8008740 <HAL_PCD_SuspendCallback+0x30>)
|
|
800872e: 691b ldr r3, [r3, #16]
|
|
8008730: 4a03 ldr r2, [pc, #12] @ (8008740 <HAL_PCD_SuspendCallback+0x30>)
|
|
8008732: f043 0306 orr.w r3, r3, #6
|
|
8008736: 6113 str r3, [r2, #16]
|
|
}
|
|
/* USER CODE END 2 */
|
|
}
|
|
8008738: bf00 nop
|
|
800873a: 3708 adds r7, #8
|
|
800873c: 46bd mov sp, r7
|
|
800873e: bd80 pop {r7, pc}
|
|
8008740: e000ed00 .word 0xe000ed00
|
|
|
|
08008744 <HAL_PCD_ResumeCallback>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
|
|
#else
|
|
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
8008744: b580 push {r7, lr}
|
|
8008746: b082 sub sp, #8
|
|
8008748: af00 add r7, sp, #0
|
|
800874a: 6078 str r0, [r7, #4]
|
|
/* USER CODE BEGIN 3 */
|
|
|
|
/* USER CODE END 3 */
|
|
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
|
|
800874c: 687b ldr r3, [r7, #4]
|
|
800874e: f8d3 32e8 ldr.w r3, [r3, #744] @ 0x2e8
|
|
8008752: 4618 mov r0, r3
|
|
8008754: f7fe ff07 bl 8007566 <USBD_LL_Resume>
|
|
}
|
|
8008758: bf00 nop
|
|
800875a: 3708 adds r7, #8
|
|
800875c: 46bd mov sp, r7
|
|
800875e: bd80 pop {r7, pc}
|
|
|
|
08008760 <USBD_LL_Init>:
|
|
* @brief Initializes the low level portion of the device driver.
|
|
* @param pdev: Device handle
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8008760: b580 push {r7, lr}
|
|
8008762: b082 sub sp, #8
|
|
8008764: af00 add r7, sp, #0
|
|
8008766: 6078 str r0, [r7, #4]
|
|
/* Init USB Ip. */
|
|
/* Link the driver to the stack. */
|
|
hpcd_USB_FS.pData = pdev;
|
|
8008768: 4a28 ldr r2, [pc, #160] @ (800880c <USBD_LL_Init+0xac>)
|
|
800876a: 687b ldr r3, [r7, #4]
|
|
800876c: f8c2 32e8 str.w r3, [r2, #744] @ 0x2e8
|
|
pdev->pData = &hpcd_USB_FS;
|
|
8008770: 687b ldr r3, [r7, #4]
|
|
8008772: 4a26 ldr r2, [pc, #152] @ (800880c <USBD_LL_Init+0xac>)
|
|
8008774: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
|
|
|
|
hpcd_USB_FS.Instance = USB;
|
|
8008778: 4b24 ldr r3, [pc, #144] @ (800880c <USBD_LL_Init+0xac>)
|
|
800877a: 4a25 ldr r2, [pc, #148] @ (8008810 <USBD_LL_Init+0xb0>)
|
|
800877c: 601a str r2, [r3, #0]
|
|
hpcd_USB_FS.Init.dev_endpoints = 8;
|
|
800877e: 4b23 ldr r3, [pc, #140] @ (800880c <USBD_LL_Init+0xac>)
|
|
8008780: 2208 movs r2, #8
|
|
8008782: 605a str r2, [r3, #4]
|
|
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
|
|
8008784: 4b21 ldr r3, [pc, #132] @ (800880c <USBD_LL_Init+0xac>)
|
|
8008786: 2202 movs r2, #2
|
|
8008788: 609a str r2, [r3, #8]
|
|
hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
|
|
800878a: 4b20 ldr r3, [pc, #128] @ (800880c <USBD_LL_Init+0xac>)
|
|
800878c: 2202 movs r2, #2
|
|
800878e: 611a str r2, [r3, #16]
|
|
hpcd_USB_FS.Init.low_power_enable = DISABLE;
|
|
8008790: 4b1e ldr r3, [pc, #120] @ (800880c <USBD_LL_Init+0xac>)
|
|
8008792: 2200 movs r2, #0
|
|
8008794: 619a str r2, [r3, #24]
|
|
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
|
|
8008796: 4b1d ldr r3, [pc, #116] @ (800880c <USBD_LL_Init+0xac>)
|
|
8008798: 2200 movs r2, #0
|
|
800879a: 621a str r2, [r3, #32]
|
|
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
|
|
800879c: 481b ldr r0, [pc, #108] @ (800880c <USBD_LL_Init+0xac>)
|
|
800879e: f7f8 f9df bl 8000b60 <HAL_PCD_Init>
|
|
80087a2: 4603 mov r3, r0
|
|
80087a4: 2b00 cmp r3, #0
|
|
80087a6: d001 beq.n 80087ac <USBD_LL_Init+0x4c>
|
|
{
|
|
Error_Handler( );
|
|
80087a8: f7f7 fde8 bl 800037c <Error_Handler>
|
|
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
|
|
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
|
|
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
/* USER CODE BEGIN EndPoint_Configuration */
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
|
|
80087ac: 687b ldr r3, [r7, #4]
|
|
80087ae: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
|
|
80087b2: 2318 movs r3, #24
|
|
80087b4: 2200 movs r2, #0
|
|
80087b6: 2100 movs r1, #0
|
|
80087b8: f7f9 fe51 bl 800245e <HAL_PCDEx_PMAConfig>
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
|
|
80087bc: 687b ldr r3, [r7, #4]
|
|
80087be: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
|
|
80087c2: 2358 movs r3, #88 @ 0x58
|
|
80087c4: 2200 movs r2, #0
|
|
80087c6: 2180 movs r1, #128 @ 0x80
|
|
80087c8: f7f9 fe49 bl 800245e <HAL_PCDEx_PMAConfig>
|
|
/* USER CODE END EndPoint_Configuration */
|
|
/* USER CODE BEGIN EndPoint_Configuration_CDC */
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
|
|
80087cc: 687b ldr r3, [r7, #4]
|
|
80087ce: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
|
|
80087d2: 23c0 movs r3, #192 @ 0xc0
|
|
80087d4: 2200 movs r2, #0
|
|
80087d6: 2181 movs r1, #129 @ 0x81
|
|
80087d8: f7f9 fe41 bl 800245e <HAL_PCDEx_PMAConfig>
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
|
|
80087dc: 687b ldr r3, [r7, #4]
|
|
80087de: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
|
|
80087e2: f44f 7388 mov.w r3, #272 @ 0x110
|
|
80087e6: 2200 movs r2, #0
|
|
80087e8: 2101 movs r1, #1
|
|
80087ea: f7f9 fe38 bl 800245e <HAL_PCDEx_PMAConfig>
|
|
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
|
|
80087ee: 687b ldr r3, [r7, #4]
|
|
80087f0: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
|
|
80087f4: f44f 7380 mov.w r3, #256 @ 0x100
|
|
80087f8: 2200 movs r2, #0
|
|
80087fa: 2182 movs r1, #130 @ 0x82
|
|
80087fc: f7f9 fe2f bl 800245e <HAL_PCDEx_PMAConfig>
|
|
/* USER CODE END EndPoint_Configuration_CDC */
|
|
return USBD_OK;
|
|
8008800: 2300 movs r3, #0
|
|
}
|
|
8008802: 4618 mov r0, r3
|
|
8008804: 3708 adds r7, #8
|
|
8008806: 46bd mov sp, r7
|
|
8008808: bd80 pop {r7, pc}
|
|
800880a: bf00 nop
|
|
800880c: 20000eec .word 0x20000eec
|
|
8008810: 40005c00 .word 0x40005c00
|
|
|
|
08008814 <USBD_LL_Start>:
|
|
* @brief Starts the low level portion of the device driver.
|
|
* @param pdev: Device handle
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
|
|
{
|
|
8008814: b580 push {r7, lr}
|
|
8008816: b084 sub sp, #16
|
|
8008818: af00 add r7, sp, #0
|
|
800881a: 6078 str r0, [r7, #4]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800881c: 2300 movs r3, #0
|
|
800881e: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
8008820: 2300 movs r3, #0
|
|
8008822: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_Start(pdev->pData);
|
|
8008824: 687b ldr r3, [r7, #4]
|
|
8008826: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
|
|
800882a: 4618 mov r0, r3
|
|
800882c: f7f8 fa6a bl 8000d04 <HAL_PCD_Start>
|
|
8008830: 4603 mov r3, r0
|
|
8008832: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
8008834: 7bfb ldrb r3, [r7, #15]
|
|
8008836: 4618 mov r0, r3
|
|
8008838: f000 f954 bl 8008ae4 <USBD_Get_USB_Status>
|
|
800883c: 4603 mov r3, r0
|
|
800883e: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
8008840: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
8008842: 4618 mov r0, r3
|
|
8008844: 3710 adds r7, #16
|
|
8008846: 46bd mov sp, r7
|
|
8008848: bd80 pop {r7, pc}
|
|
|
|
0800884a <USBD_LL_OpenEP>:
|
|
* @param ep_type: Endpoint type
|
|
* @param ep_mps: Endpoint max packet size
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
|
|
{
|
|
800884a: b580 push {r7, lr}
|
|
800884c: b084 sub sp, #16
|
|
800884e: af00 add r7, sp, #0
|
|
8008850: 6078 str r0, [r7, #4]
|
|
8008852: 4608 mov r0, r1
|
|
8008854: 4611 mov r1, r2
|
|
8008856: 461a mov r2, r3
|
|
8008858: 4603 mov r3, r0
|
|
800885a: 70fb strb r3, [r7, #3]
|
|
800885c: 460b mov r3, r1
|
|
800885e: 70bb strb r3, [r7, #2]
|
|
8008860: 4613 mov r3, r2
|
|
8008862: 803b strh r3, [r7, #0]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
8008864: 2300 movs r3, #0
|
|
8008866: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
8008868: 2300 movs r3, #0
|
|
800886a: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
|
|
800886c: 687b ldr r3, [r7, #4]
|
|
800886e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
|
|
8008872: 78bb ldrb r3, [r7, #2]
|
|
8008874: 883a ldrh r2, [r7, #0]
|
|
8008876: 78f9 ldrb r1, [r7, #3]
|
|
8008878: f7f8 fb63 bl 8000f42 <HAL_PCD_EP_Open>
|
|
800887c: 4603 mov r3, r0
|
|
800887e: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
8008880: 7bfb ldrb r3, [r7, #15]
|
|
8008882: 4618 mov r0, r3
|
|
8008884: f000 f92e bl 8008ae4 <USBD_Get_USB_Status>
|
|
8008888: 4603 mov r3, r0
|
|
800888a: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800888c: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800888e: 4618 mov r0, r3
|
|
8008890: 3710 adds r7, #16
|
|
8008892: 46bd mov sp, r7
|
|
8008894: bd80 pop {r7, pc}
|
|
|
|
08008896 <USBD_LL_CloseEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
8008896: b580 push {r7, lr}
|
|
8008898: b084 sub sp, #16
|
|
800889a: af00 add r7, sp, #0
|
|
800889c: 6078 str r0, [r7, #4]
|
|
800889e: 460b mov r3, r1
|
|
80088a0: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
80088a2: 2300 movs r3, #0
|
|
80088a4: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
80088a6: 2300 movs r3, #0
|
|
80088a8: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
|
|
80088aa: 687b ldr r3, [r7, #4]
|
|
80088ac: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
|
|
80088b0: 78fa ldrb r2, [r7, #3]
|
|
80088b2: 4611 mov r1, r2
|
|
80088b4: 4618 mov r0, r3
|
|
80088b6: f7f8 fba1 bl 8000ffc <HAL_PCD_EP_Close>
|
|
80088ba: 4603 mov r3, r0
|
|
80088bc: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
80088be: 7bfb ldrb r3, [r7, #15]
|
|
80088c0: 4618 mov r0, r3
|
|
80088c2: f000 f90f bl 8008ae4 <USBD_Get_USB_Status>
|
|
80088c6: 4603 mov r3, r0
|
|
80088c8: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
80088ca: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
80088cc: 4618 mov r0, r3
|
|
80088ce: 3710 adds r7, #16
|
|
80088d0: 46bd mov sp, r7
|
|
80088d2: bd80 pop {r7, pc}
|
|
|
|
080088d4 <USBD_LL_StallEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
80088d4: b580 push {r7, lr}
|
|
80088d6: b084 sub sp, #16
|
|
80088d8: af00 add r7, sp, #0
|
|
80088da: 6078 str r0, [r7, #4]
|
|
80088dc: 460b mov r3, r1
|
|
80088de: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
80088e0: 2300 movs r3, #0
|
|
80088e2: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
80088e4: 2300 movs r3, #0
|
|
80088e6: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
|
|
80088e8: 687b ldr r3, [r7, #4]
|
|
80088ea: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
|
|
80088ee: 78fa ldrb r2, [r7, #3]
|
|
80088f0: 4611 mov r1, r2
|
|
80088f2: 4618 mov r0, r3
|
|
80088f4: f7f8 fc4a bl 800118c <HAL_PCD_EP_SetStall>
|
|
80088f8: 4603 mov r3, r0
|
|
80088fa: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
80088fc: 7bfb ldrb r3, [r7, #15]
|
|
80088fe: 4618 mov r0, r3
|
|
8008900: f000 f8f0 bl 8008ae4 <USBD_Get_USB_Status>
|
|
8008904: 4603 mov r3, r0
|
|
8008906: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
8008908: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800890a: 4618 mov r0, r3
|
|
800890c: 3710 adds r7, #16
|
|
800890e: 46bd mov sp, r7
|
|
8008910: bd80 pop {r7, pc}
|
|
|
|
08008912 <USBD_LL_ClearStallEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
8008912: b580 push {r7, lr}
|
|
8008914: b084 sub sp, #16
|
|
8008916: af00 add r7, sp, #0
|
|
8008918: 6078 str r0, [r7, #4]
|
|
800891a: 460b mov r3, r1
|
|
800891c: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800891e: 2300 movs r3, #0
|
|
8008920: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
8008922: 2300 movs r3, #0
|
|
8008924: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
|
|
8008926: 687b ldr r3, [r7, #4]
|
|
8008928: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
|
|
800892c: 78fa ldrb r2, [r7, #3]
|
|
800892e: 4611 mov r1, r2
|
|
8008930: 4618 mov r0, r3
|
|
8008932: f7f8 fc7d bl 8001230 <HAL_PCD_EP_ClrStall>
|
|
8008936: 4603 mov r3, r0
|
|
8008938: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
800893a: 7bfb ldrb r3, [r7, #15]
|
|
800893c: 4618 mov r0, r3
|
|
800893e: f000 f8d1 bl 8008ae4 <USBD_Get_USB_Status>
|
|
8008942: 4603 mov r3, r0
|
|
8008944: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
8008946: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
8008948: 4618 mov r0, r3
|
|
800894a: 3710 adds r7, #16
|
|
800894c: 46bd mov sp, r7
|
|
800894e: bd80 pop {r7, pc}
|
|
|
|
08008950 <USBD_LL_IsStallEP>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval Stall (1: Yes, 0: No)
|
|
*/
|
|
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
8008950: b480 push {r7}
|
|
8008952: b085 sub sp, #20
|
|
8008954: af00 add r7, sp, #0
|
|
8008956: 6078 str r0, [r7, #4]
|
|
8008958: 460b mov r3, r1
|
|
800895a: 70fb strb r3, [r7, #3]
|
|
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
|
|
800895c: 687b ldr r3, [r7, #4]
|
|
800895e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
|
|
8008962: 60fb str r3, [r7, #12]
|
|
|
|
if((ep_addr & 0x80) == 0x80)
|
|
8008964: f997 3003 ldrsb.w r3, [r7, #3]
|
|
8008968: 2b00 cmp r3, #0
|
|
800896a: da0c bge.n 8008986 <USBD_LL_IsStallEP+0x36>
|
|
{
|
|
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
|
|
800896c: 78fb ldrb r3, [r7, #3]
|
|
800896e: f003 037f and.w r3, r3, #127 @ 0x7f
|
|
8008972: 68f9 ldr r1, [r7, #12]
|
|
8008974: 1c5a adds r2, r3, #1
|
|
8008976: 4613 mov r3, r2
|
|
8008978: 009b lsls r3, r3, #2
|
|
800897a: 4413 add r3, r2
|
|
800897c: 00db lsls r3, r3, #3
|
|
800897e: 440b add r3, r1
|
|
8008980: 3302 adds r3, #2
|
|
8008982: 781b ldrb r3, [r3, #0]
|
|
8008984: e00b b.n 800899e <USBD_LL_IsStallEP+0x4e>
|
|
}
|
|
else
|
|
{
|
|
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
|
|
8008986: 78fb ldrb r3, [r7, #3]
|
|
8008988: f003 027f and.w r2, r3, #127 @ 0x7f
|
|
800898c: 68f9 ldr r1, [r7, #12]
|
|
800898e: 4613 mov r3, r2
|
|
8008990: 009b lsls r3, r3, #2
|
|
8008992: 4413 add r3, r2
|
|
8008994: 00db lsls r3, r3, #3
|
|
8008996: 440b add r3, r1
|
|
8008998: f503 73b5 add.w r3, r3, #362 @ 0x16a
|
|
800899c: 781b ldrb r3, [r3, #0]
|
|
}
|
|
}
|
|
800899e: 4618 mov r0, r3
|
|
80089a0: 3714 adds r7, #20
|
|
80089a2: 46bd mov sp, r7
|
|
80089a4: f85d 7b04 ldr.w r7, [sp], #4
|
|
80089a8: 4770 bx lr
|
|
|
|
080089aa <USBD_LL_SetUSBAddress>:
|
|
* @param pdev: Device handle
|
|
* @param dev_addr: Device address
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
|
|
{
|
|
80089aa: b580 push {r7, lr}
|
|
80089ac: b084 sub sp, #16
|
|
80089ae: af00 add r7, sp, #0
|
|
80089b0: 6078 str r0, [r7, #4]
|
|
80089b2: 460b mov r3, r1
|
|
80089b4: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
80089b6: 2300 movs r3, #0
|
|
80089b8: 73fb strb r3, [r7, #15]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
80089ba: 2300 movs r3, #0
|
|
80089bc: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
|
|
80089be: 687b ldr r3, [r7, #4]
|
|
80089c0: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
|
|
80089c4: 78fa ldrb r2, [r7, #3]
|
|
80089c6: 4611 mov r1, r2
|
|
80089c8: 4618 mov r0, r3
|
|
80089ca: f7f8 fa95 bl 8000ef8 <HAL_PCD_SetAddress>
|
|
80089ce: 4603 mov r3, r0
|
|
80089d0: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
80089d2: 7bfb ldrb r3, [r7, #15]
|
|
80089d4: 4618 mov r0, r3
|
|
80089d6: f000 f885 bl 8008ae4 <USBD_Get_USB_Status>
|
|
80089da: 4603 mov r3, r0
|
|
80089dc: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
80089de: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
80089e0: 4618 mov r0, r3
|
|
80089e2: 3710 adds r7, #16
|
|
80089e4: 46bd mov sp, r7
|
|
80089e6: bd80 pop {r7, pc}
|
|
|
|
080089e8 <USBD_LL_Transmit>:
|
|
* @param pbuf: Pointer to data to be sent
|
|
* @param size: Data size
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
|
|
{
|
|
80089e8: b580 push {r7, lr}
|
|
80089ea: b086 sub sp, #24
|
|
80089ec: af00 add r7, sp, #0
|
|
80089ee: 60f8 str r0, [r7, #12]
|
|
80089f0: 607a str r2, [r7, #4]
|
|
80089f2: 461a mov r2, r3
|
|
80089f4: 460b mov r3, r1
|
|
80089f6: 72fb strb r3, [r7, #11]
|
|
80089f8: 4613 mov r3, r2
|
|
80089fa: 813b strh r3, [r7, #8]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
80089fc: 2300 movs r3, #0
|
|
80089fe: 75fb strb r3, [r7, #23]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
8008a00: 2300 movs r3, #0
|
|
8008a02: 75bb strb r3, [r7, #22]
|
|
|
|
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
|
|
8008a04: 68fb ldr r3, [r7, #12]
|
|
8008a06: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
|
|
8008a0a: 893b ldrh r3, [r7, #8]
|
|
8008a0c: 7af9 ldrb r1, [r7, #11]
|
|
8008a0e: 687a ldr r2, [r7, #4]
|
|
8008a10: f7f8 fb85 bl 800111e <HAL_PCD_EP_Transmit>
|
|
8008a14: 4603 mov r3, r0
|
|
8008a16: 75fb strb r3, [r7, #23]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
8008a18: 7dfb ldrb r3, [r7, #23]
|
|
8008a1a: 4618 mov r0, r3
|
|
8008a1c: f000 f862 bl 8008ae4 <USBD_Get_USB_Status>
|
|
8008a20: 4603 mov r3, r0
|
|
8008a22: 75bb strb r3, [r7, #22]
|
|
|
|
return usb_status;
|
|
8008a24: 7dbb ldrb r3, [r7, #22]
|
|
}
|
|
8008a26: 4618 mov r0, r3
|
|
8008a28: 3718 adds r7, #24
|
|
8008a2a: 46bd mov sp, r7
|
|
8008a2c: bd80 pop {r7, pc}
|
|
|
|
08008a2e <USBD_LL_PrepareReceive>:
|
|
* @param pbuf: Pointer to data to be received
|
|
* @param size: Data size
|
|
* @retval USBD status
|
|
*/
|
|
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
|
|
{
|
|
8008a2e: b580 push {r7, lr}
|
|
8008a30: b086 sub sp, #24
|
|
8008a32: af00 add r7, sp, #0
|
|
8008a34: 60f8 str r0, [r7, #12]
|
|
8008a36: 607a str r2, [r7, #4]
|
|
8008a38: 461a mov r2, r3
|
|
8008a3a: 460b mov r3, r1
|
|
8008a3c: 72fb strb r3, [r7, #11]
|
|
8008a3e: 4613 mov r3, r2
|
|
8008a40: 813b strh r3, [r7, #8]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
8008a42: 2300 movs r3, #0
|
|
8008a44: 75fb strb r3, [r7, #23]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
8008a46: 2300 movs r3, #0
|
|
8008a48: 75bb strb r3, [r7, #22]
|
|
|
|
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
|
|
8008a4a: 68fb ldr r3, [r7, #12]
|
|
8008a4c: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
|
|
8008a50: 893b ldrh r3, [r7, #8]
|
|
8008a52: 7af9 ldrb r1, [r7, #11]
|
|
8008a54: 687a ldr r2, [r7, #4]
|
|
8008a56: f7f8 fb19 bl 800108c <HAL_PCD_EP_Receive>
|
|
8008a5a: 4603 mov r3, r0
|
|
8008a5c: 75fb strb r3, [r7, #23]
|
|
|
|
usb_status = USBD_Get_USB_Status(hal_status);
|
|
8008a5e: 7dfb ldrb r3, [r7, #23]
|
|
8008a60: 4618 mov r0, r3
|
|
8008a62: f000 f83f bl 8008ae4 <USBD_Get_USB_Status>
|
|
8008a66: 4603 mov r3, r0
|
|
8008a68: 75bb strb r3, [r7, #22]
|
|
|
|
return usb_status;
|
|
8008a6a: 7dbb ldrb r3, [r7, #22]
|
|
}
|
|
8008a6c: 4618 mov r0, r3
|
|
8008a6e: 3718 adds r7, #24
|
|
8008a70: 46bd mov sp, r7
|
|
8008a72: bd80 pop {r7, pc}
|
|
|
|
08008a74 <USBD_LL_GetRxDataSize>:
|
|
* @param pdev: Device handle
|
|
* @param ep_addr: Endpoint number
|
|
* @retval Received Data Size
|
|
*/
|
|
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
|
|
{
|
|
8008a74: b580 push {r7, lr}
|
|
8008a76: b082 sub sp, #8
|
|
8008a78: af00 add r7, sp, #0
|
|
8008a7a: 6078 str r0, [r7, #4]
|
|
8008a7c: 460b mov r3, r1
|
|
8008a7e: 70fb strb r3, [r7, #3]
|
|
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
|
|
8008a80: 687b ldr r3, [r7, #4]
|
|
8008a82: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
|
|
8008a86: 78fa ldrb r2, [r7, #3]
|
|
8008a88: 4611 mov r1, r2
|
|
8008a8a: 4618 mov r0, r3
|
|
8008a8c: f7f8 fb2f bl 80010ee <HAL_PCD_EP_GetRxCount>
|
|
8008a90: 4603 mov r3, r0
|
|
}
|
|
8008a92: 4618 mov r0, r3
|
|
8008a94: 3708 adds r7, #8
|
|
8008a96: 46bd mov sp, r7
|
|
8008a98: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08008a9c <USBD_static_malloc>:
|
|
* @brief Static single allocation.
|
|
* @param size: Size of allocated memory
|
|
* @retval None
|
|
*/
|
|
void *USBD_static_malloc(uint32_t size)
|
|
{
|
|
8008a9c: b480 push {r7}
|
|
8008a9e: b083 sub sp, #12
|
|
8008aa0: af00 add r7, sp, #0
|
|
8008aa2: 6078 str r0, [r7, #4]
|
|
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
|
|
return mem;
|
|
8008aa4: 4b03 ldr r3, [pc, #12] @ (8008ab4 <USBD_static_malloc+0x18>)
|
|
}
|
|
8008aa6: 4618 mov r0, r3
|
|
8008aa8: 370c adds r7, #12
|
|
8008aaa: 46bd mov sp, r7
|
|
8008aac: f85d 7b04 ldr.w r7, [sp], #4
|
|
8008ab0: 4770 bx lr
|
|
8008ab2: bf00 nop
|
|
8008ab4: 200011d8 .word 0x200011d8
|
|
|
|
08008ab8 <USBD_static_free>:
|
|
* @brief Dummy memory free
|
|
* @param p: Pointer to allocated memory address
|
|
* @retval None
|
|
*/
|
|
void USBD_static_free(void *p)
|
|
{
|
|
8008ab8: b480 push {r7}
|
|
8008aba: b083 sub sp, #12
|
|
8008abc: af00 add r7, sp, #0
|
|
8008abe: 6078 str r0, [r7, #4]
|
|
|
|
}
|
|
8008ac0: bf00 nop
|
|
8008ac2: 370c adds r7, #12
|
|
8008ac4: 46bd mov sp, r7
|
|
8008ac6: f85d 7b04 ldr.w r7, [sp], #4
|
|
8008aca: 4770 bx lr
|
|
|
|
08008acc <HAL_PCDEx_SetConnectionState>:
|
|
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
|
|
void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
|
|
#else
|
|
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
|
|
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
|
|
{
|
|
8008acc: b480 push {r7}
|
|
8008ace: b083 sub sp, #12
|
|
8008ad0: af00 add r7, sp, #0
|
|
8008ad2: 6078 str r0, [r7, #4]
|
|
8008ad4: 460b mov r3, r1
|
|
8008ad6: 70fb strb r3, [r7, #3]
|
|
{
|
|
/* Configure High connection state. */
|
|
|
|
}
|
|
/* USER CODE END 6 */
|
|
}
|
|
8008ad8: bf00 nop
|
|
8008ada: 370c adds r7, #12
|
|
8008adc: 46bd mov sp, r7
|
|
8008ade: f85d 7b04 ldr.w r7, [sp], #4
|
|
8008ae2: 4770 bx lr
|
|
|
|
08008ae4 <USBD_Get_USB_Status>:
|
|
* @brief Returns the USB status depending on the HAL status:
|
|
* @param hal_status: HAL status
|
|
* @retval USB status
|
|
*/
|
|
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
|
|
{
|
|
8008ae4: b480 push {r7}
|
|
8008ae6: b085 sub sp, #20
|
|
8008ae8: af00 add r7, sp, #0
|
|
8008aea: 4603 mov r3, r0
|
|
8008aec: 71fb strb r3, [r7, #7]
|
|
USBD_StatusTypeDef usb_status = USBD_OK;
|
|
8008aee: 2300 movs r3, #0
|
|
8008af0: 73fb strb r3, [r7, #15]
|
|
|
|
switch (hal_status)
|
|
8008af2: 79fb ldrb r3, [r7, #7]
|
|
8008af4: 2b03 cmp r3, #3
|
|
8008af6: d817 bhi.n 8008b28 <USBD_Get_USB_Status+0x44>
|
|
8008af8: a201 add r2, pc, #4 @ (adr r2, 8008b00 <USBD_Get_USB_Status+0x1c>)
|
|
8008afa: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8008afe: bf00 nop
|
|
8008b00: 08008b11 .word 0x08008b11
|
|
8008b04: 08008b17 .word 0x08008b17
|
|
8008b08: 08008b1d .word 0x08008b1d
|
|
8008b0c: 08008b23 .word 0x08008b23
|
|
{
|
|
case HAL_OK :
|
|
usb_status = USBD_OK;
|
|
8008b10: 2300 movs r3, #0
|
|
8008b12: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8008b14: e00b b.n 8008b2e <USBD_Get_USB_Status+0x4a>
|
|
case HAL_ERROR :
|
|
usb_status = USBD_FAIL;
|
|
8008b16: 2302 movs r3, #2
|
|
8008b18: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8008b1a: e008 b.n 8008b2e <USBD_Get_USB_Status+0x4a>
|
|
case HAL_BUSY :
|
|
usb_status = USBD_BUSY;
|
|
8008b1c: 2301 movs r3, #1
|
|
8008b1e: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8008b20: e005 b.n 8008b2e <USBD_Get_USB_Status+0x4a>
|
|
case HAL_TIMEOUT :
|
|
usb_status = USBD_FAIL;
|
|
8008b22: 2302 movs r3, #2
|
|
8008b24: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8008b26: e002 b.n 8008b2e <USBD_Get_USB_Status+0x4a>
|
|
default :
|
|
usb_status = USBD_FAIL;
|
|
8008b28: 2302 movs r3, #2
|
|
8008b2a: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8008b2c: bf00 nop
|
|
}
|
|
return usb_status;
|
|
8008b2e: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8008b30: 4618 mov r0, r3
|
|
8008b32: 3714 adds r7, #20
|
|
8008b34: 46bd mov sp, r7
|
|
8008b36: f85d 7b04 ldr.w r7, [sp], #4
|
|
8008b3a: 4770 bx lr
|
|
|
|
08008b3c <memset>:
|
|
8008b3c: 4402 add r2, r0
|
|
8008b3e: 4603 mov r3, r0
|
|
8008b40: 4293 cmp r3, r2
|
|
8008b42: d100 bne.n 8008b46 <memset+0xa>
|
|
8008b44: 4770 bx lr
|
|
8008b46: f803 1b01 strb.w r1, [r3], #1
|
|
8008b4a: e7f9 b.n 8008b40 <memset+0x4>
|
|
|
|
08008b4c <__libc_init_array>:
|
|
8008b4c: b570 push {r4, r5, r6, lr}
|
|
8008b4e: 4d0d ldr r5, [pc, #52] @ (8008b84 <__libc_init_array+0x38>)
|
|
8008b50: 4c0d ldr r4, [pc, #52] @ (8008b88 <__libc_init_array+0x3c>)
|
|
8008b52: 1b64 subs r4, r4, r5
|
|
8008b54: 10a4 asrs r4, r4, #2
|
|
8008b56: 2600 movs r6, #0
|
|
8008b58: 42a6 cmp r6, r4
|
|
8008b5a: d109 bne.n 8008b70 <__libc_init_array+0x24>
|
|
8008b5c: 4d0b ldr r5, [pc, #44] @ (8008b8c <__libc_init_array+0x40>)
|
|
8008b5e: 4c0c ldr r4, [pc, #48] @ (8008b90 <__libc_init_array+0x44>)
|
|
8008b60: f000 f818 bl 8008b94 <_init>
|
|
8008b64: 1b64 subs r4, r4, r5
|
|
8008b66: 10a4 asrs r4, r4, #2
|
|
8008b68: 2600 movs r6, #0
|
|
8008b6a: 42a6 cmp r6, r4
|
|
8008b6c: d105 bne.n 8008b7a <__libc_init_array+0x2e>
|
|
8008b6e: bd70 pop {r4, r5, r6, pc}
|
|
8008b70: f855 3b04 ldr.w r3, [r5], #4
|
|
8008b74: 4798 blx r3
|
|
8008b76: 3601 adds r6, #1
|
|
8008b78: e7ee b.n 8008b58 <__libc_init_array+0xc>
|
|
8008b7a: f855 3b04 ldr.w r3, [r5], #4
|
|
8008b7e: 4798 blx r3
|
|
8008b80: 3601 adds r6, #1
|
|
8008b82: e7f2 b.n 8008b6a <__libc_init_array+0x1e>
|
|
8008b84: 08008c38 .word 0x08008c38
|
|
8008b88: 08008c38 .word 0x08008c38
|
|
8008b8c: 08008c38 .word 0x08008c38
|
|
8008b90: 08008c3c .word 0x08008c3c
|
|
|
|
08008b94 <_init>:
|
|
8008b94: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
8008b96: bf00 nop
|
|
8008b98: bcf8 pop {r3, r4, r5, r6, r7}
|
|
8008b9a: bc08 pop {r3}
|
|
8008b9c: 469e mov lr, r3
|
|
8008b9e: 4770 bx lr
|
|
|
|
08008ba0 <_fini>:
|
|
8008ba0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
8008ba2: bf00 nop
|
|
8008ba4: bcf8 pop {r3, r4, r5, r6, r7}
|
|
8008ba6: bc08 pop {r3}
|
|
8008ba8: 469e mov lr, r3
|
|
8008baa: 4770 bx lr
|