2024-10-06 18:11:20 +08:00
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---
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title: Dev log: GPS receiver based on MAX2769 and Zynq 7010 FPGA
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author: peter
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date: 2024-10-02 20:10:44 +0800
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categories: [Electronics, Programming] # Blogging | Electronics | Programming | Mechanical | SelfHosting
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tags: [rf, electronics, fpga, ebaz4205, max2769, zynq7010] # systems | embedded | rf | microwave | electronics | solidworks | automation | tip
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# image: assets/img/2024-10-02-Dev-log-GPS-receiver/preview.png
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---
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2024-10-06 18:15:27 +08:00
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## 🚧🚧 THIS PAGE IS NOT FINISHED 🚧🚧
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2024-10-06 18:11:20 +08:00
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## Notes:
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https://github.com/iliasam/STM32F4_SDR_GPS?tab=readme-ov-file
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https://habr.com/ru/articles/789382/
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https://dsp.stackexchange.com/questions/92028/max2769-i-q-for-signal-acquisition-tracking
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## Datasheet
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> The MAX2769B features an on-chip ADC to digitize the
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> downconverted GPS signal. The maximum sampling
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> rate of the ADC is approximately 50Msps. The sampled
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> output is provided in a **2-bit format (1-bit magnitude and
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> 1-bit sign) by default** and also can be configured as a
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> **1-bit or 2-bit** in both I and Q channels, or 1-bit, 2-bit, or
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> 3-bit in the I channel only. The ADC supports the digital
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> outputs in three different formats: the unsigned binary,
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> the sign and magnitude, or the two’s complement format
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> by setting bits FORMAT in Configuration register 2. MSB
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> bits are output at I1 or Q1 pins and LSB bits are output at
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> I0 or Q0 pins, for I or Q channel, respectively. In the case
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> of 3-bit, output data format is selected in the I channel
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> only, the MSB is output at I1, the second bit is at I0, and
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> the LSB is at Q1.
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Surely two-bit correlation is the same process, just with more precision because of the additional bit?
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