mirror of
https://github.com/peter-tanner/satellite-testing-system.git
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252 lines
7.9 KiB
C
252 lines
7.9 KiB
C
/**
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******************************************************************************
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* @file stm32l4xx_hal_flash_ramfunc.c
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* @author MCD Application Team
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* @brief FLASH RAMFUNC driver.
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* This file provides a Flash firmware functions which should be
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* executed from internal SRAM
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* + FLASH HalfPage Programming
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* + FLASH Power Down in Run mode
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*
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* @verbatim
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==============================================================================
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##### Flash RAM functions #####
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==============================================================================
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*** ARM Compiler ***
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--------------------
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[..] RAM functions are defined using the toolchain options.
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Functions that are executed in RAM should reside in a separate
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source module. Using the 'Options for File' dialog you can simply change
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the 'Code / Const' area of a module to a memory space in physical RAM.
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Available memory areas are declared in the 'Target' tab of the
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Options for Target' dialog.
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*** ICCARM Compiler ***
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-----------------------
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[..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
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*** GNU Compiler ***
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--------------------
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[..] RAM functions are defined using a specific toolchain attribute
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"__attribute__((section(".RamFunc")))".
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@endverbatim
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file in
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* the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l4xx_hal.h"
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/** @addtogroup STM32L4xx_HAL_Driver
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* @{
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*/
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/** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC
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* @brief FLASH functions executed from RAM
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* @{
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*/
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#ifdef HAL_FLASH_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions -------------------------------------------------------*/
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/** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH in RAM function Exported Functions
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* @{
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*/
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/** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions
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* @brief Data transfers functions
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*
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@verbatim
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===============================================================================
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##### ramfunc functions #####
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===============================================================================
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[..]
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This subsection provides a set of functions that should be executed from RAM.
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@endverbatim
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* @{
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*/
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/**
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* @brief Enable the Power down in Run Mode
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* @note This function should be called and executed from SRAM memory
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* @retval HAL status
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*/
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__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void)
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{
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/* Enable the Power Down in Run mode*/
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__HAL_FLASH_POWER_DOWN_ENABLE();
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return HAL_OK;
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}
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/**
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* @brief Disable the Power down in Run Mode
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* @note This function should be called and executed from SRAM memory
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* @retval HAL status
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*/
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__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void)
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{
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/* Disable the Power Down in Run mode*/
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__HAL_FLASH_POWER_DOWN_DISABLE();
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return HAL_OK;
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}
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#if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
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/**
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* @brief Program the FLASH DBANK User Option Byte.
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*
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* @note To configure the user option bytes, the option lock bit OPTLOCK must
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* be cleared with the call of the HAL_FLASH_OB_Unlock() function.
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* @note To modify the DBANK option byte, no PCROP region should be defined.
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* To deactivate PCROP, user should perform RDP changing
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*
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* @param DBankConfig The FLASH DBANK User Option Byte value.
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* This parameter can be one of the following values:
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* @arg OB_DBANK_128_BITS: Single-bank with 128-bits data
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* @arg OB_DBANK_64_BITS: Dual-bank with 64-bits data
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*
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* @retval HAL status
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*/
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__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig)
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{
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uint32_t count, reg;
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HAL_StatusTypeDef status = HAL_ERROR;
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/* Process Locked */
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__HAL_LOCK(&pFlash);
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/* Check if the PCROP is disabled */
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reg = FLASH->PCROP1SR;
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if (reg > FLASH->PCROP1ER)
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{
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reg = FLASH->PCROP2SR;
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if (reg > FLASH->PCROP2ER)
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{
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/* Disable Flash prefetch */
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__HAL_FLASH_PREFETCH_BUFFER_DISABLE();
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if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U)
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{
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/* Disable Flash instruction cache */
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__HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
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/* Flush Flash instruction cache */
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__HAL_FLASH_INSTRUCTION_CACHE_RESET();
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}
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if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U)
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{
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/* Disable Flash data cache */
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__HAL_FLASH_DATA_CACHE_DISABLE();
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/* Flush Flash data cache */
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__HAL_FLASH_DATA_CACHE_RESET();
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}
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/* Disable WRP zone 1 of 1st bank if needed */
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reg = FLASH->WRP1AR;
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if (((reg & FLASH_WRP1AR_WRP1A_STRT) >> FLASH_WRP1AR_WRP1A_STRT_Pos) <=
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((reg & FLASH_WRP1AR_WRP1A_END) >> FLASH_WRP1AR_WRP1A_END_Pos))
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{
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MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), FLASH_WRP1AR_WRP1A_STRT);
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}
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/* Disable WRP zone 2 of 1st bank if needed */
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reg = FLASH->WRP1BR;
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if (((reg & FLASH_WRP1BR_WRP1B_STRT) >> FLASH_WRP1BR_WRP1B_STRT_Pos) <=
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((reg & FLASH_WRP1BR_WRP1B_END) >> FLASH_WRP1BR_WRP1B_END_Pos))
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{
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MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), FLASH_WRP1BR_WRP1B_STRT);
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}
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/* Disable WRP zone 1 of 2nd bank if needed */
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reg = FLASH->WRP2AR;
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if (((reg & FLASH_WRP2AR_WRP2A_STRT) >> FLASH_WRP2AR_WRP2A_STRT_Pos) <=
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((reg & FLASH_WRP2AR_WRP2A_END) >> FLASH_WRP2AR_WRP2A_END_Pos))
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{
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MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), FLASH_WRP2AR_WRP2A_STRT);
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}
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/* Disable WRP zone 2 of 2nd bank if needed */
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reg = FLASH->WRP2BR;
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if (((reg & FLASH_WRP2BR_WRP2B_STRT) >> FLASH_WRP2BR_WRP2B_STRT_Pos) <=
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((reg & FLASH_WRP2BR_WRP2B_END) >> FLASH_WRP2BR_WRP2B_END_Pos))
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{
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MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), FLASH_WRP2BR_WRP2B_STRT);
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}
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/* Modify the DBANK user option byte */
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MODIFY_REG(FLASH->OPTR, FLASH_OPTR_DBANK, DBankConfig);
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/* Set OPTSTRT Bit */
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SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
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/* Wait for last operation to be completed */
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/* 8 is the number of required instruction cycles for the below loop statement (timeout expressed in ms) */
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count = FLASH_TIMEOUT_VALUE * (SystemCoreClock / 8U / 1000U);
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do
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{
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if (count == 0U)
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{
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break;
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}
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count--;
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} while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET);
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/* If the option byte program operation is completed, disable the OPTSTRT Bit */
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CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
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/* Set the bit to force the option byte reloading */
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SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH);
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}
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}
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/* Process Unlocked */
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__HAL_UNLOCK(&pFlash);
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return status;
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}
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#endif
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* HAL_FLASH_MODULE_ENABLED */
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/**
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* @}
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*/
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/**
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* @}
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*/
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